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Gerd Hoffmannd52fdf62010-11-29 09:42:13 +01001// Low level AHCI disk access
2//
3// Copyright (C) 2010 Gerd Hoffmann <kraxel@redhat.com>
4//
5// This file may be distributed under the terms of the GNU LGPLv3 license.
6
7#include "types.h" // u8
8#include "ioport.h" // inb
9#include "util.h" // dprintf
Kevin O'Connor4bc49972012-05-13 22:58:08 -040010#include "biosvar.h" // GET_GLOBAL
Kevin O'Connor9cb49922011-06-20 22:22:42 -040011#include "pci.h" // foreachpci
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010012#include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER
13#include "pci_regs.h" // PCI_INTERRUPT_LINE
14#include "boot.h" // add_bcv_hd
15#include "disk.h" // struct ata_s
16#include "ata.h" // ATA_CB_STAT
17#include "ahci.h" // CDB_CMD_READ_10
18#include "blockcmd.h" // CDB_CMD_READ_10
19
Gerd Hoffmanne1041192011-07-14 16:24:04 +020020#define AHCI_REQUEST_TIMEOUT 32000 // 32 seconds max for IDE ops
21#define AHCI_RESET_TIMEOUT 500 // 500 miliseconds
22#define AHCI_LINK_TIMEOUT 10 // 10 miliseconds
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010023
24/****************************************************************
25 * these bits must run in both 16bit and 32bit modes
26 ****************************************************************/
27
28// prepare sata command fis
29static void sata_prep_simple(struct sata_cmd_fis *fis, u8 command)
30{
31 memset_fl(fis, 0, sizeof(*fis));
Kevin O'Connor890c0852012-05-24 23:55:00 -040032 SET_LOWFLAT(fis->command, command);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010033}
34
35static void sata_prep_readwrite(struct sata_cmd_fis *fis,
36 struct disk_op_s *op, int iswrite)
37{
38 u64 lba = op->lba;
39 u8 command;
40
41 memset_fl(fis, 0, sizeof(*fis));
42
43 if (op->count >= (1<<8) || lba + op->count >= (1<<28)) {
Kevin O'Connor890c0852012-05-24 23:55:00 -040044 SET_LOWFLAT(fis->sector_count2, op->count >> 8);
45 SET_LOWFLAT(fis->lba_low2, lba >> 24);
46 SET_LOWFLAT(fis->lba_mid2, lba >> 32);
47 SET_LOWFLAT(fis->lba_high2, lba >> 40);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010048 lba &= 0xffffff;
49 command = (iswrite ? ATA_CMD_WRITE_DMA_EXT
50 : ATA_CMD_READ_DMA_EXT);
51 } else {
52 command = (iswrite ? ATA_CMD_WRITE_DMA
53 : ATA_CMD_READ_DMA);
54 }
Kevin O'Connor890c0852012-05-24 23:55:00 -040055 SET_LOWFLAT(fis->feature, 1); /* dma */
56 SET_LOWFLAT(fis->command, command);
57 SET_LOWFLAT(fis->sector_count, op->count);
58 SET_LOWFLAT(fis->lba_low, lba);
59 SET_LOWFLAT(fis->lba_mid, lba >> 8);
60 SET_LOWFLAT(fis->lba_high, lba >> 16);
61 SET_LOWFLAT(fis->device, ((lba >> 24) & 0xf) | ATA_CB_DH_LBA);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010062}
63
64static void sata_prep_atapi(struct sata_cmd_fis *fis, u16 blocksize)
65{
66 memset_fl(fis, 0, sizeof(*fis));
Kevin O'Connor890c0852012-05-24 23:55:00 -040067 SET_LOWFLAT(fis->command, ATA_CMD_PACKET);
68 SET_LOWFLAT(fis->feature, 1); /* dma */
69 SET_LOWFLAT(fis->lba_mid, blocksize);
70 SET_LOWFLAT(fis->lba_high, blocksize >> 8);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010071}
72
73// ahci register access helpers
74static u32 ahci_ctrl_readl(struct ahci_ctrl_s *ctrl, u32 reg)
75{
76 u32 addr = GET_GLOBALFLAT(ctrl->iobase) + reg;
77 return pci_readl(addr);
78}
79
80static void ahci_ctrl_writel(struct ahci_ctrl_s *ctrl, u32 reg, u32 val)
81{
82 u32 addr = GET_GLOBALFLAT(ctrl->iobase) + reg;
83 pci_writel(addr, val);
84}
85
86static u32 ahci_port_to_ctrl(u32 pnr, u32 port_reg)
87{
88 u32 ctrl_reg = 0x100;
89 ctrl_reg += pnr * 0x80;
90 ctrl_reg += port_reg;
91 return ctrl_reg;
92}
93
94static u32 ahci_port_readl(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg)
95{
96 u32 ctrl_reg = ahci_port_to_ctrl(pnr, reg);
97 return ahci_ctrl_readl(ctrl, ctrl_reg);
98}
99
100static void ahci_port_writel(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg, u32 val)
101{
102 u32 ctrl_reg = ahci_port_to_ctrl(pnr, reg);
103 ahci_ctrl_writel(ctrl, ctrl_reg, val);
104}
105
106// submit ahci command + wait for result
107static int ahci_command(struct ahci_port_s *port, int iswrite, int isatapi,
108 void *buffer, u32 bsize)
109{
Gerd Hoffmann6f850492011-07-14 16:24:01 +0200110 u32 val, status, success, flags, intbits, error;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100111 struct ahci_ctrl_s *ctrl = GET_GLOBAL(port->ctrl);
112 struct ahci_cmd_s *cmd = GET_GLOBAL(port->cmd);
113 struct ahci_fis_s *fis = GET_GLOBAL(port->fis);
114 struct ahci_list_s *list = GET_GLOBAL(port->list);
115 u32 pnr = GET_GLOBAL(port->pnr);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200116 u64 end;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100117
Kevin O'Connor890c0852012-05-24 23:55:00 -0400118 SET_LOWFLAT(cmd->fis.reg, 0x27);
119 SET_LOWFLAT(cmd->fis.pmp_type, (1 << 7)); /* cmd fis */
120 SET_LOWFLAT(cmd->prdt[0].base, ((u32)buffer));
121 SET_LOWFLAT(cmd->prdt[0].baseu, 0);
122 SET_LOWFLAT(cmd->prdt[0].flags, bsize-1);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100123
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100124 flags = ((1 << 16) | /* one prd entry */
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100125 (iswrite ? (1 << 6) : 0) |
126 (isatapi ? (1 << 5) : 0) |
Gerd Hoffmanna8c6a4e2011-07-14 16:23:59 +0200127 (5 << 0)); /* fis length (dwords) */
Kevin O'Connor890c0852012-05-24 23:55:00 -0400128 SET_LOWFLAT(list[0].flags, flags);
129 SET_LOWFLAT(list[0].bytes, 0);
130 SET_LOWFLAT(list[0].base, ((u32)(cmd)));
131 SET_LOWFLAT(list[0].baseu, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100132
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400133 dprintf(8, "AHCI/%d: send cmd ...\n", pnr);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200134 intbits = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
135 if (intbits)
136 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, intbits);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100137 ahci_port_writel(ctrl, pnr, PORT_SCR_ACT, 1);
138 ahci_port_writel(ctrl, pnr, PORT_CMD_ISSUE, 1);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200139
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200140 end = calc_future_tsc(AHCI_REQUEST_TIMEOUT);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200141 do {
142 for (;;) {
143 intbits = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
144 if (intbits) {
145 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, intbits);
146 if (intbits & 0x02) {
Kevin O'Connor890c0852012-05-24 23:55:00 -0400147 status = GET_LOWFLAT(fis->psfis[2]);
148 error = GET_LOWFLAT(fis->psfis[3]);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200149 break;
150 }
151 if (intbits & 0x01) {
Kevin O'Connor890c0852012-05-24 23:55:00 -0400152 status = GET_LOWFLAT(fis->rfis[2]);
153 error = GET_LOWFLAT(fis->rfis[3]);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200154 break;
155 }
156 }
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200157 if (check_tsc(end)) {
158 warn_timeout();
159 return -1;
160 }
Gerd Hoffmann07532972011-07-14 16:24:00 +0200161 yield();
162 }
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400163 dprintf(8, "AHCI/%d: ... intbits 0x%x, status 0x%x ...\n",
Gerd Hoffmann07532972011-07-14 16:24:00 +0200164 pnr, intbits, status);
165 } while (status & ATA_CB_STAT_BSY);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100166
167 success = (0x00 == (status & (ATA_CB_STAT_BSY | ATA_CB_STAT_DF |
Gerd Hoffmanncbda7952011-07-14 16:24:03 +0200168 ATA_CB_STAT_ERR)) &&
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100169 ATA_CB_STAT_RDY == (status & (ATA_CB_STAT_RDY)));
Gerd Hoffmann6f850492011-07-14 16:24:01 +0200170 if (success) {
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400171 dprintf(8, "AHCI/%d: ... finished, status 0x%x, OK\n", pnr,
Gerd Hoffmann6f850492011-07-14 16:24:01 +0200172 status);
173 } else {
174 dprintf(2, "AHCI/%d: ... finished, status 0x%x, ERROR 0x%x\n", pnr,
175 status, error);
176
177 // non-queued error recovery (AHCI 1.3 section 6.2.2.1)
178 // Clears PxCMD.ST to 0 to reset the PxCI register
179 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
180 ahci_port_writel(ctrl, pnr, PORT_CMD, val & ~PORT_CMD_START);
181
182 // waits for PxCMD.CR to clear to 0
183 while (1) {
184 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
185 if ((val & PORT_CMD_LIST_ON) == 0)
186 break;
187 yield();
188 }
189
190 // Clears any error bits in PxSERR to enable capturing new errors
191 val = ahci_port_readl(ctrl, pnr, PORT_SCR_ERR);
192 ahci_port_writel(ctrl, pnr, PORT_SCR_ERR, val);
193
194 // Clears status bits in PxIS as appropriate
195 val = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
196 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, val);
197
198 // If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to 1, issue
199 // a COMRESET to the device to put it in an idle state
200 val = ahci_port_readl(ctrl, pnr, PORT_TFDATA);
201 if (val & (ATA_CB_STAT_BSY | ATA_CB_STAT_DRQ)) {
202 dprintf(2, "AHCI/%d: issue comreset\n", pnr);
203 val = ahci_port_readl(ctrl, pnr, PORT_SCR_CTL);
204 // set Device Detection Initialization (DET) to 1 for 1 ms for comreset
205 ahci_port_writel(ctrl, pnr, PORT_SCR_CTL, val | 1);
206 mdelay (1);
207 ahci_port_writel(ctrl, pnr, PORT_SCR_CTL, val);
208 }
209
210 // Sets PxCMD.ST to 1 to enable issuing new commands
211 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
212 ahci_port_writel(ctrl, pnr, PORT_CMD, val | PORT_CMD_START);
213 }
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100214 return success ? 0 : -1;
215}
216
217#define CDROM_CDB_SIZE 12
218
219int ahci_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
220{
Kevin O'Connor80c2b6e2010-12-05 12:52:02 -0500221 if (! CONFIG_AHCI)
222 return 0;
223
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100224 struct ahci_port_s *port = container_of(
225 op->drive_g, struct ahci_port_s, drive);
226 struct ahci_cmd_s *cmd = GET_GLOBAL(port->cmd);
227 u8 *atapi = cdbcmd;
228 int i, rc;
229
230 sata_prep_atapi(&cmd->fis, blocksize);
231 for (i = 0; i < CDROM_CDB_SIZE; i++) {
Kevin O'Connor890c0852012-05-24 23:55:00 -0400232 SET_LOWFLAT(cmd->atapi[i], atapi[i]);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100233 }
234 rc = ahci_command(port, 0, 1, op->buf_fl,
235 op->count * blocksize);
236 if (rc < 0)
237 return DISK_RET_EBADTRACK;
238 return DISK_RET_SUCCESS;
239}
240
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200241// read/write count blocks from a harddrive, op->buf_fl must be word aligned
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100242static int
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200243ahci_disk_readwrite_aligned(struct disk_op_s *op, int iswrite)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100244{
245 struct ahci_port_s *port = container_of(
246 op->drive_g, struct ahci_port_s, drive);
247 struct ahci_cmd_s *cmd = GET_GLOBAL(port->cmd);
248 int rc;
249
250 sata_prep_readwrite(&cmd->fis, op, iswrite);
251 rc = ahci_command(port, iswrite, 0, op->buf_fl,
252 op->count * DISK_SECTOR_SIZE);
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400253 dprintf(8, "ahci disk %s, lba %6x, count %3x, buf %p, rc %d\n",
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100254 iswrite ? "write" : "read", (u32)op->lba, op->count, op->buf_fl, rc);
255 if (rc < 0)
256 return DISK_RET_EBADTRACK;
257 return DISK_RET_SUCCESS;
258}
259
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200260// read/write count blocks from a harddrive.
261static int
262ahci_disk_readwrite(struct disk_op_s *op, int iswrite)
263{
264 // if caller's buffer is word aligned, use it directly
265 if (((u32) op->buf_fl & 1) == 0)
266 return ahci_disk_readwrite_aligned(op, iswrite);
267
268 // Use a word aligned buffer for AHCI I/O
269 int rc;
270 struct disk_op_s localop = *op;
Gerd Hoffmannd7a7cf32011-08-04 19:36:27 +0200271 u8 *alignedbuf_fl = GET_GLOBAL(bounce_buf_fl);
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200272 u8 *position = op->buf_fl;
273
274 localop.buf_fl = alignedbuf_fl;
275 localop.count = 1;
276
277 if (iswrite) {
278 u16 block;
279 for (block = 0; block < op->count; block++) {
280 memcpy_fl (alignedbuf_fl, position, DISK_SECTOR_SIZE);
281 rc = ahci_disk_readwrite_aligned (&localop, 1);
282 if (rc)
283 return rc;
284 position += DISK_SECTOR_SIZE;
285 localop.lba++;
286 }
287 } else { // read
288 u16 block;
289 for (block = 0; block < op->count; block++) {
290 rc = ahci_disk_readwrite_aligned (&localop, 0);
291 if (rc)
292 return rc;
293 memcpy_fl (position, alignedbuf_fl, DISK_SECTOR_SIZE);
294 position += DISK_SECTOR_SIZE;
295 localop.lba++;
296 }
297 }
298 return DISK_RET_SUCCESS;
299}
300
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100301// command demuxer
302int process_ahci_op(struct disk_op_s *op)
303{
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100304 if (!CONFIG_AHCI)
305 return 0;
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400306 switch (op->command) {
307 case CMD_READ:
308 return ahci_disk_readwrite(op, 0);
309 case CMD_WRITE:
310 return ahci_disk_readwrite(op, 1);
311 case CMD_FORMAT:
312 case CMD_RESET:
313 case CMD_ISREADY:
314 case CMD_VERIFY:
315 case CMD_SEEK:
316 return DISK_RET_SUCCESS;
317 default:
318 dprintf(1, "AHCI: unknown disk command %d\n", op->command);
319 op->count = 0;
320 return DISK_RET_EPARAM;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100321 }
322}
323
324/****************************************************************
325 * everything below is pure 32bit code
326 ****************************************************************/
327
328static void
329ahci_port_reset(struct ahci_ctrl_s *ctrl, u32 pnr)
330{
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200331 u32 val;
332 u64 end;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100333
334 /* disable FIS + CMD */
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200335 end = calc_future_tsc(AHCI_RESET_TIMEOUT);
336 for (;;) {
337 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
338 if (!(val & (PORT_CMD_FIS_RX | PORT_CMD_START |
339 PORT_CMD_FIS_ON | PORT_CMD_LIST_ON)))
340 break;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100341 val &= ~(PORT_CMD_FIS_RX | PORT_CMD_START);
342 ahci_port_writel(ctrl, pnr, PORT_CMD, val);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200343 if (check_tsc(end)) {
344 warn_timeout();
345 break;
346 }
347 yield();
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100348 }
349
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100350 /* disable + clear IRQs */
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200351 ahci_port_writel(ctrl, pnr, PORT_IRQ_MASK, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100352 val = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
353 if (val)
354 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, val);
355}
356
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100357static struct ahci_port_s*
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200358ahci_port_alloc(struct ahci_ctrl_s *ctrl, u32 pnr)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100359{
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200360 struct ahci_port_s *port = malloc_tmp(sizeof(*port));
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100361
362 if (!port) {
363 warn_noalloc();
364 return NULL;
365 }
366 port->pnr = pnr;
367 port->ctrl = ctrl;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200368 port->list = memalign_tmp(1024, 1024);
369 port->fis = memalign_tmp(256, 256);
370 port->cmd = memalign_tmp(256, 256);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100371 if (port->list == NULL || port->fis == NULL || port->cmd == NULL) {
372 warn_noalloc();
373 return NULL;
374 }
375 memset(port->list, 0, 1024);
376 memset(port->fis, 0, 256);
377 memset(port->cmd, 0, 256);
378
379 ahci_port_writel(ctrl, pnr, PORT_LST_ADDR, (u32)port->list);
380 ahci_port_writel(ctrl, pnr, PORT_FIS_ADDR, (u32)port->fis);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200381 return port;
382}
383
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200384static struct ahci_port_s* ahci_port_realloc(struct ahci_port_s *port)
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200385{
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200386 struct ahci_port_s *tmp;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200387 u32 cmd;
388
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200389 tmp = malloc_fseg(sizeof(*port));
390 *tmp = *port;
391 free(port);
392 port = tmp;
393
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200394 ahci_port_reset(port->ctrl, port->pnr);
395
396 free(port->list);
397 free(port->fis);
398 free(port->cmd);
399 port->list = memalign_low(1024, 1024);
400 port->fis = memalign_low(256, 256);
401 port->cmd = memalign_low(256, 256);
402
403 ahci_port_writel(port->ctrl, port->pnr, PORT_LST_ADDR, (u32)port->list);
404 ahci_port_writel(port->ctrl, port->pnr, PORT_FIS_ADDR, (u32)port->fis);
405
406 cmd = ahci_port_readl(port->ctrl, port->pnr, PORT_CMD);
407 cmd |= (PORT_CMD_FIS_RX|PORT_CMD_START);
408 ahci_port_writel(port->ctrl, port->pnr, PORT_CMD, cmd);
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200409
410 return port;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200411}
412
413static void ahci_port_release(struct ahci_port_s *port)
414{
415 ahci_port_reset(port->ctrl, port->pnr);
416 free(port->list);
417 free(port->fis);
418 free(port->cmd);
419 free(port);
420}
421
422#define MAXMODEL 40
423
424/* See ahci spec chapter 10.1 "Software Initialization of HBA" */
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500425static int ahci_port_setup(struct ahci_port_s *port)
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200426{
427 struct ahci_ctrl_s *ctrl = port->ctrl;
428 u32 pnr = port->pnr;
429 char model[MAXMODEL+1];
430 u16 buffer[256];
431 u32 cmd, stat, err, tf;
432 u64 end;
433 int rc;
434
435 /* enable FIS recv */
436 cmd = ahci_port_readl(ctrl, pnr, PORT_CMD);
437 cmd |= PORT_CMD_FIS_RX;
438 ahci_port_writel(ctrl, pnr, PORT_CMD, cmd);
439
440 /* spin up */
441 cmd |= PORT_CMD_SPIN_UP;
442 ahci_port_writel(ctrl, pnr, PORT_CMD, cmd);
443 end = calc_future_tsc(AHCI_LINK_TIMEOUT);
444 for (;;) {
445 stat = ahci_port_readl(ctrl, pnr, PORT_SCR_STAT);
446 if ((stat & 0x07) == 0x03) {
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400447 dprintf(2, "AHCI/%d: link up\n", port->pnr);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200448 break;
449 }
450 if (check_tsc(end)) {
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400451 dprintf(2, "AHCI/%d: link down\n", port->pnr);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200452 return -1;
453 }
454 yield();
455 }
456
457 /* clear error status */
458 err = ahci_port_readl(ctrl, pnr, PORT_SCR_ERR);
459 if (err)
460 ahci_port_writel(ctrl, pnr, PORT_SCR_ERR, err);
461
462 /* wait for device becoming ready */
463 end = calc_future_tsc(AHCI_REQUEST_TIMEOUT);
464 for (;;) {
465 tf = ahci_port_readl(ctrl, pnr, PORT_TFDATA);
466 if (!(tf & (ATA_CB_STAT_BSY |
467 ATA_CB_STAT_DRQ)))
468 break;
469 if (check_tsc(end)) {
470 warn_timeout();
471 dprintf(1, "AHCI/%d: device not ready (tf 0x%x)\n", port->pnr, tf);
472 return -1;
473 }
474 yield();
475 }
476
477 /* start device */
478 cmd |= PORT_CMD_START;
479 ahci_port_writel(ctrl, pnr, PORT_CMD, cmd);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100480
481 sata_prep_simple(&port->cmd->fis, ATA_CMD_IDENTIFY_PACKET_DEVICE);
482 rc = ahci_command(port, 0, 0, buffer, sizeof(buffer));
483 if (rc == 0) {
484 port->atapi = 1;
485 } else {
486 port->atapi = 0;
487 sata_prep_simple(&port->cmd->fis, ATA_CMD_IDENTIFY_DEVICE);
488 rc = ahci_command(port, 0, 0, buffer, sizeof(buffer));
489 if (rc < 0)
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200490 return -1;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100491 }
492
Gerd Hoffmann0e6f6362010-12-09 08:39:48 +0100493 port->drive.cntl_id = pnr;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100494 port->drive.removable = (buffer[0] & 0x80) ? 1 : 0;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100495
496 if (!port->atapi) {
497 // found disk (ata)
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400498 port->drive.type = DTYPE_AHCI;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100499 port->drive.blksize = DISK_SECTOR_SIZE;
500 port->drive.pchs.cylinders = buffer[1];
501 port->drive.pchs.heads = buffer[3];
502 port->drive.pchs.spt = buffer[6];
503
504 u64 sectors;
505 if (buffer[83] & (1 << 10)) // word 83 - lba48 support
506 sectors = *(u64*)&buffer[100]; // word 100-103
507 else
508 sectors = *(u32*)&buffer[60]; // word 60 and word 61
509 port->drive.sectors = sectors;
510 u64 adjsize = sectors >> 11;
511 char adjprefix = 'M';
512 if (adjsize >= (1 << 16)) {
513 adjsize >>= 10;
514 adjprefix = 'G';
515 }
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200516 port->desc = znprintf(MAXDESCSIZE
Kevin O'Connorca2bc1c2010-12-29 21:41:19 -0500517 , "AHCI/%d: %s ATA-%d Hard-Disk (%u %ciBytes)"
518 , port->pnr
519 , ata_extract_model(model, MAXMODEL, buffer)
520 , ata_extract_version(buffer)
521 , (u32)adjsize, adjprefix);
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200522 port->prio = bootprio_find_ata_device(ctrl->pci_tmp, pnr, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100523 } else {
524 // found cdrom (atapi)
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400525 port->drive.type = DTYPE_AHCI_ATAPI;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100526 port->drive.blksize = CDROM_SECTOR_SIZE;
527 port->drive.sectors = (u64)-1;
528 u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05;
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200529 if (!iscd) {
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400530 dprintf(1, "AHCI/%d: atapi device isn't a cdrom\n", port->pnr);
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200531 return -1;
532 }
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200533 port->desc = znprintf(MAXDESCSIZE
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200534 , "DVD/CD [AHCI/%d: %s ATAPI-%d DVD/CD]"
Kevin O'Connorca2bc1c2010-12-29 21:41:19 -0500535 , port->pnr
536 , ata_extract_model(model, MAXMODEL, buffer)
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200537 , ata_extract_version(buffer));
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200538 port->prio = bootprio_find_ata_device(ctrl->pci_tmp, pnr, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100539 }
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200540 return 0;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100541}
542
543// Detect any drives attached to a given controller.
544static void
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200545ahci_port_detect(void *data)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100546{
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200547 struct ahci_port_s *port = data;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100548 int rc;
549
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200550 dprintf(2, "AHCI/%d: probing\n", port->pnr);
551 ahci_port_reset(port->ctrl, port->pnr);
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500552 rc = ahci_port_setup(port);
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200553 if (rc < 0)
554 ahci_port_release(port);
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200555 else {
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200556 port = ahci_port_realloc(port);
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200557 dprintf(1, "AHCI/%d: registering: \"%s\"\n", port->pnr, port->desc);
558 if (!port->atapi) {
559 // Register with bcv system.
560 boot_add_hd(&port->drive, port->desc, port->prio);
561 } else {
562 // fill cdidmap
563 boot_add_cd(&port->drive, port->desc, port->prio);
564 }
565 }
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100566}
567
568// Initialize an ata controller and detect its drives.
569static void
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500570ahci_controller_setup(struct pci_device *pci)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100571{
572 struct ahci_ctrl_s *ctrl = malloc_fseg(sizeof(*ctrl));
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200573 struct ahci_port_s *port;
Gerd Hoffmann9c869922011-07-14 16:24:05 +0200574 u16 bdf = pci->bdf;
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200575 u32 val, pnr, max;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100576
577 if (!ctrl) {
578 warn_noalloc();
579 return;
580 }
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200581
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500582 if (create_bounce_buf() < 0) {
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200583 warn_noalloc();
Gerd Hoffmannd7a7cf32011-08-04 19:36:27 +0200584 free(ctrl);
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200585 return;
586 }
587
Gerd Hoffmann9c869922011-07-14 16:24:05 +0200588 ctrl->pci_tmp = pci;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100589 ctrl->pci_bdf = bdf;
590 ctrl->iobase = pci_config_readl(bdf, PCI_BASE_ADDRESS_5);
591 ctrl->irq = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
592 dprintf(1, "AHCI controller at %02x.%x, iobase %x, irq %d\n",
593 bdf >> 3, bdf & 7, ctrl->iobase, ctrl->irq);
594
Kevin O'Connor7eb02222010-12-12 14:01:47 -0500595 pci_config_maskw(bdf, PCI_COMMAND, 0,
596 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
597
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100598 val = ahci_ctrl_readl(ctrl, HOST_CTL);
599 ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
600
601 ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
602 ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
603 dprintf(2, "AHCI: cap 0x%x, ports_impl 0x%x\n",
604 ctrl->caps, ctrl->ports);
605
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200606 max = ctrl->caps & 0x1f;
607 for (pnr = 0; pnr <= max; pnr++) {
608 if (!(ctrl->ports & (1 << pnr)))
609 continue;
610 port = ahci_port_alloc(ctrl, pnr);
611 if (port == NULL)
612 continue;
613 run_thread(ahci_port_detect, port);
614 }
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100615}
616
617// Locate and init ahci controllers.
618static void
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500619ahci_scan(void)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100620{
621 // Scan PCI bus for ATA adapters
Kevin O'Connor9cb49922011-06-20 22:22:42 -0400622 struct pci_device *pci;
623 foreachpci(pci) {
624 if (pci->class != PCI_CLASS_STORAGE_SATA)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100625 continue;
Kevin O'Connor9cb49922011-06-20 22:22:42 -0400626 if (pci->prog_if != 1 /* AHCI rev 1 */)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100627 continue;
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500628 ahci_controller_setup(pci);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100629 }
630}
631
632void
633ahci_setup(void)
634{
635 ASSERT32FLAT();
636 if (!CONFIG_AHCI)
637 return;
638
639 dprintf(3, "init ahci\n");
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500640 ahci_scan();
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100641}