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Kevin O'Connor30853762009-01-17 18:49:20 -05001// Code for misc 16bit handlers and variables.
2//
Kevin O'Connor2929c352009-07-25 13:48:27 -04003// Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor30853762009-01-17 18:49:20 -05004// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU LGPLv3 license.
7
8#include "bregs.h" // struct bregs
9#include "biosvar.h" // GET_BDA
10#include "util.h" // debug_enter
11#include "pic.h" // enable_hwirq
12
13// Amount of continuous ram under 4Gig
Kevin O'Connor372e0712009-09-09 09:51:31 -040014u32 RamSize VAR16VISIBLE;
Kevin O'Connor30853762009-01-17 18:49:20 -050015// Amount of continuous ram >4Gig
16u64 RamSizeOver4G;
Kevin O'Connordf2c19a2009-01-17 20:07:09 -050017// Space for bios tables built an run-time.
Kevin O'Connor372e0712009-09-09 09:51:31 -040018char BiosTableSpace[CONFIG_MAX_BIOSTABLE] __aligned(MALLOC_MIN_ALIGN) VAR16VISIBLE;
Kevin O'Connor30853762009-01-17 18:49:20 -050019
20
21/****************************************************************
22 * Misc 16bit ISRs
23 ****************************************************************/
24
25// INT 12h Memory Size Service Entry Point
26void VISIBLE16
27handle_12(struct bregs *regs)
28{
29 debug_enter(regs, DEBUG_HDL_12);
30 regs->ax = GET_BDA(mem_size_kb);
31}
32
33// INT 11h Equipment List Service Entry Point
34void VISIBLE16
35handle_11(struct bregs *regs)
36{
37 debug_enter(regs, DEBUG_HDL_11);
38 regs->ax = GET_BDA(equipment_list_flags);
39}
40
41// INT 05h Print Screen Service Entry Point
42void VISIBLE16
43handle_05(struct bregs *regs)
44{
45 debug_enter(regs, DEBUG_HDL_05);
46}
47
48// INT 10h Video Support Service Entry Point
49void VISIBLE16
50handle_10(struct bregs *regs)
51{
52 debug_enter(regs, DEBUG_HDL_10);
53 // dont do anything, since the VGA BIOS handles int10h requests
54}
55
Kevin O'Connor75f49b32009-03-07 00:07:24 -050056// NMI handler
Kevin O'Connor30853762009-01-17 18:49:20 -050057void VISIBLE16
Kevin O'Connor1297e5d2012-06-02 20:30:58 -040058handle_02(void)
Kevin O'Connor30853762009-01-17 18:49:20 -050059{
Kevin O'Connor1297e5d2012-06-02 20:30:58 -040060 debug_isr(DEBUG_ISR_02);
Kevin O'Connor30853762009-01-17 18:49:20 -050061}
62
63void
Kevin O'Connor1ca05b02010-01-03 17:43:37 -050064mathcp_setup(void)
Kevin O'Connor30853762009-01-17 18:49:20 -050065{
66 dprintf(3, "math cp init\n");
67 // 80x87 coprocessor installed
Kevin O'Connore51316d2012-06-10 09:09:22 -040068 set_equipment_flags(0x02, 0x02);
Kevin O'Connorcc9e1bf2010-07-28 21:31:38 -040069 enable_hwirq(13, FUNC16(entry_75));
Kevin O'Connor30853762009-01-17 18:49:20 -050070}
71
72// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
73void VISIBLE16
Kevin O'Connor1297e5d2012-06-02 20:30:58 -040074handle_75(void)
Kevin O'Connor30853762009-01-17 18:49:20 -050075{
Kevin O'Connor1297e5d2012-06-02 20:30:58 -040076 debug_isr(DEBUG_ISR_75);
Kevin O'Connor30853762009-01-17 18:49:20 -050077
78 // clear irq13
79 outb(0, PORT_MATH_CLEAR);
80 // clear interrupt
81 eoi_pic2();
82 // legacy nmi call
Kevin O'Connorecdc6552012-05-28 14:25:15 -040083 struct bregs br;
84 memset(&br, 0, sizeof(br));
85 br.flags = F_IF;
86 call16_int(0x02, &br);
Kevin O'Connor30853762009-01-17 18:49:20 -050087}
88
89
90/****************************************************************
91 * BIOS_CONFIG_TABLE
92 ****************************************************************/
93
94// DMA channel 3 used by hard disk BIOS
95#define CBT_F1_DMA3USED (1<<7)
96// 2nd interrupt controller (8259) installed
97#define CBT_F1_2NDPIC (1<<6)
98// Real-Time Clock installed
99#define CBT_F1_RTC (1<<5)
100// INT 15/AH=4Fh called upon INT 09h
101#define CBT_F1_INT154F (1<<4)
102// wait for external event (INT 15/AH=41h) supported
103#define CBT_F1_WAITEXT (1<<3)
104// extended BIOS area allocated (usually at top of RAM)
105#define CBT_F1_EBDA (1<<2)
106// bus is Micro Channel instead of ISA
107#define CBT_F1_MCA (1<<1)
108// system has dual bus (Micro Channel + ISA)
109#define CBT_F1_MCAISA (1<<0)
110
111// INT 16/AH=09h (keyboard functionality) supported
112#define CBT_F2_INT1609 (1<<6)
113
114struct bios_config_table_s BIOS_CONFIG_TABLE VAR16FIXED(0xe6f5) = {
115 .size = sizeof(BIOS_CONFIG_TABLE) - 2,
116 .model = CONFIG_MODEL_ID,
117 .submodel = CONFIG_SUBMODEL_ID,
118 .biosrev = CONFIG_BIOS_REVISION,
119 .feature1 = (
120 CBT_F1_2NDPIC | CBT_F1_RTC | CBT_F1_EBDA
121 | (CONFIG_KBD_CALL_INT15_4F ? CBT_F1_INT154F : 0)),
122 .feature2 = CBT_F2_INT1609,
123 .feature3 = 0,
124 .feature4 = 0,
125 .feature5 = 0,
126};
127
128
129/****************************************************************
130 * GDT and IDT tables
131 ****************************************************************/
132
Kevin O'Connor30853762009-01-17 18:49:20 -0500133// Real mode IDT descriptor
Kevin O'Connor372e0712009-09-09 09:51:31 -0400134struct descloc_s rmode_IDT_info VAR16VISIBLE = {
Kevin O'Connor30853762009-01-17 18:49:20 -0500135 .length = sizeof(struct rmode_IVT) - 1,
Kevin O'Connor35ae7262009-01-19 15:44:44 -0500136 .addr = (u32)MAKE_FLATPTR(SEG_IVT, 0),
Kevin O'Connor30853762009-01-17 18:49:20 -0500137};
138
139// Dummy IDT that forces a machine shutdown if an irq happens in
140// protected mode.
Kevin O'Connor372e0712009-09-09 09:51:31 -0400141u8 dummy_IDT VAR16VISIBLE;
Kevin O'Connor30853762009-01-17 18:49:20 -0500142
143// Protected mode IDT descriptor
Kevin O'Connor372e0712009-09-09 09:51:31 -0400144struct descloc_s pmode_IDT_info VAR16VISIBLE = {
Kevin O'Connor30853762009-01-17 18:49:20 -0500145 .length = sizeof(dummy_IDT) - 1,
Kevin O'Connor35ae7262009-01-19 15:44:44 -0500146 .addr = (u32)MAKE_FLATPTR(SEG_BIOS, &dummy_IDT),
Kevin O'Connor30853762009-01-17 18:49:20 -0500147};
148
149// GDT
Kevin O'Connor372e0712009-09-09 09:51:31 -0400150u64 rombios32_gdt[] VAR16VISIBLE __aligned(8) = {
Kevin O'Connor30853762009-01-17 18:49:20 -0500151 // First entry can't be used.
152 0x0000000000000000LL,
153 // 32 bit flat code segment (SEG32_MODE32_CS)
Kevin O'Connorae6924d2010-07-25 14:46:21 -0400154 GDT_GRANLIMIT(0xffffffff) | GDT_CODE | GDT_B,
Kevin O'Connor30853762009-01-17 18:49:20 -0500155 // 32 bit flat data segment (SEG32_MODE32_DS)
Kevin O'Connorae6924d2010-07-25 14:46:21 -0400156 GDT_GRANLIMIT(0xffffffff) | GDT_DATA | GDT_B,
Kevin O'Connor30853762009-01-17 18:49:20 -0500157 // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
Kevin O'Connor643062f2010-01-04 20:48:20 -0500158 GDT_LIMIT(BUILD_BIOS_SIZE-1) | GDT_CODE | GDT_BASE(BUILD_BIOS_ADDR),
Kevin O'Connor30853762009-01-17 18:49:20 -0500159 // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
Kevin O'Connoreaa2e552009-08-10 00:03:04 -0400160 GDT_LIMIT(0x0ffff) | GDT_DATA,
Kevin O'Connor0f788892010-07-25 14:04:01 -0400161 // 16 bit code segment base=0xf0000 limit=0xffffffff (SEG32_MODE16BIG_CS)
Kevin O'Connorae6924d2010-07-25 14:46:21 -0400162 GDT_GRANLIMIT(0xffffffff) | GDT_CODE | GDT_BASE(BUILD_BIOS_ADDR),
Kevin O'Connor30853762009-01-17 18:49:20 -0500163 // 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
Kevin O'Connorae6924d2010-07-25 14:46:21 -0400164 GDT_GRANLIMIT(0xffffffff) | GDT_DATA,
Kevin O'Connor30853762009-01-17 18:49:20 -0500165};
166
167// GDT descriptor
Kevin O'Connor372e0712009-09-09 09:51:31 -0400168struct descloc_s rombios32_gdt_48 VAR16VISIBLE = {
Kevin O'Connor30853762009-01-17 18:49:20 -0500169 .length = sizeof(rombios32_gdt) - 1,
Kevin O'Connor35ae7262009-01-19 15:44:44 -0500170 .addr = (u32)MAKE_FLATPTR(SEG_BIOS, rombios32_gdt),
Kevin O'Connor30853762009-01-17 18:49:20 -0500171};
172
173
174/****************************************************************
175 * Misc fixed vars
176 ****************************************************************/
177
178char BiosCopyright[] VAR16FIXED(0xff00) =
179 "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team.";
180
181// BIOS build date
182char BiosDate[] VAR16FIXED(0xfff5) = "06/23/99";
183
184u8 BiosModelId VAR16FIXED(0xfffe) = CONFIG_MODEL_ID;
185
186u8 BiosChecksum VAR16FIXED(0xffff);
187
188// XXX - Initial Interrupt Vector Offsets Loaded by POST
189u8 InitVectors[13] VAR16FIXED(0xfef3);
190
191// XXX - INT 1D - SYSTEM DATA - VIDEO PARAMETER TABLES
192u8 VideoParams[88] VAR16FIXED(0xf0a4);