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Kevin O'Connor0525d292008-07-04 06:18:30 -04001// Initialize PCI devices (on emulators)
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2006 Fabrice Bellard
5//
Kevin O'Connorb1b7c2a2009-01-15 20:52:58 -05006// This file may be distributed under the terms of the GNU LGPLv3 license.
Kevin O'Connor0525d292008-07-04 06:18:30 -04007
8#include "util.h" // dprintf
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -05009#include "pci.h" // pci_config_readl
Kevin O'Connor9521e262008-07-04 13:04:29 -040010#include "biosvar.h" // GET_EBDA
Kevin O'Connor2ed2f582008-11-08 15:53:36 -050011#include "pci_ids.h" // PCI_VENDOR_ID_INTEL
12#include "pci_regs.h" // PCI_COMMAND
Kevin O'Connor0525d292008-07-04 06:18:30 -040013
Kevin O'Connor0525d292008-07-04 06:18:30 -040014#define PCI_ROM_SLOT 6
15#define PCI_NUM_REGIONS 7
16
Kevin O'Connor0525d292008-07-04 06:18:30 -040017static u32 pci_bios_io_addr;
18static u32 pci_bios_mem_addr;
19static u32 pci_bios_bigmem_addr;
20/* host irqs corresponding to PCI irqs A-D */
Kevin O'Connor7061eb62009-01-04 21:48:22 -050021static u8 pci_irqs[4] = {
22#if CONFIG_KVM
23 10, 10, 11, 11
24#else
25 11, 9, 11, 9
26#endif
27};
Kevin O'Connor0525d292008-07-04 06:18:30 -040028
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050029static void pci_set_io_region_addr(u16 bdf, int region_num, u32 addr)
Kevin O'Connor0525d292008-07-04 06:18:30 -040030{
31 u16 cmd;
32 u32 ofs, old_addr;
33
Kevin O'Connor9649a962008-12-10 20:53:35 -050034 if (region_num == PCI_ROM_SLOT) {
35 ofs = PCI_ROM_ADDRESS;
36 } else {
37 ofs = PCI_BASE_ADDRESS_0 + region_num * 4;
Kevin O'Connor0525d292008-07-04 06:18:30 -040038 }
39
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050040 old_addr = pci_config_readl(bdf, ofs);
Kevin O'Connor0525d292008-07-04 06:18:30 -040041
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050042 pci_config_writel(bdf, ofs, addr);
Kevin O'Connor0525d292008-07-04 06:18:30 -040043 dprintf(1, "region %d: 0x%08x\n", region_num, addr);
44
45 /* enable memory mappings */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050046 cmd = pci_config_readw(bdf, PCI_COMMAND);
Kevin O'Connor9649a962008-12-10 20:53:35 -050047 if (region_num == PCI_ROM_SLOT)
48 cmd |= PCI_COMMAND_MEMORY;
49 else if (old_addr & PCI_BASE_ADDRESS_SPACE_IO)
50 cmd |= PCI_COMMAND_IO;
Kevin O'Connor0525d292008-07-04 06:18:30 -040051 else
Kevin O'Connor9649a962008-12-10 20:53:35 -050052 cmd |= PCI_COMMAND_MEMORY;
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050053 pci_config_writew(bdf, PCI_COMMAND, cmd);
Kevin O'Connor0525d292008-07-04 06:18:30 -040054}
55
56/* return the global irq number corresponding to a given device irq
57 pin. We could also use the bus number to have a more precise
58 mapping. */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050059static int pci_slot_get_pirq(u16 bdf, int irq_num)
Kevin O'Connor0525d292008-07-04 06:18:30 -040060{
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050061 int slot_addend = pci_bdf_to_dev(bdf) - 1;
Kevin O'Connor0525d292008-07-04 06:18:30 -040062 return (irq_num + slot_addend) & 3;
63}
64
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050065static void pci_bios_init_bridges(u16 bdf)
Kevin O'Connor0525d292008-07-04 06:18:30 -040066{
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050067 u16 vendor_id = pci_config_readw(bdf, PCI_VENDOR_ID);
68 u16 device_id = pci_config_readw(bdf, PCI_DEVICE_ID);
Kevin O'Connor0525d292008-07-04 06:18:30 -040069
Kevin O'Connor415c2dc2008-10-25 14:35:59 -040070 if (vendor_id == PCI_VENDOR_ID_INTEL
Kevin O'Connor2f840e32008-10-25 15:23:23 -040071 && (device_id == PCI_DEVICE_ID_INTEL_82371SB_0
72 || device_id == PCI_DEVICE_ID_INTEL_82371AB_0)) {
Kevin O'Connor0525d292008-07-04 06:18:30 -040073 int i, irq;
74 u8 elcr[2];
75
Kevin O'Connor2f840e32008-10-25 15:23:23 -040076 /* PIIX3/PIIX4 PCI to ISA bridge */
Kevin O'Connor0525d292008-07-04 06:18:30 -040077
78 elcr[0] = 0x00;
79 elcr[1] = 0x00;
80 for(i = 0; i < 4; i++) {
81 irq = pci_irqs[i];
82 /* set to trigger level */
83 elcr[irq >> 3] |= (1 << (irq & 7));
84 /* activate irq remapping in PIIX */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050085 pci_config_writeb(bdf, 0x60 + i, irq);
Kevin O'Connor0525d292008-07-04 06:18:30 -040086 }
87 outb(elcr[0], 0x4d0);
88 outb(elcr[1], 0x4d1);
Kevin O'Connor2f840e32008-10-25 15:23:23 -040089 dprintf(1, "PIIX3/PIIX4 init: elcr=%02x %02x\n",
Kevin O'Connor0525d292008-07-04 06:18:30 -040090 elcr[0], elcr[1]);
91 }
92}
93
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -050094static void pci_bios_init_device(u16 bdf)
Kevin O'Connor0525d292008-07-04 06:18:30 -040095{
96 int class;
97 u32 *paddr;
98 int i, pin, pic_irq, vendor_id, device_id;
99
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500100 class = pci_config_readw(bdf, PCI_CLASS_DEVICE);
101 vendor_id = pci_config_readw(bdf, PCI_VENDOR_ID);
102 device_id = pci_config_readw(bdf, PCI_DEVICE_ID);
103 dprintf(1, "PCI: bus=%d devfn=0x%02x: vendor_id=0x%04x device_id=0x%04x\n"
104 , pci_bdf_to_bus(bdf), pci_bdf_to_devfn(bdf), vendor_id, device_id);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400105 switch(class) {
Kevin O'Connor9649a962008-12-10 20:53:35 -0500106 case PCI_CLASS_STORAGE_IDE:
Kevin O'Connor415c2dc2008-10-25 14:35:59 -0400107 if (vendor_id == PCI_VENDOR_ID_INTEL
Kevin O'Connor2f840e32008-10-25 15:23:23 -0400108 && (device_id == PCI_DEVICE_ID_INTEL_82371SB_1
109 || device_id == PCI_DEVICE_ID_INTEL_82371AB)) {
110 /* PIIX3/PIIX4 IDE */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500111 pci_config_writew(bdf, 0x40, 0x8000); // enable IDE0
112 pci_config_writew(bdf, 0x42, 0x8000); // enable IDE1
Kevin O'Connor0525d292008-07-04 06:18:30 -0400113 goto default_map;
114 } else {
115 /* IDE: we map it as in ISA mode */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500116 pci_set_io_region_addr(bdf, 0, 0x1f0);
117 pci_set_io_region_addr(bdf, 1, 0x3f4);
118 pci_set_io_region_addr(bdf, 2, 0x170);
119 pci_set_io_region_addr(bdf, 3, 0x374);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400120 }
121 break;
Kevin O'Connor9649a962008-12-10 20:53:35 -0500122 case PCI_CLASS_DISPLAY_VGA:
Kevin O'Connor0525d292008-07-04 06:18:30 -0400123 if (vendor_id != 0x1234)
124 goto default_map;
125 /* VGA: map frame buffer to default Bochs VBE address */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500126 pci_set_io_region_addr(bdf, 0, 0xE0000000);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400127 break;
Kevin O'Connor9649a962008-12-10 20:53:35 -0500128 case PCI_CLASS_SYSTEM_PIC:
Kevin O'Connor0525d292008-07-04 06:18:30 -0400129 /* PIC */
Kevin O'Connor415c2dc2008-10-25 14:35:59 -0400130 if (vendor_id == PCI_VENDOR_ID_IBM) {
Kevin O'Connor0525d292008-07-04 06:18:30 -0400131 /* IBM */
132 if (device_id == 0x0046 || device_id == 0xFFFF) {
133 /* MPIC & MPIC2 */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500134 pci_set_io_region_addr(bdf, 0, 0x80800000 + 0x00040000);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400135 }
136 }
137 break;
138 case 0xff00:
Kevin O'Connor415c2dc2008-10-25 14:35:59 -0400139 if (vendor_id == PCI_VENDOR_ID_APPLE &&
Kevin O'Connor0525d292008-07-04 06:18:30 -0400140 (device_id == 0x0017 || device_id == 0x0022)) {
141 /* macio bridge */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500142 pci_set_io_region_addr(bdf, 0, 0x80800000);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400143 }
144 break;
145 default:
146 default_map:
147 /* default memory mappings */
Kevin O'Connor9649a962008-12-10 20:53:35 -0500148 for (i = 0; i < PCI_NUM_REGIONS; i++) {
Kevin O'Connor0525d292008-07-04 06:18:30 -0400149 int ofs;
Kevin O'Connore06363e2008-08-29 21:12:03 -0400150 u32 val, size;
Kevin O'Connor0525d292008-07-04 06:18:30 -0400151
152 if (i == PCI_ROM_SLOT)
Kevin O'Connor9649a962008-12-10 20:53:35 -0500153 ofs = PCI_ROM_ADDRESS;
Kevin O'Connor0525d292008-07-04 06:18:30 -0400154 else
Kevin O'Connor9649a962008-12-10 20:53:35 -0500155 ofs = PCI_BASE_ADDRESS_0 + i * 4;
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500156 pci_config_writel(bdf, ofs, 0xffffffff);
157 val = pci_config_readl(bdf, ofs);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400158 if (val != 0) {
159 size = (~(val & ~0xf)) + 1;
Kevin O'Connor9649a962008-12-10 20:53:35 -0500160 if (val & PCI_BASE_ADDRESS_SPACE_IO)
Kevin O'Connor0525d292008-07-04 06:18:30 -0400161 paddr = &pci_bios_io_addr;
162 else if (size >= 0x04000000)
163 paddr = &pci_bios_bigmem_addr;
164 else
165 paddr = &pci_bios_mem_addr;
Kevin O'Connore06363e2008-08-29 21:12:03 -0400166 *paddr = ALIGN(*paddr, size);
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500167 pci_set_io_region_addr(bdf, i, *paddr);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400168 *paddr += size;
169 }
170 }
171 break;
172 }
173
174 /* map the interrupt */
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500175 pin = pci_config_readb(bdf, PCI_INTERRUPT_PIN);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400176 if (pin != 0) {
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500177 pin = pci_slot_get_pirq(bdf, pin - 1);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400178 pic_irq = pci_irqs[pin];
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500179 pci_config_writeb(bdf, PCI_INTERRUPT_LINE, pic_irq);
Kevin O'Connor0525d292008-07-04 06:18:30 -0400180 }
181
Kevin O'Connor415c2dc2008-10-25 14:35:59 -0400182 if (vendor_id == PCI_VENDOR_ID_INTEL
183 && device_id == PCI_DEVICE_ID_INTEL_82371AB_3) {
Kevin O'Connor0525d292008-07-04 06:18:30 -0400184 /* PIIX4 Power Management device (for ACPI) */
Kevin O'Connor7061eb62009-01-04 21:48:22 -0500185
186 if (CONFIG_KVM)
187 // acpi sci is hardwired to 9
188 pci_config_writeb(bdf, PCI_INTERRUPT_LINE, 9);
189
Kevin O'Connore682cbc2008-12-06 23:11:56 -0500190 pci_config_writel(bdf, 0x40, PORT_ACPI_PM_BASE | 1);
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500191 pci_config_writeb(bdf, 0x80, 0x01); /* enable PM io space */
Kevin O'Connore682cbc2008-12-06 23:11:56 -0500192 pci_config_writel(bdf, 0x90, PORT_SMB_BASE | 1);
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500193 pci_config_writeb(bdf, 0xd2, 0x09); /* enable SMBus io space */
Kevin O'Connor0525d292008-07-04 06:18:30 -0400194 }
195}
196
Kevin O'Connor0525d292008-07-04 06:18:30 -0400197void
198pci_bios_setup(void)
199{
200 if (CONFIG_COREBOOT)
201 // Already done by coreboot.
202 return;
203
204 pci_bios_io_addr = 0xc000;
205 pci_bios_mem_addr = 0xf0000000;
Kevin O'Connore7916362008-12-28 22:03:17 -0500206 pci_bios_bigmem_addr = RamSize;
Kevin O'Connor0525d292008-07-04 06:18:30 -0400207 if (pci_bios_bigmem_addr < 0x90000000)
208 pci_bios_bigmem_addr = 0x90000000;
209
Kevin O'Connore6338322008-11-29 20:31:49 -0500210 int bdf, max;
Kevin O'Connor4132e022008-12-04 19:39:10 -0500211 foreachpci(bdf, max) {
Kevin O'Connore6338322008-11-29 20:31:49 -0500212 pci_bios_init_bridges(bdf);
213 }
Kevin O'Connor4132e022008-12-04 19:39:10 -0500214 foreachpci(bdf, max) {
Kevin O'Connore6338322008-11-29 20:31:49 -0500215 pci_bios_init_device(bdf);
216 }
Kevin O'Connor0525d292008-07-04 06:18:30 -0400217}