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Kevin O'Connorf076a3e2008-02-25 22:25:15 -05001// 16bit system callbacks
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU GPLv3 license.
7
8#include "util.h" // irq_restore
9#include "biosvar.h" // CONFIG_BIOS_TABLE
10#include "ioport.h" // inb
11#include "cmos.h" // inb_cmos
12
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050013// Use PS2 System Control port A to set A20 enable
14static inline u8
15set_a20(u8 cond)
16{
17 // get current setting first
18 u8 newval, oldval = inb(PORT_A20);
19 if (cond)
20 newval = oldval | 0x02;
21 else
22 newval = oldval & ~0x02;
23 outb(newval, PORT_A20);
24
25 return (newval & 0x02) != 0;
26}
27
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050028static void
29handle_152400(struct bregs *regs)
30{
31 set_a20(0);
32 handle_ret(regs, 0);
33}
34
35static void
36handle_152401(struct bregs *regs)
37{
38 set_a20(1);
39 handle_ret(regs, 0);
40}
41
42static void
43handle_152402(struct bregs *regs)
44{
45 regs->al = !!(inb(PORT_A20) & 0x20);
46 handle_ret(regs, 0);
47}
48
49static void
50handle_152403(struct bregs *regs)
51{
52 regs->bx = 3;
53 handle_ret(regs, 0);
54}
55
56static void
57handle_1524XX(struct bregs *regs)
58{
59 handle_ret(regs, RET_EUNSUPPORTED);
60}
61
62// removable media eject
63static void
64handle_1552(struct bregs *regs)
65{
66 handle_ret(regs, 0);
67}
68
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050069static void
Kevin O'Connorbdce35f2008-02-26 21:33:14 -050070handle_1553(struct bregs *regs)
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050071{
Kevin O'Connorbdce35f2008-02-26 21:33:14 -050072 // XXX - APM call
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050073 handle_ret(regs, RET_EUNSUPPORTED);
74}
75
76// Sleep for n microseconds. currently using the
77// refresh request port 0x61 bit4, toggling every 15usec
78static void
79usleep(u32 count)
80{
81 count = count / 15;
82 u8 kbd = inb(PORT_KBD_CTRLB);
83 while (count)
84 if ((inb(PORT_KBD_CTRLB) ^ kbd) & KBD_REFRESH)
85 count--;
86}
87
88// Wait for CX:DX microseconds. currently using the
89// refresh request port 0x61 bit4, toggling every 15usec
90static void
91handle_1586(struct bregs *regs)
92{
93 irq_enable();
94 usleep((regs->cx << 16) | regs->dx);
95 irq_disable();
96}
97
98static void
99handle_1587(struct bregs *regs)
100{
101 // +++ should probably have descriptor checks
102 // +++ should have exception handlers
103
104 // turn off interrupts
105 unsigned long flags = irq_save();
106
107 u8 prev_a20_enable = set_a20(1); // enable A20 line
108
109 // 128K max of transfer on 386+ ???
110 // source == destination ???
111
112 // ES:SI points to descriptor table
113 // offset use initially comments
114 // ==============================================
115 // 00..07 Unused zeros Null descriptor
116 // 08..0f GDT zeros filled in by BIOS
117 // 10..17 source ssssssss source of data
118 // 18..1f dest dddddddd destination of data
119 // 20..27 CS zeros filled in by BIOS
120 // 28..2f SS zeros filled in by BIOS
121
122 //es:si
123 //eeee0
124 //0ssss
125 //-----
126
127// check for access rights of source & dest here
128
129 // Initialize GDT descriptor
130 u16 si = regs->si;
131 u16 base15_00 = (regs->es << 4) + si;
132 u16 base23_16 = regs->es >> 12;
133 if (base15_00 < (regs->es<<4))
134 base23_16++;
135 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
136 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
137 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
138 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
139 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
140
141 // Initialize CS descriptor
142 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
143 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
144 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
145 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
146 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
147
148 // Initialize SS descriptor
149 u16 ss = GET_SEG(SS);
150 base15_00 = ss << 4;
151 base23_16 = ss >> 12;
152 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
153 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
154 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
155 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
156 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
157
158 asm volatile(
159 // Save registers
160 "pushw %%ds\n"
161 "pushw %%es\n"
162 "pushal\n"
163
164 // Load new descriptor tables
165 "lgdt %%es:(%1)\n"
166 "lidt %%cs:pmode_IDT_info\n"
167
168 // set PE bit in CR0
169 "movl %%cr0, %%eax\n"
170 "orb $0x01, %%al\n"
171 "movl %%eax, %%cr0\n"
172
173 // far jump to flush CPU queue after transition to protected mode
174 "ljmpw $0xf000, $1f\n"
175 "1:\n"
176
177 // GDT points to valid descriptor table, now load DS, ES
178 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
179 "movw %%ax, %%ds\n"
180 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
181 "movw %%ax, %%es\n"
182
183 // move CX words from DS:SI to ES:DI
184 "xorw %%si, %%si\n"
185 "xorw %%di, %%di\n"
186 "cld\n"
187 "rep movsw\n"
188
189 // reset PG bit in CR0 ???
190 "movl %%cr0, %%eax\n"
191 "andb $0xfe, %%al\n"
192 "movl %%eax, %%cr0\n"
193
194 // far jump to flush CPU queue after transition to real mode
195 "ljmpw $0xf000, $2f\n"
196 "2:\n"
197
198 // restore IDT to normal real-mode defaults
199 "lidt %%cs:rmode_IDT_info\n"
200
201 // restore regisers
202 "popal\n"
203 "popw %%es\n"
204 "popw %%ds\n" : : "c" (regs->cx), "r" (si + 8));
205
206 set_a20(prev_a20_enable);
207
208 irq_restore(flags);
209
210 handle_ret(regs, 0);
211}
212
213// Get the amount of extended memory (above 1M)
214static void
215handle_1588(struct bregs *regs)
216{
217 regs->al = inb_cmos(CMOS_EXTMEM_LOW);
218 regs->ah = inb_cmos(CMOS_EXTMEM_HIGH);
219 // According to Ralf Brown's interrupt the limit should be 15M,
220 // but real machines mostly return max. 63M.
221 if (regs->ax > 0xffc0)
222 regs->ax = 0xffc0;
223 set_cf(regs, 0);
224}
225
226// Device busy interrupt. Called by Int 16h when no key available
227static void
228handle_1590(struct bregs *regs)
229{
230}
231
232// Interrupt complete. Called by Int 16h when key becomes available
233static void
234handle_1591(struct bregs *regs)
235{
236}
237
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500238// keyboard intercept
239static void
240handle_154f(struct bregs *regs)
241{
242 set_cf(regs, 1);
243}
244
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500245static void
246handle_15c0(struct bregs *regs)
247{
248 regs->es = SEG_BIOS;
249 regs->bx = (u16)&BIOS_CONFIG_TABLE;
250}
251
252static void
253handle_15c1(struct bregs *regs)
254{
255 regs->es = GET_BDA(ebda_seg);
256 set_cf(regs, 0);
257}
258
259static void
260handle_15e801(struct bregs *regs)
261{
262 // my real system sets ax and bx to 0
263 // this is confirmed by Ralph Brown list
264 // but syslinux v1.48 is known to behave
265 // strangely if ax is set to 0
266 // regs.u.r16.ax = 0;
267 // regs.u.r16.bx = 0;
268
269 // Get the amount of extended memory (above 1M)
270 regs->cl = inb_cmos(CMOS_EXTMEM_LOW);
271 regs->ch = inb_cmos(CMOS_EXTMEM_HIGH);
272
273 // limit to 15M
274 if (regs->cx > 0x3c00)
275 regs->cx = 0x3c00;
276
277 // Get the amount of extended memory above 16M in 64k blocs
278 regs->dl = inb_cmos(CMOS_EXTMEM2_LOW);
279 regs->dh = inb_cmos(CMOS_EXTMEM2_HIGH);
280
281 // Set configured memory equal to extended memory
282 regs->ax = regs->cx;
283 regs->bx = regs->dx;
284
285 set_cf(regs, 0);
286}
287
288#define ACPI_DATA_SIZE 0x00010000L
289
290static void
291set_e820_range(u16 DI, u32 start, u32 end, u16 type)
292{
293 SET_VAR(ES, *(u16*)(DI+0), start);
294 SET_VAR(ES, *(u16*)(DI+2), start >> 16);
295 SET_VAR(ES, *(u16*)(DI+4), 0x00);
296 SET_VAR(ES, *(u16*)(DI+6), 0x00);
297
298 end -= start;
299 SET_VAR(ES, *(u16*)(DI+8), end);
300 SET_VAR(ES, *(u16*)(DI+10), end >> 16);
301 SET_VAR(ES, *(u16*)(DI+12), 0x0000);
302 SET_VAR(ES, *(u16*)(DI+14), 0x0000);
303
304 SET_VAR(ES, *(u16*)(DI+16), type);
305 SET_VAR(ES, *(u16*)(DI+18), 0x0);
306}
307
308// XXX - should create e820 memory map in post and just copy it here.
309static void
310handle_15e820(struct bregs *regs)
311{
312 if (regs->edx != 0x534D4150) {
313 handle_ret(regs, RET_EUNSUPPORTED);
314 return;
315 }
316
317 u32 extended_memory_size = inb_cmos(CMOS_EXTMEM2_HIGH);
318 extended_memory_size <<= 8;
319 extended_memory_size |= inb_cmos(CMOS_EXTMEM2_LOW);
320 extended_memory_size *= 64;
321 // greater than EFF00000???
322 if (extended_memory_size > 0x3bc000)
323 // everything after this is reserved memory until we get to 0x100000000
324 extended_memory_size = 0x3bc000;
325 extended_memory_size *= 1024;
326 extended_memory_size += (16L * 1024 * 1024);
327
328 if (extended_memory_size <= (16L * 1024 * 1024)) {
329 extended_memory_size = inb_cmos(CMOS_EXTMEM_HIGH);
330 extended_memory_size <<= 8;
331 extended_memory_size |= inb_cmos(CMOS_EXTMEM_LOW);
332 extended_memory_size *= 1024;
333 }
334
335 switch (regs->bx) {
336 case 0:
337 set_e820_range(regs->di, 0x0000000L, 0x0009fc00L, 1);
338 regs->ebx = 1;
339 regs->eax = 0x534D4150;
340 regs->ecx = 0x14;
341 set_cf(regs, 0);
342 break;
343 case 1:
344 set_e820_range(regs->di, 0x0009fc00L, 0x000a0000L, 2);
345 regs->ebx = 2;
346 regs->eax = 0x534D4150;
347 regs->ecx = 0x14;
348 set_cf(regs, 0);
349 break;
350 case 2:
351 set_e820_range(regs->di, 0x000e8000L, 0x00100000L, 2);
352 regs->ebx = 3;
353 regs->eax = 0x534D4150;
354 regs->ecx = 0x14;
355 set_cf(regs, 0);
356 break;
357 case 3:
358 set_e820_range(regs->di, 0x00100000L,
359 extended_memory_size - ACPI_DATA_SIZE, 1);
360 regs->ebx = 4;
361 regs->eax = 0x534D4150;
362 regs->ecx = 0x14;
363 set_cf(regs, 0);
364 break;
365 case 4:
366 set_e820_range(regs->di,
367 extended_memory_size - ACPI_DATA_SIZE,
368 extended_memory_size, 3); // ACPI RAM
369 regs->ebx = 5;
370 regs->eax = 0x534D4150;
371 regs->ecx = 0x14;
372 set_cf(regs, 0);
373 break;
374 case 5:
375 /* 256KB BIOS area at the end of 4 GB */
376 set_e820_range(regs->di, 0xfffc0000L, 0x00000000L, 2);
377 regs->ebx = 0;
378 regs->eax = 0x534D4150;
379 regs->ecx = 0x14;
380 set_cf(regs, 0);
381 break;
382 default: /* AX=E820, DX=534D4150, BX unrecognized */
383 handle_ret(regs, RET_EUNSUPPORTED);
384 }
385}
386
387static void
388handle_15e8XX(struct bregs *regs)
389{
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500390 handle_ret(regs, RET_EUNSUPPORTED);
391}
392
393static void
394handle_15XX(struct bregs *regs)
395{
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500396 handle_ret(regs, RET_EUNSUPPORTED);
397}
398
399// INT 15h System Services Entry Point
400void VISIBLE
401handle_15(struct bregs *regs)
402{
403 debug_enter(regs);
404 switch (regs->ah) {
405 case 0x24:
406 switch (regs->al) {
407 case 0x00: handle_152400(regs); break;
408 case 0x01: handle_152401(regs); break;
409 case 0x02: handle_152402(regs); break;
410 case 0x03: handle_152403(regs); break;
411 default: handle_1524XX(regs); break;
412 }
413 break;
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500414 case 0x4f: handle_154f(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500415 case 0x52: handle_1552(regs); break;
Kevin O'Connorbdce35f2008-02-26 21:33:14 -0500416 case 0x53: handle_1553(regs); break;
417 case 0x83: handle_1583(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500418 case 0x86: handle_1586(regs); break;
419 case 0x87: handle_1587(regs); break;
420 case 0x88: handle_1588(regs); break;
421 case 0x90: handle_1590(regs); break;
422 case 0x91: handle_1591(regs); break;
423 case 0xc0: handle_15c0(regs); break;
424 case 0xc1: handle_15c1(regs); break;
425 case 0xc2: handle_15c2(regs); break;
426 case 0xe8:
427 switch (regs->al) {
428 case 0x01: handle_15e801(regs); break;
429 case 0x20: handle_15e820(regs); break;
430 default: handle_15e8XX(regs); break;
431 }
432 break;
433 default: handle_15XX(regs); break;
434 }
435 debug_exit(regs);
436}
437
438// INT 12h Memory Size Service Entry Point
439void VISIBLE
440handle_12(struct bregs *regs)
441{
442 debug_enter(regs);
443 regs->ax = GET_BDA(mem_size_kb);
444 debug_exit(regs);
445}
446
447// INT 11h Equipment List Service Entry Point
448void VISIBLE
449handle_11(struct bregs *regs)
450{
451 debug_enter(regs);
452 regs->ax = GET_BDA(equipment_list_flags);
453 debug_exit(regs);
454}
455
456// INT 05h Print Screen Service Entry Point
457void VISIBLE
458handle_05(struct bregs *regs)
459{
460 debug_enter(regs);
461}
462
463// INT 10h Video Support Service Entry Point
464void VISIBLE
465handle_10(struct bregs *regs)
466{
467 debug_enter(regs);
468 // dont do anything, since the VGA BIOS handles int10h requests
469}
470
471void VISIBLE
472handle_nmi(struct bregs *regs)
473{
474 debug_enter(regs);
475 // XXX
476}
477
478// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
479void VISIBLE
480handle_75(struct bregs *regs)
481{
482 debug_enter(regs);
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500483
484 // clear irq13
485 outb(0, PORT_MATH_CLEAR);
486 // clear interrupt
487 eoi_both_pics();
488 // legacy nmi call
489 struct bregs br;
490 memset(&br, 0, sizeof(br));
491 call16_int(0x02, &br);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500492}