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Kevin O'Connor30853762009-01-17 18:49:20 -05001// Code for misc 16bit handlers and variables.
2//
Kevin O'Connor2929c352009-07-25 13:48:27 -04003// Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor30853762009-01-17 18:49:20 -05004// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU LGPLv3 license.
7
8#include "bregs.h" // struct bregs
9#include "biosvar.h" // GET_BDA
10#include "util.h" // debug_enter
11#include "pic.h" // enable_hwirq
12
13// Amount of continuous ram under 4Gig
14u32 RamSize VAR16_32;
15// Amount of continuous ram >4Gig
16u64 RamSizeOver4G;
Kevin O'Connordf2c19a2009-01-17 20:07:09 -050017// Space for bios tables built an run-time.
Kevin O'Connor0bf92702009-08-01 11:45:37 -040018char BiosTableSpace[CONFIG_MAX_BIOSTABLE] __aligned(MALLOC_MIN_ALIGN) VAR16_32;
Kevin O'Connor30853762009-01-17 18:49:20 -050019
20
21/****************************************************************
22 * Misc 16bit ISRs
23 ****************************************************************/
24
25// INT 12h Memory Size Service Entry Point
26void VISIBLE16
27handle_12(struct bregs *regs)
28{
29 debug_enter(regs, DEBUG_HDL_12);
30 regs->ax = GET_BDA(mem_size_kb);
31}
32
33// INT 11h Equipment List Service Entry Point
34void VISIBLE16
35handle_11(struct bregs *regs)
36{
37 debug_enter(regs, DEBUG_HDL_11);
38 regs->ax = GET_BDA(equipment_list_flags);
39}
40
41// INT 05h Print Screen Service Entry Point
42void VISIBLE16
43handle_05(struct bregs *regs)
44{
45 debug_enter(regs, DEBUG_HDL_05);
46}
47
48// INT 10h Video Support Service Entry Point
49void VISIBLE16
50handle_10(struct bregs *regs)
51{
52 debug_enter(regs, DEBUG_HDL_10);
53 // dont do anything, since the VGA BIOS handles int10h requests
54}
55
Kevin O'Connor75f49b32009-03-07 00:07:24 -050056// NMI handler
Kevin O'Connor30853762009-01-17 18:49:20 -050057void VISIBLE16
Kevin O'Connor75f49b32009-03-07 00:07:24 -050058handle_02()
Kevin O'Connor30853762009-01-17 18:49:20 -050059{
Kevin O'Connor75f49b32009-03-07 00:07:24 -050060 debug_isr(DEBUG_ISR_02);
Kevin O'Connor30853762009-01-17 18:49:20 -050061}
62
63void
64mathcp_setup()
65{
66 dprintf(3, "math cp init\n");
67 // 80x87 coprocessor installed
68 SETBITS_BDA(equipment_list_flags, 0x02);
69 enable_hwirq(13, entry_75);
70}
71
72// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
73void VISIBLE16
74handle_75()
75{
76 debug_isr(DEBUG_ISR_75);
77
78 // clear irq13
79 outb(0, PORT_MATH_CLEAR);
80 // clear interrupt
81 eoi_pic2();
82 // legacy nmi call
83 u32 eax=0, flags;
84 call16_simpint(0x02, &eax, &flags);
85}
86
87
88/****************************************************************
89 * BIOS_CONFIG_TABLE
90 ****************************************************************/
91
92// DMA channel 3 used by hard disk BIOS
93#define CBT_F1_DMA3USED (1<<7)
94// 2nd interrupt controller (8259) installed
95#define CBT_F1_2NDPIC (1<<6)
96// Real-Time Clock installed
97#define CBT_F1_RTC (1<<5)
98// INT 15/AH=4Fh called upon INT 09h
99#define CBT_F1_INT154F (1<<4)
100// wait for external event (INT 15/AH=41h) supported
101#define CBT_F1_WAITEXT (1<<3)
102// extended BIOS area allocated (usually at top of RAM)
103#define CBT_F1_EBDA (1<<2)
104// bus is Micro Channel instead of ISA
105#define CBT_F1_MCA (1<<1)
106// system has dual bus (Micro Channel + ISA)
107#define CBT_F1_MCAISA (1<<0)
108
109// INT 16/AH=09h (keyboard functionality) supported
110#define CBT_F2_INT1609 (1<<6)
111
112struct bios_config_table_s BIOS_CONFIG_TABLE VAR16FIXED(0xe6f5) = {
113 .size = sizeof(BIOS_CONFIG_TABLE) - 2,
114 .model = CONFIG_MODEL_ID,
115 .submodel = CONFIG_SUBMODEL_ID,
116 .biosrev = CONFIG_BIOS_REVISION,
117 .feature1 = (
118 CBT_F1_2NDPIC | CBT_F1_RTC | CBT_F1_EBDA
119 | (CONFIG_KBD_CALL_INT15_4F ? CBT_F1_INT154F : 0)),
120 .feature2 = CBT_F2_INT1609,
121 .feature3 = 0,
122 .feature4 = 0,
123 .feature5 = 0,
124};
125
126
127/****************************************************************
128 * GDT and IDT tables
129 ****************************************************************/
130
131struct descloc_s {
132 u16 length;
133 u32 addr;
134} PACKED;
135
136// Real mode IDT descriptor
137struct descloc_s rmode_IDT_info VAR16_32 = {
138 .length = sizeof(struct rmode_IVT) - 1,
Kevin O'Connor35ae7262009-01-19 15:44:44 -0500139 .addr = (u32)MAKE_FLATPTR(SEG_IVT, 0),
Kevin O'Connor30853762009-01-17 18:49:20 -0500140};
141
142// Dummy IDT that forces a machine shutdown if an irq happens in
143// protected mode.
144u8 dummy_IDT VAR16_32;
145
146// Protected mode IDT descriptor
147struct descloc_s pmode_IDT_info VAR16_32 = {
148 .length = sizeof(dummy_IDT) - 1,
Kevin O'Connor35ae7262009-01-19 15:44:44 -0500149 .addr = (u32)MAKE_FLATPTR(SEG_BIOS, &dummy_IDT),
Kevin O'Connor30853762009-01-17 18:49:20 -0500150};
151
152// GDT
153u64 rombios32_gdt[] VAR16_32 __aligned(8) = {
154 // First entry can't be used.
155 0x0000000000000000LL,
156 // 32 bit flat code segment (SEG32_MODE32_CS)
157 0x00cf9b000000ffffLL,
158 // 32 bit flat data segment (SEG32_MODE32_DS)
159 0x00cf93000000ffffLL,
160 // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
161 0x00009b0f0000ffffLL,
162 // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
163 0x000093000000ffffLL,
164 // 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS)
165 0x008f9b000000ffffLL,
166 // 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
167 0x008f93000000ffffLL,
168};
169
170// GDT descriptor
171struct descloc_s rombios32_gdt_48 VAR16_32 = {
172 .length = sizeof(rombios32_gdt) - 1,
Kevin O'Connor35ae7262009-01-19 15:44:44 -0500173 .addr = (u32)MAKE_FLATPTR(SEG_BIOS, rombios32_gdt),
Kevin O'Connor30853762009-01-17 18:49:20 -0500174};
175
176
177/****************************************************************
178 * Misc fixed vars
179 ****************************************************************/
180
181char BiosCopyright[] VAR16FIXED(0xff00) =
182 "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team.";
183
184// BIOS build date
185char BiosDate[] VAR16FIXED(0xfff5) = "06/23/99";
186
187u8 BiosModelId VAR16FIXED(0xfffe) = CONFIG_MODEL_ID;
188
189u8 BiosChecksum VAR16FIXED(0xffff);
190
191// XXX - Initial Interrupt Vector Offsets Loaded by POST
192u8 InitVectors[13] VAR16FIXED(0xfef3);
193
194// XXX - INT 1D - SYSTEM DATA - VIDEO PARAMETER TABLES
195u8 VideoParams[88] VAR16FIXED(0xf0a4);