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Stefan Bergerb310dfa2015-03-23 14:22:16 -04001#ifndef TCGBIOS_H
2#define TCGBIOS_H
3
4#include "types.h"
5
6#define TCG_MAGIC 0x41504354L
7
8/* Define for section 12.3 */
9#define TCG_PC_OK 0x0
10#define TCG_PC_TPMERROR 0x1
11#define TCG_PC_LOGOVERFLOW 0x2
12#define TCG_PC_UNSUPPORTED 0x3
13
14#define TPM_ALG_SHA 0x4
15
16#define TCG_MAGIC 0x41504354L
17#define TCG_VERSION_MAJOR 1
18#define TCG_VERSION_MINOR 2
19
20#define TPM_OK 0x0
21#define TPM_RET_BASE 0x1
22#define TCG_GENERAL_ERROR (TPM_RET_BASE + 0x0)
23#define TCG_TPM_IS_LOCKED (TPM_RET_BASE + 0x1)
24#define TCG_NO_RESPONSE (TPM_RET_BASE + 0x2)
25#define TCG_INVALID_RESPONSE (TPM_RET_BASE + 0x3)
26#define TCG_INVALID_ACCESS_REQUEST (TPM_RET_BASE + 0x4)
27#define TCG_FIRMWARE_ERROR (TPM_RET_BASE + 0x5)
28#define TCG_INTEGRITY_CHECK_FAILED (TPM_RET_BASE + 0x6)
29#define TCG_INVALID_DEVICE_ID (TPM_RET_BASE + 0x7)
30#define TCG_INVALID_VENDOR_ID (TPM_RET_BASE + 0x8)
31#define TCG_UNABLE_TO_OPEN (TPM_RET_BASE + 0x9)
32#define TCG_UNABLE_TO_CLOSE (TPM_RET_BASE + 0xa)
33#define TCG_RESPONSE_TIMEOUT (TPM_RET_BASE + 0xb)
34#define TCG_INVALID_COM_REQUEST (TPM_RET_BASE + 0xc)
35#define TCG_INVALID_ADR_REQUEST (TPM_RET_BASE + 0xd)
36#define TCG_WRITE_BYTE_ERROR (TPM_RET_BASE + 0xe)
37#define TCG_READ_BYTE_ERROR (TPM_RET_BASE + 0xf)
38#define TCG_BLOCK_WRITE_TIMEOUT (TPM_RET_BASE + 0x10)
39#define TCG_CHAR_WRITE_TIMEOUT (TPM_RET_BASE + 0x11)
40#define TCG_CHAR_READ_TIMEOUT (TPM_RET_BASE + 0x12)
41#define TCG_BLOCK_READ_TIMEOUT (TPM_RET_BASE + 0x13)
42#define TCG_TRANSFER_ABORT (TPM_RET_BASE + 0x14)
43#define TCG_INVALID_DRV_FUNCTION (TPM_RET_BASE + 0x15)
44#define TCG_OUTPUT_BUFFER_TOO_SHORT (TPM_RET_BASE + 0x16)
45#define TCG_FATAL_COM_ERROR (TPM_RET_BASE + 0x17)
46#define TCG_INVALID_INPUT_PARA (TPM_RET_BASE + 0x18)
47#define TCG_TCG_COMMAND_ERROR (TPM_RET_BASE + 0x19)
48#define TCG_INTERFACE_SHUTDOWN (TPM_RET_BASE + 0x20)
49//define TCG_PC_UNSUPPORTED (TPM_RET_BASE + 0x21)
50#define TCG_PC_TPM_NOT_PRESENT (TPM_RET_BASE + 0x22)
51#define TCG_PC_TPM_DEACTIVATED (TPM_RET_BASE + 0x23)
52
53
54#define TPM_INVALID_ADR_REQUEST TCG_INVALID_ADR_REQUEST
55#define TPM_IS_LOCKED TCG_TPM_IS_LOCKED
56#define TPM_INVALID_DEVICE_ID TCG_INVALID_DEVICE_ID
57#define TPM_INVALID_VENDOR_ID TCG_INVALID_VENDOR_ID
58//define TPM_RESERVED_REG_INVALID
59#define TPM_FIRMWARE_ERROR TCG_FIRMWARE_ERROR
60#define TPM_UNABLE_TO_OPEN TCG_UNABLE_TO_OPEN
61#define TPM_UNABLE_TO_CLOSE TCG_UNABLE_TO_CLOSE
62#define TPM_INVALID_RESPONSE TCG_INVALID_RESPONSE
63#define TPM_RESPONSE_TIMEOUT TCG_RESPONSE_TIMEOUT
64#define TPM_INVALID_ACCESS_REQUEST TCG_INVALID_ACCESS_REQUEST
65#define TPM_TRANSFER_ABORT TCG_TRANSFER_ABORT
66#define TPM_GENERAL_ERROR TCG_GENERAL_ERROR
67
68
69#define TPM_ORD_SelfTestFull 0x00000050
70#define TPM_ORD_ForceClear 0x0000005d
71#define TPM_ORD_GetCapability 0x00000065
72#define TPM_ORD_PhysicalEnable 0x0000006f
73#define TPM_ORD_PhysicalDisable 0x00000070
74#define TPM_ORD_SetOwnerInstall 0x00000071
75#define TPM_ORD_PhysicalSetDeactivated 0x00000072
76#define TPM_ORD_Startup 0x00000099
77#define TPM_ORD_PhysicalPresence 0x4000000a
78#define TPM_ORD_Extend 0x00000014
79#define TPM_ORD_SHA1Start 0x000000a0
80#define TPM_ORD_SHA1Update 0x000000a1
81#define TPM_ORD_SHA1Complete 0x000000a2
82#define TSC_ORD_ResetEstablishmentBit 0x4000000b
83
84
85#define TPM_ST_CLEAR 0x1
86#define TPM_ST_STATE 0x2
87#define TPM_ST_DEACTIVATED 0x3
88
89
90/* TPM command error codes */
91#define TPM_INVALID_POSTINIT 0x26
92#define TPM_BAD_LOCALITY 0x3d
93
94
95/* interrupt identifiers (al register) */
96enum irq_ids {
97 TCG_StatusCheck = 0,
98 TCG_HashLogExtendEvent = 1,
99 TCG_PassThroughToTPM = 2,
100 TCG_ShutdownPreBootInterface = 3,
101 TCG_HashLogEvent = 4,
102 TCG_HashAll = 5,
103 TCG_TSS = 6,
104 TCG_CompactHashLogExtendEvent = 7,
105};
106
107/* event types: 10.4.1 / table 11 */
108#define EV_POST_CODE 1
109#define EV_SEPARATOR 4
110#define EV_ACTION 5
111#define EV_EVENT_TAG 6
112#define EV_COMPACT_HASH 12
113#define EV_IPL 13
114#define EV_IPL_PARTITION_DATA 14
115
116
117#define STATUS_FLAG_SHUTDOWN (1 << 0)
118
119#define SHA1_BUFSIZE 20
120
121
122struct iovec
123{
124 size_t length;
125 void *data;
126};
127
128
129/* Input and Output blocks for the TCG BIOS commands */
130
131struct hleei_short
132{
133 u16 ipblength;
134 u16 reserved;
135 const void *hashdataptr;
136 u32 hashdatalen;
137 u32 pcrindex;
138 const void *logdataptr;
139 u32 logdatalen;
140} PACKED;
141
142
143struct hleei_long
144{
145 u16 ipblength;
146 u16 reserved;
147 void *hashdataptr;
148 u32 hashdatalen;
149 u32 pcrindex;
150 u32 reserved2;
151 void *logdataptr;
152 u32 logdatalen;
153} PACKED;
154
155
156struct hleeo
157{
158 u16 opblength;
159 u16 reserved;
160 u32 eventnumber;
161 u8 digest[SHA1_BUFSIZE];
162} PACKED;
163
164
165struct pttti
166{
167 u16 ipblength;
168 u16 reserved;
169 u16 opblength;
170 u16 reserved2;
171 u8 tpmopin[0];
172} PACKED;
173
174
175struct pttto
176{
177 u16 opblength;
178 u16 reserved;
179 u8 tpmopout[0];
180};
181
182
183struct hlei
184{
185 u16 ipblength;
186 u16 reserved;
187 const void *hashdataptr;
188 u32 hashdatalen;
189 u32 pcrindex;
190 u32 logeventtype;
191 const void *logdataptr;
192 u32 logdatalen;
193} PACKED;
194
195
196struct hleo
197{
198 u16 opblength;
199 u16 reserved;
200 u32 eventnumber;
201} PACKED;
202
203
204struct hai
205{
206 u16 ipblength;
207 u16 reserved;
208 const void *hashdataptr;
209 u32 hashdatalen;
210 u32 algorithmid;
211} PACKED;
212
213
214struct ti
215{
216 u16 ipblength;
217 u16 reserved;
218 u16 opblength;
219 u16 reserved2;
220 u8 tssoperandin[0];
221} PACKED;
222
223
224struct to
225{
226 u16 opblength;
227 u16 reserved;
228 u8 tssoperandout[0];
229} PACKED;
230
231
232struct pcpes
233{
234 u32 pcrindex;
235 u32 eventtype;
236 u8 digest[SHA1_BUFSIZE];
237 u32 eventdatasize;
238 u32 event;
239} PACKED;
240
241
242/* 10.4.2.1 */
243struct pcctes
244{
245 u32 eventid;
246 u32 eventdatasize;
247 u8 digest[SHA1_BUFSIZE];
248} PACKED;
249
250/* 10.4.2.1 w/ 10.4.2.2.1 embedded */
251struct pcctes_romex
252{
253 u32 eventid;
254 u32 eventdatasize;
255 u16 reserved;
256 u16 pfa;
257 u8 digest[SHA1_BUFSIZE];
258} PACKED;
259
260
261#define TPM_REQ_HEADER \
262 u16 tag; \
263 u32 totlen; \
264 u32 ordinal;
265
266#define TPM_REQ_HEADER_SIZE (sizeof(u16) + sizeof(u32) + sizeof(u32))
267
268#define TPM_RSP_HEADER \
269 u16 tag; \
270 u32 totlen; \
271 u32 errcode;
272
273#define TPM_RSP_HEADER_SIZE (sizeof(u16) + sizeof(u32) + sizeof(u32))
274
275struct tpm_req_header {
276 TPM_REQ_HEADER;
277} PACKED;
278
279
280struct tpm_rsp_header {
281 TPM_RSP_HEADER;
282} PACKED;
283
284
285struct tpm_req_extend {
286 TPM_REQ_HEADER
287 u32 pcrindex;
288 u8 digest[SHA1_BUFSIZE];
289} PACKED;
290
291
292struct tpm_rsp_extend {
293 TPM_RSP_HEADER
294 u8 digest[SHA1_BUFSIZE];
295} PACKED;
296
297
298struct tpm_req_getcap_perm_flags {
299 TPM_REQ_HEADER
300 u32 capArea;
301 u32 subCapSize;
302 u32 subCap;
303} PACKED;
304
305
306struct tpm_permanent_flags {
307 u16 tag;
308 u8 flags[20];
309} PACKED;
310
311
312enum permFlagsIndex {
313 PERM_FLAG_IDX_DISABLE = 0,
314 PERM_FLAG_IDX_OWNERSHIP,
315 PERM_FLAG_IDX_DEACTIVATED,
316 PERM_FLAG_IDX_READPUBEK,
317 PERM_FLAG_IDX_DISABLEOWNERCLEAR,
318 PERM_FLAG_IDX_ALLOW_MAINTENANCE,
319 PERM_FLAG_IDX_PHYSICAL_PRESENCE_LIFETIME_LOCK,
320 PERM_FLAG_IDX_PHYSICAL_PRESENCE_HW_ENABLE,
321};
322
323
324struct tpm_res_getcap_perm_flags {
325 TPM_RSP_HEADER
326 u32 size;
327 struct tpm_permanent_flags perm_flags;
328} PACKED;
329
330
331struct tpm_res_getcap_ownerauth {
332 TPM_RSP_HEADER
333 u32 size;
334 u8 flag;
335} PACKED;
336
337
338struct tpm_res_getcap_timeouts {
339 TPM_RSP_HEADER
340 u32 size;
341 u32 timeouts[4];
342} PACKED;
343
344
345struct tpm_res_getcap_durations {
346 TPM_RSP_HEADER
347 u32 size;
348 u32 durations[3];
349} PACKED;
350
351
352struct tpm_res_sha1start {
353 TPM_RSP_HEADER
354 u32 max_num_bytes;
355} PACKED;
356
357
358struct tpm_res_sha1complete {
359 TPM_RSP_HEADER
360 u8 hash[20];
361} PACKED;
362
363struct pttti_extend {
364 struct pttti pttti;
365 struct tpm_req_extend req;
366} PACKED;
367
368
369struct pttto_extend {
370 struct pttto pttto;
371 struct tpm_rsp_extend rsp;
372} PACKED;
373
374
375enum ipltype {
376 IPL_BCV = 0,
377 IPL_EL_TORITO_1,
378 IPL_EL_TORITO_2
379};
380
381
382u32 tpm_start(void);
383u32 tpm_leave_bios(void);
384u32 tpm_s3_resume(void);
385
386#endif /* TCGBIOS_H */