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Kevin O'Connorb9c6a962013-09-14 13:01:30 -04001// Basic x86 asm functions.
2#ifndef __X86_H
3#define __X86_H
4
5// CPU flag bitdefs
6#define F_CF (1<<0)
7#define F_ZF (1<<6)
8#define F_IF (1<<9)
9#define F_ID (1<<21)
10
11// CR0 flags
12#define CR0_PG (1<<31) // Paging
13#define CR0_CD (1<<30) // Cache disable
14#define CR0_NW (1<<29) // Not Write-through
15#define CR0_PE (1<<0) // Protection enable
16
Kevin O'Connor341f8d92014-10-11 13:16:12 -040017// PORT_A20 bitdefs
18#define PORT_A20 0x0092
19#define A20_ENABLE_BIT 0x02
20
Kevin O'Connorb9c6a962013-09-14 13:01:30 -040021#ifndef __ASSEMBLY__
22
23#include "types.h" // u32
24
25static inline void irq_disable(void)
26{
27 asm volatile("cli": : :"memory");
28}
29
30static inline void irq_enable(void)
31{
32 asm volatile("sti": : :"memory");
33}
34
35static inline u32 save_flags(void)
36{
37 u32 flags;
38 asm volatile("pushfl ; popl %0" : "=rm" (flags));
39 return flags;
40}
41
42static inline void restore_flags(u32 flags)
43{
44 asm volatile("pushl %0 ; popfl" : : "g" (flags) : "memory", "cc");
45}
46
47static inline void cpu_relax(void)
48{
49 asm volatile("rep ; nop": : :"memory");
50}
51
52static inline void nop(void)
53{
54 asm volatile("nop");
55}
56
57static inline void hlt(void)
58{
59 asm volatile("hlt": : :"memory");
60}
61
62static inline void wbinvd(void)
63{
64 asm volatile("wbinvd": : :"memory");
65}
66
67#define CPUID_TSC (1 << 4)
68#define CPUID_MSR (1 << 5)
69#define CPUID_APIC (1 << 9)
70#define CPUID_MTRR (1 << 12)
Igor Mammedovcb75c912016-10-13 14:38:28 +020071#define CPUID_X2APIC (1 << 21)
Kevin O'Connorb9c6a962013-09-14 13:01:30 -040072static inline void __cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
73{
74 asm("cpuid"
75 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
76 : "0" (index));
77}
78
Kevin O'Connor62de31b2015-09-22 12:35:00 -040079static inline u32 cr0_read(void) {
Kevin O'Connorb9c6a962013-09-14 13:01:30 -040080 u32 cr0;
81 asm("movl %%cr0, %0" : "=r"(cr0));
82 return cr0;
83}
Kevin O'Connor62de31b2015-09-22 12:35:00 -040084static inline void cr0_write(u32 cr0) {
Kevin O'Connorb9c6a962013-09-14 13:01:30 -040085 asm("movl %0, %%cr0" : : "r"(cr0));
86}
Kevin O'Connor62de31b2015-09-22 12:35:00 -040087static inline void cr0_mask(u32 off, u32 on) {
88 cr0_write((cr0_read() & ~off) | on);
89}
90static inline u16 cr0_vm86_read(void) {
Kevin O'Connor251e2632015-03-17 11:37:25 -040091 u16 cr0;
92 asm("smsww %0" : "=r"(cr0));
93 return cr0;
94}
Kevin O'Connorb9c6a962013-09-14 13:01:30 -040095
96static inline u64 rdmsr(u32 index)
97{
98 u64 ret;
99 asm ("rdmsr" : "=A"(ret) : "c"(index));
100 return ret;
101}
102
103static inline void wrmsr(u32 index, u64 val)
104{
105 asm volatile ("wrmsr" : : "c"(index), "A"(val));
106}
107
108static inline u64 rdtscll(void)
109{
110 u64 val;
111 asm volatile("rdtsc" : "=A" (val));
112 return val;
113}
114
115static inline u32 __ffs(u32 word)
116{
117 asm("bsf %1,%0"
118 : "=r" (word)
119 : "rm" (word));
120 return word;
121}
122static inline u32 __fls(u32 word)
123{
124 asm("bsr %1,%0"
125 : "=r" (word)
126 : "rm" (word));
127 return word;
128}
129
130static inline u32 getesp(void) {
131 u32 esp;
132 asm("movl %%esp, %0" : "=rm"(esp));
133 return esp;
134}
135
Stefan Berger5aa2a752015-03-23 14:22:17 -0400136static inline u32 rol(u32 val, u16 rol) {
137 u32 res;
138 asm volatile("roll %%cl, %%eax"
139 : "=a" (res) : "a" (val), "c" (rol));
140 return res;
141}
142
Kevin O'Connor4ade5232013-09-18 21:41:48 -0400143static inline void outb(u8 value, u16 port) {
144 __asm__ __volatile__("outb %b0, %w1" : : "a"(value), "Nd"(port));
145}
146static inline void outw(u16 value, u16 port) {
147 __asm__ __volatile__("outw %w0, %w1" : : "a"(value), "Nd"(port));
148}
149static inline void outl(u32 value, u16 port) {
150 __asm__ __volatile__("outl %0, %w1" : : "a"(value), "Nd"(port));
151}
152static inline u8 inb(u16 port) {
153 u8 value;
154 __asm__ __volatile__("inb %w1, %b0" : "=a"(value) : "Nd"(port));
155 return value;
156}
157static inline u16 inw(u16 port) {
158 u16 value;
159 __asm__ __volatile__("inw %w1, %w0" : "=a"(value) : "Nd"(port));
160 return value;
161}
162static inline u32 inl(u16 port) {
163 u32 value;
164 __asm__ __volatile__("inl %w1, %0" : "=a"(value) : "Nd"(port));
165 return value;
166}
167
168static inline void insb(u16 port, u8 *data, u32 count) {
169 asm volatile("rep insb (%%dx), %%es:(%%edi)"
170 : "+c"(count), "+D"(data) : "d"(port) : "memory");
171}
172static inline void insw(u16 port, u16 *data, u32 count) {
173 asm volatile("rep insw (%%dx), %%es:(%%edi)"
174 : "+c"(count), "+D"(data) : "d"(port) : "memory");
175}
176static inline void insl(u16 port, u32 *data, u32 count) {
177 asm volatile("rep insl (%%dx), %%es:(%%edi)"
178 : "+c"(count), "+D"(data) : "d"(port) : "memory");
179}
180// XXX - outs not limited to es segment
181static inline void outsb(u16 port, u8 *data, u32 count) {
182 asm volatile("rep outsb %%es:(%%esi), (%%dx)"
183 : "+c"(count), "+S"(data) : "d"(port) : "memory");
184}
185static inline void outsw(u16 port, u16 *data, u32 count) {
186 asm volatile("rep outsw %%es:(%%esi), (%%dx)"
187 : "+c"(count), "+S"(data) : "d"(port) : "memory");
188}
189static inline void outsl(u16 port, u32 *data, u32 count) {
190 asm volatile("rep outsl %%es:(%%esi), (%%dx)"
191 : "+c"(count), "+S"(data) : "d"(port) : "memory");
192}
193
Kevin O'Connoreee06e02015-09-29 10:14:58 -0400194/* Compiler barrier is enough as an x86 CPU does not reorder reads or writes */
195static inline void smp_rmb(void) {
196 barrier();
197}
198static inline void smp_wmb(void) {
199 barrier();
200}
201
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400202static inline void writel(void *addr, u32 val) {
Ameya Palandebc82fa42015-02-17 14:00:49 -0800203 barrier();
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400204 *(volatile u32 *)addr = val;
205}
206static inline void writew(void *addr, u16 val) {
Ameya Palandebc82fa42015-02-17 14:00:49 -0800207 barrier();
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400208 *(volatile u16 *)addr = val;
209}
210static inline void writeb(void *addr, u8 val) {
Ameya Palandebc82fa42015-02-17 14:00:49 -0800211 barrier();
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400212 *(volatile u8 *)addr = val;
213}
214static inline u32 readl(const void *addr) {
Ameya Palandebc82fa42015-02-17 14:00:49 -0800215 u32 val = *(volatile const u32 *)addr;
216 barrier();
217 return val;
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400218}
219static inline u16 readw(const void *addr) {
Ameya Palandebc82fa42015-02-17 14:00:49 -0800220 u16 val = *(volatile const u16 *)addr;
221 barrier();
222 return val;
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400223}
224static inline u8 readb(const void *addr) {
Ameya Palandebc82fa42015-02-17 14:00:49 -0800225 u8 val = *(volatile const u8 *)addr;
226 barrier();
227 return val;
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400228}
229
230// GDT bits
231#define GDT_CODE (0x9bULL << 40) // Code segment - P,R,A bits also set
232#define GDT_DATA (0x93ULL << 40) // Data segment - W,A bits also set
233#define GDT_B (0x1ULL << 54) // Big flag
234#define GDT_G (0x1ULL << 55) // Granularity flag
235// GDT bits for segment base
236#define GDT_BASE(v) ((((u64)(v) & 0xff000000) << 32) \
237 | (((u64)(v) & 0x00ffffff) << 16))
238// GDT bits for segment limit (0-1Meg)
239#define GDT_LIMIT(v) ((((u64)(v) & 0x000f0000) << 32) \
240 | (((u64)(v) & 0x0000ffff) << 0))
241// GDT bits for segment limit (0-4Gig in 4K chunks)
242#define GDT_GRANLIMIT(v) (GDT_G | GDT_LIMIT((v) >> 12))
243
244struct descloc_s {
245 u16 length;
246 u32 addr;
247} PACKED;
248
Kevin O'Connor0f0612e2013-12-04 11:48:05 -0500249static inline void sgdt(struct descloc_s *desc) {
250 asm("sgdtl %0" : "=m"(*desc));
251}
252static inline void lgdt(struct descloc_s *desc) {
253 asm("lgdtl %0" : : "m"(*desc) : "memory");
254}
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400255
Kevin O'Connor341f8d92014-10-11 13:16:12 -0400256static inline u8 get_a20(void) {
257 return (inb(PORT_A20) & A20_ENABLE_BIT) != 0;
258}
259
260static inline u8 set_a20(u8 cond) {
Kevin O'Connor8ebb33b2017-05-16 11:47:27 -0400261 u8 val = inb(PORT_A20), a20_enabled = (val & A20_ENABLE_BIT) != 0;
262 if (a20_enabled != !!cond)
263 outb(val ^ A20_ENABLE_BIT, PORT_A20);
264 return a20_enabled;
Kevin O'Connor341f8d92014-10-11 13:16:12 -0400265}
266
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400267// x86.c
268void cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
269
Kevin O'Connorb9c6a962013-09-14 13:01:30 -0400270#endif // !__ASSEMBLY__
271
272#endif // x86.h