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Kevin O'Connora4d35762008-03-08 15:43:03 -05001/////////////////////////////////////////////////////////////////////////
Kevin O'Connora4d35762008-03-08 15:43:03 -05002//
3// 32 bit Bochs BIOS init code
4// Copyright (C) 2006 Fabrice Bellard
5//
6// This library is free software; you can redistribute it and/or
7// modify it under the terms of the GNU Lesser General Public
8// License as published by the Free Software Foundation; either
9// version 2 of the License, or (at your option) any later version.
10//
11// This library is distributed in the hope that it will be useful,
12// but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14// Lesser General Public License for more details.
15//
16// You should have received a copy of the GNU Lesser General Public
17// License along with this library; if not, write to the Free Software
18// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19
Kevin O'Connorac8df8c2008-05-24 23:46:33 -040020#include "util.h" // dprintf
Kevin O'Connora0dc2962008-03-16 14:29:32 -040021#include "pci.h" // PCIDevice
22#include "types.h" // u32
Kevin O'Connord9b06592008-05-06 20:00:12 -040023#include "config.h" // CONFIG_*
Kevin O'Connora4d35762008-03-08 15:43:03 -050024
Kevin O'Connor438f6352008-03-30 21:46:53 -040025// Memory addresses used by this code. (Note global variables (bss)
26// are at 0x40000).
27#define CPU_COUNT_ADDR 0xf000
28#define AP_BOOT_ADDR 0x10000
29#define BIOS_TMP_STORAGE 0x30000 /* 64 KB used to copy the BIOS to shadow RAM */
30
Kevin O'Connora4d35762008-03-08 15:43:03 -050031#define PM_IO_BASE 0xb000
32#define SMB_IO_BASE 0xb100
Kevin O'Connora4d35762008-03-08 15:43:03 -050033
Kevin O'Connora4d35762008-03-08 15:43:03 -050034#define cpuid(index, eax, ebx, ecx, edx) \
35 asm volatile ("cpuid" \
36 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) \
37 : "0" (index))
38
39#define wbinvd() asm volatile("wbinvd")
40
41#define CPUID_APIC (1 << 9)
42
Kevin O'Connore51313d2008-03-12 21:19:34 -040043#define APIC_BASE ((u8 *)0xfee00000)
Kevin O'Connora4d35762008-03-08 15:43:03 -050044#define APIC_ICR_LOW 0x300
45#define APIC_SVR 0x0F0
46#define APIC_ID 0x020
47#define APIC_LVT3 0x370
48
49#define APIC_ENABLED 0x0100
50
Kevin O'Connora4d35762008-03-08 15:43:03 -050051#define MPTABLE_MAX_SIZE 0x00002000
52#define SMI_CMD_IO_ADDR 0xb2
53
Kevin O'Connore51313d2008-03-12 21:19:34 -040054static inline void writel(void *addr, u32 val)
Kevin O'Connora4d35762008-03-08 15:43:03 -050055{
Kevin O'Connore51313d2008-03-12 21:19:34 -040056 *(volatile u32 *)addr = val;
Kevin O'Connora4d35762008-03-08 15:43:03 -050057}
58
Kevin O'Connore51313d2008-03-12 21:19:34 -040059static inline void writew(void *addr, u16 val)
Kevin O'Connora4d35762008-03-08 15:43:03 -050060{
Kevin O'Connore51313d2008-03-12 21:19:34 -040061 *(volatile u16 *)addr = val;
Kevin O'Connora4d35762008-03-08 15:43:03 -050062}
63
Kevin O'Connore51313d2008-03-12 21:19:34 -040064static inline void writeb(void *addr, u8 val)
Kevin O'Connora4d35762008-03-08 15:43:03 -050065{
Kevin O'Connore51313d2008-03-12 21:19:34 -040066 *(volatile u8 *)addr = val;
Kevin O'Connora4d35762008-03-08 15:43:03 -050067}
68
Kevin O'Connore51313d2008-03-12 21:19:34 -040069static inline u32 readl(const void *addr)
Kevin O'Connora4d35762008-03-08 15:43:03 -050070{
Kevin O'Connore51313d2008-03-12 21:19:34 -040071 return *(volatile const u32 *)addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -050072}
73
Kevin O'Connore51313d2008-03-12 21:19:34 -040074static inline u16 readw(const void *addr)
Kevin O'Connora4d35762008-03-08 15:43:03 -050075{
Kevin O'Connore51313d2008-03-12 21:19:34 -040076 return *(volatile const u16 *)addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -050077}
78
Kevin O'Connore51313d2008-03-12 21:19:34 -040079static inline u8 readb(const void *addr)
Kevin O'Connora4d35762008-03-08 15:43:03 -050080{
Kevin O'Connore51313d2008-03-12 21:19:34 -040081 return *(volatile const u8 *)addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -050082}
83
84int smp_cpus;
Kevin O'Connore51313d2008-03-12 21:19:34 -040085u32 cpuid_signature;
86u32 cpuid_features;
87u32 cpuid_ext_features;
Kevin O'Connore51313d2008-03-12 21:19:34 -040088u8 bios_uuid[16];
Kevin O'Connord9b06592008-05-06 20:00:12 -040089#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -050090unsigned long ebda_cur_addr;
91#endif
92int acpi_enabled;
Kevin O'Connore51313d2008-03-12 21:19:34 -040093u32 pm_io_base, smb_io_base;
Kevin O'Connora4d35762008-03-08 15:43:03 -050094int pm_sci_int;
95unsigned long bios_table_cur_addr;
96unsigned long bios_table_end_addr;
97
98void uuid_probe(void)
99{
Kevin O'Connord9b06592008-05-06 20:00:12 -0400100#if (CONFIG_QEMU == 1)
Kevin O'Connore51313d2008-03-12 21:19:34 -0400101 u32 eax, ebx, ecx, edx;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500102
103 // check if backdoor port exists
104 asm volatile ("outl %%eax, %%dx"
105 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
106 : "a" (0x564d5868), "c" (0xa), "d" (0x5658));
107 if (ebx == 0x564d5868) {
Kevin O'Connore51313d2008-03-12 21:19:34 -0400108 u32 *uuid_ptr = (u32 *)bios_uuid;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500109 // get uuid
110 asm volatile ("outl %%eax, %%dx"
111 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
112 : "a" (0x564d5868), "c" (0x13), "d" (0x5658));
113 uuid_ptr[0] = eax;
114 uuid_ptr[1] = ebx;
115 uuid_ptr[2] = ecx;
116 uuid_ptr[3] = edx;
117 } else
118#endif
119 {
120 // UUID not set
121 memset(bios_uuid, 0, 16);
122 }
123}
124
125void cpu_probe(void)
126{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400127 u32 eax, ebx, ecx, edx;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500128 cpuid(1, eax, ebx, ecx, edx);
129 cpuid_signature = eax;
130 cpuid_features = edx;
131 cpuid_ext_features = ecx;
132}
133
Kevin O'Connora4d35762008-03-08 15:43:03 -0500134/****************************************************/
135/* SMP probe */
136
Kevin O'Connore51313d2008-03-12 21:19:34 -0400137extern u8 smp_ap_boot_code_start;
138extern u8 smp_ap_boot_code_end;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500139
140/* find the number of CPUs by launching a SIPI to them */
141void smp_probe(void)
142{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400143 u32 val, sipi_vector;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500144
145 smp_cpus = 1;
146 if (cpuid_features & CPUID_APIC) {
147
148 /* enable local APIC */
149 val = readl(APIC_BASE + APIC_SVR);
150 val |= APIC_ENABLED;
151 writel(APIC_BASE + APIC_SVR, val);
152
153 writew((void *)CPU_COUNT_ADDR, 1);
154 /* copy AP boot code */
155 memcpy((void *)AP_BOOT_ADDR, &smp_ap_boot_code_start,
156 &smp_ap_boot_code_end - &smp_ap_boot_code_start);
157
158 /* broadcast SIPI */
159 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4500);
160 sipi_vector = AP_BOOT_ADDR >> 12;
161 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
162
163 usleep(10*1000);
164
165 smp_cpus = readw((void *)CPU_COUNT_ADDR);
166 }
Kevin O'Connorac8df8c2008-05-24 23:46:33 -0400167 dprintf(1, "Found %d cpu(s)\n", smp_cpus);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500168}
169
170/****************************************************/
171/* PCI init */
172
173#define PCI_ADDRESS_SPACE_MEM 0x00
174#define PCI_ADDRESS_SPACE_IO 0x01
175#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
176
177#define PCI_ROM_SLOT 6
178#define PCI_NUM_REGIONS 7
179
180#define PCI_DEVICES_MAX 64
181
182#define PCI_VENDOR_ID 0x00 /* 16 bits */
183#define PCI_DEVICE_ID 0x02 /* 16 bits */
184#define PCI_COMMAND 0x04 /* 16 bits */
185#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
186#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
187#define PCI_CLASS_DEVICE 0x0a /* Device class */
188#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
189#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
190#define PCI_MIN_GNT 0x3e /* 8 bits */
191#define PCI_MAX_LAT 0x3f /* 8 bits */
192
Kevin O'Connore51313d2008-03-12 21:19:34 -0400193static u32 pci_bios_io_addr;
194static u32 pci_bios_mem_addr;
195static u32 pci_bios_bigmem_addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500196/* host irqs corresponding to PCI irqs A-D */
Kevin O'Connore51313d2008-03-12 21:19:34 -0400197static u8 pci_irqs[4] = { 11, 9, 11, 9 };
Kevin O'Connora4d35762008-03-08 15:43:03 -0500198static PCIDevice i440_pcidev;
199
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400200static void pci_set_io_region_addr(PCIDevice d, int region_num, u32 addr)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500201{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400202 u16 cmd;
203 u32 ofs, old_addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500204
205 if ( region_num == PCI_ROM_SLOT ) {
206 ofs = 0x30;
207 }else{
208 ofs = 0x10 + region_num * 4;
209 }
210
211 old_addr = pci_config_readl(d, ofs);
212
213 pci_config_writel(d, ofs, addr);
Kevin O'Connorac8df8c2008-05-24 23:46:33 -0400214 dprintf(1, "region %d: 0x%08x\n", region_num, addr);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500215
216 /* enable memory mappings */
217 cmd = pci_config_readw(d, PCI_COMMAND);
218 if ( region_num == PCI_ROM_SLOT )
219 cmd |= 2;
220 else if (old_addr & PCI_ADDRESS_SPACE_IO)
221 cmd |= 1;
222 else
223 cmd |= 2;
224 pci_config_writew(d, PCI_COMMAND, cmd);
225}
226
227/* return the global irq number corresponding to a given device irq
228 pin. We could also use the bus number to have a more precise
229 mapping. */
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400230static int pci_slot_get_pirq(PCIDevice pci_dev, int irq_num)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500231{
232 int slot_addend;
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400233 slot_addend = (pci_dev.devfn >> 3) - 1;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500234 return (irq_num + slot_addend) & 3;
235}
236
237static void
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400238copy_bios(PCIDevice d, int v)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500239{
240 pci_config_writeb(d, 0x59, v);
241 memcpy((void *)0x000f0000, (void *)BIOS_TMP_STORAGE, 0x10000);
242}
243
244// Test if 'addr' is in the range from 'start'..'start+size'
245#define IN_RANGE(addr, start, size) ({ \
246 u32 __addr = (addr); \
247 u32 __start = (start); \
248 u32 __size = (size); \
249 (__addr - __start < __size); \
250 })
251
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400252static void bios_shadow_init(PCIDevice d)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500253{
254 bios_table_cur_addr = 0xf0000 | OFFSET_freespace2_start;
255 bios_table_end_addr = 0xf0000 | OFFSET_freespace2_end;
Kevin O'Connorac8df8c2008-05-24 23:46:33 -0400256 dprintf(1, "bios_table_addr: 0x%08lx end=0x%08lx\n",
Kevin O'Connora4d35762008-03-08 15:43:03 -0500257 bios_table_cur_addr, bios_table_end_addr);
258
259 /* remap the BIOS to shadow RAM an keep it read/write while we
260 are writing tables */
261 int v = pci_config_readb(d, 0x59);
262 v &= 0xcf;
263 pci_config_writeb(d, 0x59, v);
264 memcpy((void *)BIOS_TMP_STORAGE, (void *)0x000f0000, 0x10000);
265 v |= 0x30;
266
267 if (IN_RANGE((u32)copy_bios, 0xf0000, 0x10000)) {
268 // Current code is in shadowed area. Perform the copy from
269 // the code that is in the temporary location.
270 u32 pos = (u32)copy_bios - 0xf0000 + BIOS_TMP_STORAGE;
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400271 void (*func)(PCIDevice, int) = (void*)pos;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500272 func(d, v);
273 } else {
274 copy_bios(d, v);
275 }
276
Kevin O'Connorceb5f3f2008-03-11 21:24:53 -0400277 // Clear the area just copied.
Kevin O'Connor52c1a8a2008-04-12 09:00:40 -0400278 memset((void *)BIOS_TMP_STORAGE, 0, 0x10000);
Kevin O'Connorceb5f3f2008-03-11 21:24:53 -0400279
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400280 i440_pcidev = d;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500281}
282
283static void bios_lock_shadow_ram(void)
284{
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400285 PCIDevice d = i440_pcidev;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500286 int v;
287
288 wbinvd();
289 v = pci_config_readb(d, 0x59);
290 v = (v & 0x0f) | (0x10);
291 pci_config_writeb(d, 0x59, v);
292}
293
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400294static void pci_bios_init_bridges(PCIDevice d)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500295{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400296 u16 vendor_id, device_id;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500297
298 vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
299 device_id = pci_config_readw(d, PCI_DEVICE_ID);
300
301 if (vendor_id == 0x8086 && device_id == 0x7000) {
302 int i, irq;
Kevin O'Connore51313d2008-03-12 21:19:34 -0400303 u8 elcr[2];
Kevin O'Connora4d35762008-03-08 15:43:03 -0500304
305 /* PIIX3 bridge */
306
307 elcr[0] = 0x00;
308 elcr[1] = 0x00;
309 for(i = 0; i < 4; i++) {
310 irq = pci_irqs[i];
311 /* set to trigger level */
312 elcr[irq >> 3] |= (1 << (irq & 7));
313 /* activate irq remapping in PIIX */
314 pci_config_writeb(d, 0x60 + i, irq);
315 }
316 outb(elcr[0], 0x4d0);
317 outb(elcr[1], 0x4d1);
Kevin O'Connorac8df8c2008-05-24 23:46:33 -0400318 dprintf(1, "PIIX3 init: elcr=%02x %02x\n",
Kevin O'Connora4d35762008-03-08 15:43:03 -0500319 elcr[0], elcr[1]);
320 } else if (vendor_id == 0x8086 && device_id == 0x1237) {
321 /* i440 PCI bridge */
322 bios_shadow_init(d);
323 }
324}
325
326asm(
327 ".globl smp_ap_boot_code_start\n"
328 ".globl smp_ap_boot_code_end\n"
329 ".global smm_relocation_start\n"
330 ".global smm_relocation_end\n"
331 ".global smm_code_start\n"
332 ".global smm_code_end\n"
333
334 " .code16\n"
335 "smp_ap_boot_code_start:\n"
336 " xor %ax, %ax\n"
337 " mov %ax, %ds\n"
338 " incw " __stringify(CPU_COUNT_ADDR) "\n"
339 "1:\n"
340 " hlt\n"
341 " jmp 1b\n"
342 "smp_ap_boot_code_end:\n"
343
344 /* code to relocate SMBASE to 0xa0000 */
345 "smm_relocation_start:\n"
346 " mov $0x38000 + 0x7efc, %ebx\n"
347 " addr32 mov (%ebx), %al\n" /* revision ID to see if x86_64 or x86 */
348 " cmp $0x64, %al\n"
349 " je 1f\n"
350 " mov $0x38000 + 0x7ef8, %ebx\n"
351 " jmp 2f\n"
352 "1:\n"
353 " mov $0x38000 + 0x7f00, %ebx\n"
354 "2:\n"
355 " movl $0xa0000, %eax\n"
356 " addr32 movl %eax, (%ebx)\n"
357 /* indicate to the BIOS that the SMM code was executed */
358 " mov $0x00, %al\n"
359 " movw $0xb3, %dx\n"
360 " outb %al, %dx\n"
361 " rsm\n"
362 "smm_relocation_end:\n"
363
364 /* minimal SMM code to enable or disable ACPI */
365 "smm_code_start:\n"
366 " movw $0xb2, %dx\n"
367 " inb %dx, %al\n"
368 " cmp $0xf0, %al\n"
369 " jne 1f\n"
370
371 /* ACPI disable */
372 " mov $" __stringify(PM_IO_BASE) " + 0x04, %dx\n" /* PMCNTRL */
373 " inw %dx, %ax\n"
374 " andw $~1, %ax\n"
375 " outw %ax, %dx\n"
376
377 " jmp 2f\n"
378
379 "1:\n"
380 " cmp $0xf1, %al\n"
381 " jne 2f\n"
382
383 /* ACPI enable */
384 " mov $" __stringify(PM_IO_BASE) " + 0x04, %dx\n" /* PMCNTRL */
385 " inw %dx, %ax\n"
386 " orw $1, %ax\n"
387 " outw %ax, %dx\n"
388
389 "2:\n"
390 " rsm\n"
391 "smm_code_end:\n"
392 " .code32\n"
393 );
394
Kevin O'Connore51313d2008-03-12 21:19:34 -0400395extern u8 smm_relocation_start, smm_relocation_end;
396extern u8 smm_code_start, smm_code_end;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500397
Kevin O'Connord9b06592008-05-06 20:00:12 -0400398#if (CONFIG_USE_SMM == 1)
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400399static void smm_init(PCIDevice d)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500400{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400401 u32 value;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500402
403 /* check if SMM init is already done */
404 value = pci_config_readl(d, 0x58);
405 if ((value & (1 << 25)) == 0) {
406
407 /* copy the SMM relocation code */
408 memcpy((void *)0x38000, &smm_relocation_start,
409 &smm_relocation_end - &smm_relocation_start);
410
411 /* enable SMI generation when writing to the APMC register */
412 pci_config_writel(d, 0x58, value | (1 << 25));
413
414 /* init APM status port */
415 outb(0x01, 0xb3);
416
417 /* raise an SMI interrupt */
418 outb(0x00, 0xb2);
419
420 /* wait until SMM code executed */
Kevin O'Connor52c1a8a2008-04-12 09:00:40 -0400421 while (inb(0xb3) != 0x00)
422 ;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500423
424 /* enable the SMM memory window */
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400425 pci_config_writeb(i440_pcidev, 0x72, 0x02 | 0x48);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500426
427 /* copy the SMM code */
428 memcpy((void *)0xa8000, &smm_code_start,
429 &smm_code_end - &smm_code_start);
430 wbinvd();
431
432 /* close the SMM memory window and enable normal SMM */
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400433 pci_config_writeb(i440_pcidev, 0x72, 0x02 | 0x08);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500434 }
435}
436#endif
437
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400438static void pci_bios_init_device(PCIDevice d)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500439{
440 int class;
Kevin O'Connore51313d2008-03-12 21:19:34 -0400441 u32 *paddr;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500442 int i, pin, pic_irq, vendor_id, device_id;
443
444 class = pci_config_readw(d, PCI_CLASS_DEVICE);
445 vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
446 device_id = pci_config_readw(d, PCI_DEVICE_ID);
Kevin O'Connorac8df8c2008-05-24 23:46:33 -0400447 dprintf(1, "PCI: bus=%d devfn=0x%02x: vendor_id=0x%04x device_id=0x%04x\n",
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400448 d.bus, d.devfn, vendor_id, device_id);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500449 switch(class) {
450 case 0x0101:
451 if (vendor_id == 0x8086 && device_id == 0x7010) {
452 /* PIIX3 IDE */
453 pci_config_writew(d, 0x40, 0x8000); // enable IDE0
454 pci_config_writew(d, 0x42, 0x8000); // enable IDE1
455 goto default_map;
456 } else {
457 /* IDE: we map it as in ISA mode */
458 pci_set_io_region_addr(d, 0, 0x1f0);
459 pci_set_io_region_addr(d, 1, 0x3f4);
460 pci_set_io_region_addr(d, 2, 0x170);
461 pci_set_io_region_addr(d, 3, 0x374);
462 }
463 break;
464 case 0x0300:
465 if (vendor_id != 0x1234)
466 goto default_map;
467 /* VGA: map frame buffer to default Bochs VBE address */
468 pci_set_io_region_addr(d, 0, 0xE0000000);
469 break;
470 case 0x0800:
471 /* PIC */
472 if (vendor_id == 0x1014) {
473 /* IBM */
474 if (device_id == 0x0046 || device_id == 0xFFFF) {
475 /* MPIC & MPIC2 */
476 pci_set_io_region_addr(d, 0, 0x80800000 + 0x00040000);
477 }
478 }
479 break;
480 case 0xff00:
481 if (vendor_id == 0x0106b &&
482 (device_id == 0x0017 || device_id == 0x0022)) {
483 /* macio bridge */
484 pci_set_io_region_addr(d, 0, 0x80800000);
485 }
486 break;
487 default:
488 default_map:
489 /* default memory mappings */
490 for(i = 0; i < PCI_NUM_REGIONS; i++) {
491 int ofs;
Kevin O'Connore51313d2008-03-12 21:19:34 -0400492 u32 val, size ;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500493
494 if (i == PCI_ROM_SLOT)
495 ofs = 0x30;
496 else
497 ofs = 0x10 + i * 4;
498 pci_config_writel(d, ofs, 0xffffffff);
499 val = pci_config_readl(d, ofs);
500 if (val != 0) {
501 size = (~(val & ~0xf)) + 1;
502 if (val & PCI_ADDRESS_SPACE_IO)
503 paddr = &pci_bios_io_addr;
504 else if (size >= 0x04000000)
505 paddr = &pci_bios_bigmem_addr;
506 else
507 paddr = &pci_bios_mem_addr;
508 *paddr = (*paddr + size - 1) & ~(size - 1);
509 pci_set_io_region_addr(d, i, *paddr);
510 *paddr += size;
511 }
512 }
513 break;
514 }
515
516 /* map the interrupt */
517 pin = pci_config_readb(d, PCI_INTERRUPT_PIN);
518 if (pin != 0) {
519 pin = pci_slot_get_pirq(d, pin - 1);
520 pic_irq = pci_irqs[pin];
521 pci_config_writeb(d, PCI_INTERRUPT_LINE, pic_irq);
522 }
523
524 if (vendor_id == 0x8086 && device_id == 0x7113) {
525 /* PIIX4 Power Management device (for ACPI) */
526 pm_io_base = PM_IO_BASE;
527 pci_config_writel(d, 0x40, pm_io_base | 1);
528 pci_config_writeb(d, 0x80, 0x01); /* enable PM io space */
529 smb_io_base = SMB_IO_BASE;
530 pci_config_writel(d, 0x90, smb_io_base | 1);
531 pci_config_writeb(d, 0xd2, 0x09); /* enable SMBus io space */
532 pm_sci_int = pci_config_readb(d, PCI_INTERRUPT_LINE);
Kevin O'Connord9b06592008-05-06 20:00:12 -0400533#if (CONFIG_USE_SMM == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500534 smm_init(d);
535#endif
536 acpi_enabled = 1;
537 }
538}
539
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400540void pci_for_each_device(void (*init_func)(PCIDevice d))
Kevin O'Connora4d35762008-03-08 15:43:03 -0500541{
Kevin O'Connora4d35762008-03-08 15:43:03 -0500542 int bus, devfn;
Kevin O'Connore51313d2008-03-12 21:19:34 -0400543 u16 vendor_id, device_id;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500544
545 for(bus = 0; bus < 1; bus++) {
546 for(devfn = 0; devfn < 256; devfn++) {
Kevin O'Connor0f803e42008-05-24 23:07:16 -0400547 PCIDevice d = pci_bd(bus, devfn);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500548 vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
549 device_id = pci_config_readw(d, PCI_DEVICE_ID);
550 if (vendor_id != 0xffff || device_id != 0xffff) {
551 init_func(d);
552 }
553 }
554 }
555}
556
557void pci_bios_init(void)
558{
559 pci_bios_io_addr = 0xc000;
560 pci_bios_mem_addr = 0xf0000000;
Kevin O'Connor9571ac22008-05-17 22:20:27 -0400561 pci_bios_bigmem_addr = GET_EBDA(ram_size);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500562 if (pci_bios_bigmem_addr < 0x90000000)
563 pci_bios_bigmem_addr = 0x90000000;
564
565 pci_for_each_device(pci_bios_init_bridges);
566
567 pci_for_each_device(pci_bios_init_device);
568}
569
570/****************************************************/
571/* Multi Processor table init */
572
Kevin O'Connore51313d2008-03-12 21:19:34 -0400573static void putb(u8 **pp, int val)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500574{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400575 u8 *q;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500576 q = *pp;
577 *q++ = val;
578 *pp = q;
579}
580
Kevin O'Connore51313d2008-03-12 21:19:34 -0400581static void putstr(u8 **pp, const char *str)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500582{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400583 u8 *q;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500584 q = *pp;
585 while (*str)
586 *q++ = *str++;
587 *pp = q;
588}
589
Kevin O'Connore51313d2008-03-12 21:19:34 -0400590static void putle16(u8 **pp, int val)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500591{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400592 u8 *q;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500593 q = *pp;
594 *q++ = val;
595 *q++ = val >> 8;
596 *pp = q;
597}
598
Kevin O'Connore51313d2008-03-12 21:19:34 -0400599static void putle32(u8 **pp, int val)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500600{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400601 u8 *q;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500602 q = *pp;
603 *q++ = val;
604 *q++ = val >> 8;
605 *q++ = val >> 16;
606 *q++ = val >> 24;
607 *pp = q;
608}
609
Kevin O'Connora4d35762008-03-08 15:43:03 -0500610static unsigned long align(unsigned long addr, unsigned long v)
611{
612 return (addr + v - 1) & ~(v - 1);
613}
614
615static void mptable_init(void)
616{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400617 u8 *mp_config_table, *q, *float_pointer_struct;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500618 int ioapic_id, i, len;
619 int mp_config_table_size;
620
Kevin O'Connord9b06592008-05-06 20:00:12 -0400621#if (CONFIG_QEMU == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500622 if (smp_cpus <= 1)
623 return;
624#endif
625
Kevin O'Connord9b06592008-05-06 20:00:12 -0400626#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connor9571ac22008-05-17 22:20:27 -0400627 mp_config_table = (u8 *)(GET_EBDA(ram_size) - CONFIG_ACPI_DATA_SIZE
628 - MPTABLE_MAX_SIZE);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500629#else
630 bios_table_cur_addr = align(bios_table_cur_addr, 16);
Kevin O'Connore51313d2008-03-12 21:19:34 -0400631 mp_config_table = (u8 *)bios_table_cur_addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500632#endif
633 q = mp_config_table;
634 putstr(&q, "PCMP"); /* "PCMP signature */
635 putle16(&q, 0); /* table length (patched later) */
636 putb(&q, 4); /* spec rev */
637 putb(&q, 0); /* checksum (patched later) */
Kevin O'Connord9b06592008-05-06 20:00:12 -0400638#if (CONFIG_QEMU == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500639 putstr(&q, "QEMUCPU "); /* OEM id */
640#else
641 putstr(&q, "BOCHSCPU");
642#endif
643 putstr(&q, "0.1 "); /* vendor id */
644 putle32(&q, 0); /* OEM table ptr */
645 putle16(&q, 0); /* OEM table size */
646 putle16(&q, smp_cpus + 18); /* entry count */
647 putle32(&q, 0xfee00000); /* local APIC addr */
648 putle16(&q, 0); /* ext table length */
649 putb(&q, 0); /* ext table checksum */
650 putb(&q, 0); /* reserved */
651
652 for(i = 0; i < smp_cpus; i++) {
653 putb(&q, 0); /* entry type = processor */
654 putb(&q, i); /* APIC id */
655 putb(&q, 0x11); /* local APIC version number */
656 if (i == 0)
657 putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
658 else
659 putb(&q, 1); /* cpu flags: enabled */
660 putb(&q, 0); /* cpu signature */
661 putb(&q, 6);
662 putb(&q, 0);
663 putb(&q, 0);
664 putle16(&q, 0x201); /* feature flags */
665 putle16(&q, 0);
666
667 putle16(&q, 0); /* reserved */
668 putle16(&q, 0);
669 putle16(&q, 0);
670 putle16(&q, 0);
671 }
672
673 /* isa bus */
674 putb(&q, 1); /* entry type = bus */
675 putb(&q, 0); /* bus ID */
676 putstr(&q, "ISA ");
677
678 /* ioapic */
679 ioapic_id = smp_cpus;
680 putb(&q, 2); /* entry type = I/O APIC */
681 putb(&q, ioapic_id); /* apic ID */
682 putb(&q, 0x11); /* I/O APIC version number */
683 putb(&q, 1); /* enable */
684 putle32(&q, 0xfec00000); /* I/O APIC addr */
685
686 /* irqs */
687 for(i = 0; i < 16; i++) {
688 putb(&q, 3); /* entry type = I/O interrupt */
689 putb(&q, 0); /* interrupt type = vectored interrupt */
690 putb(&q, 0); /* flags: po=0, el=0 */
691 putb(&q, 0);
692 putb(&q, 0); /* source bus ID = ISA */
693 putb(&q, i); /* source bus IRQ */
694 putb(&q, ioapic_id); /* dest I/O APIC ID */
695 putb(&q, i); /* dest I/O APIC interrupt in */
696 }
697 /* patch length */
698 len = q - mp_config_table;
699 mp_config_table[4] = len;
700 mp_config_table[5] = len >> 8;
701
Kevin O'Connor2e7ab8b2008-03-29 14:29:35 -0400702 mp_config_table[7] = -checksum(mp_config_table, q - mp_config_table);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500703
704 mp_config_table_size = q - mp_config_table;
705
Kevin O'Connord9b06592008-05-06 20:00:12 -0400706#if (CONFIG_USE_EBDA_TABLES != 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500707 bios_table_cur_addr += mp_config_table_size;
708#endif
709
710 /* floating pointer structure */
Kevin O'Connord9b06592008-05-06 20:00:12 -0400711#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500712 ebda_cur_addr = align(ebda_cur_addr, 16);
Kevin O'Connore51313d2008-03-12 21:19:34 -0400713 float_pointer_struct = (u8 *)ebda_cur_addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500714#else
715 bios_table_cur_addr = align(bios_table_cur_addr, 16);
Kevin O'Connore51313d2008-03-12 21:19:34 -0400716 float_pointer_struct = (u8 *)bios_table_cur_addr;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500717#endif
718 q = float_pointer_struct;
719 putstr(&q, "_MP_");
720 /* pointer to MP config table */
721 putle32(&q, (unsigned long)mp_config_table);
722
723 putb(&q, 1); /* length in 16 byte units */
724 putb(&q, 4); /* MP spec revision */
725 putb(&q, 0); /* checksum (patched later) */
726 putb(&q, 0); /* MP feature byte 1 */
727
728 putb(&q, 0);
729 putb(&q, 0);
730 putb(&q, 0);
731 putb(&q, 0);
Kevin O'Connor2e7ab8b2008-03-29 14:29:35 -0400732 float_pointer_struct[10] = -checksum(float_pointer_struct
733 , q - float_pointer_struct);
Kevin O'Connord9b06592008-05-06 20:00:12 -0400734#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500735 ebda_cur_addr += (q - float_pointer_struct);
736#else
737 bios_table_cur_addr += (q - float_pointer_struct);
738#endif
Kevin O'Connorac8df8c2008-05-24 23:46:33 -0400739 dprintf(1, "MP table addr=0x%08lx MPC table addr=0x%08lx size=0x%x\n",
Kevin O'Connora4d35762008-03-08 15:43:03 -0500740 (unsigned long)float_pointer_struct,
741 (unsigned long)mp_config_table,
742 mp_config_table_size);
743}
744
745/****************************************************/
746/* ACPI tables init */
747
748/* Table structure from Linux kernel (the ACPI tables are under the
749 BSD license) */
750
751#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
Kevin O'Connore51313d2008-03-12 21:19:34 -0400752 u8 signature [4]; /* ACPI signature (4 ASCII characters) */\
753 u32 length; /* Length of table, in bytes, including header */\
754 u8 revision; /* ACPI Specification minor version # */\
755 u8 checksum; /* To make sum of entire table == 0 */\
756 u8 oem_id [6]; /* OEM identification */\
757 u8 oem_table_id [8]; /* OEM table identification */\
758 u32 oem_revision; /* OEM revision number */\
759 u8 asl_compiler_id [4]; /* ASL compiler vendor ID */\
760 u32 asl_compiler_revision; /* ASL compiler revision number */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500761
762
763struct acpi_table_header /* ACPI common table header */
764{
765 ACPI_TABLE_HEADER_DEF
766};
767
768struct rsdp_descriptor /* Root System Descriptor Pointer */
769{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400770 u8 signature [8]; /* ACPI signature, contains "RSD PTR " */
771 u8 checksum; /* To make sum of struct == 0 */
772 u8 oem_id [6]; /* OEM identification */
773 u8 revision; /* Must be 0 for 1.0, 2 for 2.0 */
774 u32 rsdt_physical_address; /* 32-bit physical address of RSDT */
775 u32 length; /* XSDT Length in bytes including hdr */
776 u64 xsdt_physical_address; /* 64-bit physical address of XSDT */
777 u8 extended_checksum; /* Checksum of entire table */
778 u8 reserved [3]; /* Reserved field must be 0 */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500779};
780
781/*
782 * ACPI 1.0 Root System Description Table (RSDT)
783 */
784struct rsdt_descriptor_rev1
785{
786 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
Kevin O'Connore51313d2008-03-12 21:19:34 -0400787 u32 table_offset_entry [3]; /* Array of pointers to other */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500788 /* ACPI tables */
789};
790
791/*
792 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
793 */
794struct facs_descriptor_rev1
795{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400796 u8 signature[4]; /* ACPI Signature */
797 u32 length; /* Length of structure, in bytes */
798 u32 hardware_signature; /* Hardware configuration signature */
799 u32 firmware_waking_vector; /* ACPI OS waking vector */
800 u32 global_lock; /* Global Lock */
801 u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */
802 u32 reserved1 : 31; /* Must be 0 */
803 u8 resverved3 [40]; /* Reserved - must be zero */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500804};
805
806
807/*
808 * ACPI 1.0 Fixed ACPI Description Table (FADT)
809 */
810struct fadt_descriptor_rev1
811{
812 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
Kevin O'Connore51313d2008-03-12 21:19:34 -0400813 u32 firmware_ctrl; /* Physical address of FACS */
814 u32 dsdt; /* Physical address of DSDT */
815 u8 model; /* System Interrupt Model */
816 u8 reserved1; /* Reserved */
817 u16 sci_int; /* System vector of SCI interrupt */
818 u32 smi_cmd; /* Port address of SMI command port */
819 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
820 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
821 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
822 u8 reserved2; /* Reserved - must be zero */
823 u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
824 u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
825 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
826 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
827 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
828 u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
829 u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
830 u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
831 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
832 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
833 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
834 u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
835 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
836 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
837 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
838 u8 reserved3; /* Reserved */
839 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
840 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
841 u16 flush_size; /* Size of area read to flush caches */
842 u16 flush_stride; /* Stride used in flushing caches */
843 u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
844 u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
845 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
846 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
847 u8 century; /* Index to century in RTC CMOS RAM */
848 u8 reserved4; /* Reserved */
849 u8 reserved4a; /* Reserved */
850 u8 reserved4b; /* Reserved */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500851#if 0
Kevin O'Connore51313d2008-03-12 21:19:34 -0400852 u32 wb_invd : 1; /* The wbinvd instruction works properly */
853 u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
854 u32 proc_c1 : 1; /* All processors support C1 state */
855 u32 plvl2_up : 1; /* C2 state works on MP system */
856 u32 pwr_button : 1; /* Power button is handled as a generic feature */
857 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
858 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
859 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
860 u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */
861 u32 reserved5 : 23; /* Reserved - must be zero */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500862#else
Kevin O'Connore51313d2008-03-12 21:19:34 -0400863 u32 flags;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500864#endif
865};
866
867/*
868 * MADT values and structures
869 */
870
871/* Values for MADT PCATCompat */
872
873#define DUAL_PIC 0
874#define MULTIPLE_APIC 1
875
876
877/* Master MADT */
878
879struct multiple_apic_table
880{
881 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
Kevin O'Connore51313d2008-03-12 21:19:34 -0400882 u32 local_apic_address; /* Physical address of local APIC */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500883#if 0
Kevin O'Connore51313d2008-03-12 21:19:34 -0400884 u32 PCATcompat : 1; /* A one indicates system also has dual 8259s */
885 u32 reserved1 : 31;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500886#else
Kevin O'Connore51313d2008-03-12 21:19:34 -0400887 u32 flags;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500888#endif
889};
890
891
892/* Values for Type in APIC_HEADER_DEF */
893
894#define APIC_PROCESSOR 0
895#define APIC_IO 1
896#define APIC_XRUPT_OVERRIDE 2
897#define APIC_NMI 3
898#define APIC_LOCAL_NMI 4
899#define APIC_ADDRESS_OVERRIDE 5
900#define APIC_IO_SAPIC 6
901#define APIC_LOCAL_SAPIC 7
902#define APIC_XRUPT_SOURCE 8
903#define APIC_RESERVED 9 /* 9 and greater are reserved */
904
905/*
906 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
907 */
908#define APIC_HEADER_DEF /* Common APIC sub-structure header */\
Kevin O'Connore51313d2008-03-12 21:19:34 -0400909 u8 type; \
910 u8 length;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500911
912/* Sub-structures for MADT */
913
914struct madt_processor_apic
915{
916 APIC_HEADER_DEF
Kevin O'Connore51313d2008-03-12 21:19:34 -0400917 u8 processor_id; /* ACPI processor id */
918 u8 local_apic_id; /* Processor's local APIC id */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500919#if 0
Kevin O'Connore51313d2008-03-12 21:19:34 -0400920 u32 processor_enabled: 1; /* Processor is usable if set */
921 u32 reserved2 : 31; /* Reserved, must be zero */
Kevin O'Connora4d35762008-03-08 15:43:03 -0500922#else
Kevin O'Connore51313d2008-03-12 21:19:34 -0400923 u32 flags;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500924#endif
925};
926
927struct madt_io_apic
928{
929 APIC_HEADER_DEF
Kevin O'Connore51313d2008-03-12 21:19:34 -0400930 u8 io_apic_id; /* I/O APIC ID */
931 u8 reserved; /* Reserved - must be zero */
932 u32 address; /* APIC physical address */
933 u32 interrupt; /* Global system interrupt where INTI
Kevin O'Connora4d35762008-03-08 15:43:03 -0500934 * lines start */
935};
936
937#include "acpi-dsdt.hex"
938
Kevin O'Connore51313d2008-03-12 21:19:34 -0400939static inline u16 cpu_to_le16(u16 x)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500940{
941 return x;
942}
943
Kevin O'Connore51313d2008-03-12 21:19:34 -0400944static inline u32 cpu_to_le32(u32 x)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500945{
946 return x;
947}
948
Kevin O'Connora4d35762008-03-08 15:43:03 -0500949static void acpi_build_table_header(struct acpi_table_header *h,
Kevin O'Connore51313d2008-03-12 21:19:34 -0400950 char *sig, int len, u8 rev)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500951{
952 memcpy(h->signature, sig, 4);
953 h->length = cpu_to_le32(len);
954 h->revision = rev;
Kevin O'Connord9b06592008-05-06 20:00:12 -0400955#if (CONFIG_QEMU == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500956 memcpy(h->oem_id, "QEMU ", 6);
957 memcpy(h->oem_table_id, "QEMU", 4);
958#else
959 memcpy(h->oem_id, "BOCHS ", 6);
960 memcpy(h->oem_table_id, "BXPC", 4);
961#endif
962 memcpy(h->oem_table_id + 4, sig, 4);
963 h->oem_revision = cpu_to_le32(1);
Kevin O'Connord9b06592008-05-06 20:00:12 -0400964#if (CONFIG_QEMU == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500965 memcpy(h->asl_compiler_id, "QEMU", 4);
966#else
967 memcpy(h->asl_compiler_id, "BXPC", 4);
968#endif
969 h->asl_compiler_revision = cpu_to_le32(1);
Kevin O'Connor2e7ab8b2008-03-29 14:29:35 -0400970 h->checksum = -checksum((void *)h, len);
Kevin O'Connora4d35762008-03-08 15:43:03 -0500971}
972
Kevin O'Connore51313d2008-03-12 21:19:34 -0400973int acpi_build_processor_ssdt(u8 *ssdt)
Kevin O'Connora4d35762008-03-08 15:43:03 -0500974{
Kevin O'Connore51313d2008-03-12 21:19:34 -0400975 u8 *ssdt_ptr = ssdt;
Kevin O'Connora4d35762008-03-08 15:43:03 -0500976 int i, length;
977 int acpi_cpus = smp_cpus > 0xff ? 0xff : smp_cpus;
978
979 ssdt_ptr[9] = 0; // checksum;
980 ssdt_ptr += sizeof(struct acpi_table_header);
981
982 // caluculate the length of processor block and scope block excluding PkgLength
983 length = 0x0d * acpi_cpus + 4;
984
985 // build processor scope header
986 *(ssdt_ptr++) = 0x10; // ScopeOp
987 if (length <= 0x3e) {
988 *(ssdt_ptr++) = length + 1;
989 } else {
990 *(ssdt_ptr++) = 0x7F;
991 *(ssdt_ptr++) = (length + 2) >> 6;
992 }
993 *(ssdt_ptr++) = '_'; // Name
994 *(ssdt_ptr++) = 'P';
995 *(ssdt_ptr++) = 'R';
996 *(ssdt_ptr++) = '_';
997
998 // build object for each processor
999 for(i=0;i<acpi_cpus;i++) {
1000 *(ssdt_ptr++) = 0x5B; // ProcessorOp
1001 *(ssdt_ptr++) = 0x83;
1002 *(ssdt_ptr++) = 0x0B; // Length
1003 *(ssdt_ptr++) = 'C'; // Name (CPUxx)
1004 *(ssdt_ptr++) = 'P';
1005 if ((i & 0xf0) != 0)
1006 *(ssdt_ptr++) = (i >> 4) < 0xa ? (i >> 4) + '0' : (i >> 4) + 'A' - 0xa;
1007 else
1008 *(ssdt_ptr++) = 'U';
1009 *(ssdt_ptr++) = (i & 0xf) < 0xa ? (i & 0xf) + '0' : (i & 0xf) + 'A' - 0xa;
1010 *(ssdt_ptr++) = i;
1011 *(ssdt_ptr++) = 0x10; // Processor block address
1012 *(ssdt_ptr++) = 0xb0;
1013 *(ssdt_ptr++) = 0;
1014 *(ssdt_ptr++) = 0;
1015 *(ssdt_ptr++) = 6; // Processor block length
1016 }
1017
1018 acpi_build_table_header((struct acpi_table_header *)ssdt,
1019 "SSDT", ssdt_ptr - ssdt, 1);
1020
1021 return ssdt_ptr - ssdt;
1022}
1023
1024/* base_addr must be a multiple of 4KB */
1025void acpi_bios_init(void)
1026{
1027 struct rsdp_descriptor *rsdp;
1028 struct rsdt_descriptor_rev1 *rsdt;
1029 struct fadt_descriptor_rev1 *fadt;
1030 struct facs_descriptor_rev1 *facs;
1031 struct multiple_apic_table *madt;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001032 u8 *dsdt, *ssdt;
1033 u32 base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr, ssdt_addr;
1034 u32 acpi_tables_size, madt_addr, madt_size;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001035 int i;
1036
1037 /* reserve memory space for tables */
Kevin O'Connord9b06592008-05-06 20:00:12 -04001038#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001039 ebda_cur_addr = align(ebda_cur_addr, 16);
1040 rsdp = (void *)(ebda_cur_addr);
1041 ebda_cur_addr += sizeof(*rsdp);
1042#else
1043 bios_table_cur_addr = align(bios_table_cur_addr, 16);
1044 rsdp = (void *)(bios_table_cur_addr);
1045 bios_table_cur_addr += sizeof(*rsdp);
1046#endif
1047
Kevin O'Connor9571ac22008-05-17 22:20:27 -04001048 addr = base_addr = GET_EBDA(ram_size) - CONFIG_ACPI_DATA_SIZE;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001049 rsdt_addr = addr;
1050 rsdt = (void *)(addr);
1051 addr += sizeof(*rsdt);
1052
1053 fadt_addr = addr;
1054 fadt = (void *)(addr);
1055 addr += sizeof(*fadt);
1056
1057 /* XXX: FACS should be in RAM */
1058 addr = (addr + 63) & ~63; /* 64 byte alignment for FACS */
1059 facs_addr = addr;
1060 facs = (void *)(addr);
1061 addr += sizeof(*facs);
1062
1063 dsdt_addr = addr;
1064 dsdt = (void *)(addr);
1065 addr += sizeof(AmlCode);
1066
1067 ssdt_addr = addr;
1068 ssdt = (void *)(addr);
1069 addr += acpi_build_processor_ssdt(ssdt);
1070
1071 addr = (addr + 7) & ~7;
1072 madt_addr = addr;
1073 madt_size = sizeof(*madt) +
1074 sizeof(struct madt_processor_apic) * smp_cpus +
1075 sizeof(struct madt_io_apic);
1076 madt = (void *)(addr);
1077 addr += madt_size;
1078
1079 acpi_tables_size = addr - base_addr;
1080
Kevin O'Connorac8df8c2008-05-24 23:46:33 -04001081 dprintf(1, "ACPI tables: RSDP addr=0x%08lx"
1082 " ACPI DATA addr=0x%08lx size=0x%x\n",
Kevin O'Connora4d35762008-03-08 15:43:03 -05001083 (unsigned long)rsdp,
1084 (unsigned long)rsdt, acpi_tables_size);
1085
1086 /* RSDP */
1087 memset(rsdp, 0, sizeof(*rsdp));
1088 memcpy(rsdp->signature, "RSD PTR ", 8);
Kevin O'Connord9b06592008-05-06 20:00:12 -04001089#if (CONFIG_QEMU == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001090 memcpy(rsdp->oem_id, "QEMU ", 6);
1091#else
1092 memcpy(rsdp->oem_id, "BOCHS ", 6);
1093#endif
1094 rsdp->rsdt_physical_address = cpu_to_le32(rsdt_addr);
Kevin O'Connor2e7ab8b2008-03-29 14:29:35 -04001095 rsdp->checksum = -checksum((void *)rsdp, 20);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001096
1097 /* RSDT */
1098 memset(rsdt, 0, sizeof(*rsdt));
1099 rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr);
1100 rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr);
1101 rsdt->table_offset_entry[2] = cpu_to_le32(ssdt_addr);
1102 acpi_build_table_header((struct acpi_table_header *)rsdt,
1103 "RSDT", sizeof(*rsdt), 1);
1104
1105 /* FADT */
1106 memset(fadt, 0, sizeof(*fadt));
1107 fadt->firmware_ctrl = cpu_to_le32(facs_addr);
1108 fadt->dsdt = cpu_to_le32(dsdt_addr);
1109 fadt->model = 1;
1110 fadt->reserved1 = 0;
1111 fadt->sci_int = cpu_to_le16(pm_sci_int);
1112 fadt->smi_cmd = cpu_to_le32(SMI_CMD_IO_ADDR);
1113 fadt->acpi_enable = 0xf1;
1114 fadt->acpi_disable = 0xf0;
1115 fadt->pm1a_evt_blk = cpu_to_le32(pm_io_base);
1116 fadt->pm1a_cnt_blk = cpu_to_le32(pm_io_base + 0x04);
1117 fadt->pm_tmr_blk = cpu_to_le32(pm_io_base + 0x08);
1118 fadt->pm1_evt_len = 4;
1119 fadt->pm1_cnt_len = 2;
1120 fadt->pm_tmr_len = 4;
Kevin O'Connor02270952008-05-13 22:31:39 -04001121 fadt->plvl2_lat = cpu_to_le16(0xfff); // C2 state not supported
1122 fadt->plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported
Kevin O'Connora4d35762008-03-08 15:43:03 -05001123 /* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */
1124 fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6));
1125 acpi_build_table_header((struct acpi_table_header *)fadt, "FACP",
1126 sizeof(*fadt), 1);
1127
1128 /* FACS */
1129 memset(facs, 0, sizeof(*facs));
1130 memcpy(facs->signature, "FACS", 4);
1131 facs->length = cpu_to_le32(sizeof(*facs));
1132
1133 /* DSDT */
1134 memcpy(dsdt, AmlCode, sizeof(AmlCode));
1135
1136 /* MADT */
1137 {
1138 struct madt_processor_apic *apic;
1139 struct madt_io_apic *io_apic;
1140
1141 memset(madt, 0, madt_size);
1142 madt->local_apic_address = cpu_to_le32(0xfee00000);
1143 madt->flags = cpu_to_le32(1);
1144 apic = (void *)(madt + 1);
1145 for(i=0;i<smp_cpus;i++) {
1146 apic->type = APIC_PROCESSOR;
1147 apic->length = sizeof(*apic);
1148 apic->processor_id = i;
1149 apic->local_apic_id = i;
1150 apic->flags = cpu_to_le32(1);
1151 apic++;
1152 }
1153 io_apic = (void *)apic;
1154 io_apic->type = APIC_IO;
1155 io_apic->length = sizeof(*io_apic);
1156 io_apic->io_apic_id = smp_cpus;
1157 io_apic->address = cpu_to_le32(0xfec00000);
1158 io_apic->interrupt = cpu_to_le32(0);
1159
1160 acpi_build_table_header((struct acpi_table_header *)madt,
1161 "APIC", madt_size, 1);
1162 }
1163}
1164
1165/* SMBIOS entry point -- must be written to a 16-bit aligned address
1166 between 0xf0000 and 0xfffff.
1167 */
1168struct smbios_entry_point {
1169 char anchor_string[4];
Kevin O'Connore51313d2008-03-12 21:19:34 -04001170 u8 checksum;
1171 u8 length;
1172 u8 smbios_major_version;
1173 u8 smbios_minor_version;
1174 u16 max_structure_size;
1175 u8 entry_point_revision;
1176 u8 formatted_area[5];
Kevin O'Connora4d35762008-03-08 15:43:03 -05001177 char intermediate_anchor_string[5];
Kevin O'Connore51313d2008-03-12 21:19:34 -04001178 u8 intermediate_checksum;
1179 u16 structure_table_length;
1180 u32 structure_table_address;
1181 u16 number_of_structures;
1182 u8 smbios_bcd_revision;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001183} __attribute__((__packed__));
1184
1185/* This goes at the beginning of every SMBIOS structure. */
1186struct smbios_structure_header {
Kevin O'Connore51313d2008-03-12 21:19:34 -04001187 u8 type;
1188 u8 length;
1189 u16 handle;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001190} __attribute__((__packed__));
1191
1192/* SMBIOS type 0 - BIOS Information */
1193struct smbios_type_0 {
1194 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001195 u8 vendor_str;
1196 u8 bios_version_str;
1197 u16 bios_starting_address_segment;
1198 u8 bios_release_date_str;
1199 u8 bios_rom_size;
1200 u8 bios_characteristics[8];
1201 u8 bios_characteristics_extension_bytes[2];
1202 u8 system_bios_major_release;
1203 u8 system_bios_minor_release;
1204 u8 embedded_controller_major_release;
1205 u8 embedded_controller_minor_release;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001206} __attribute__((__packed__));
1207
1208/* SMBIOS type 1 - System Information */
1209struct smbios_type_1 {
1210 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001211 u8 manufacturer_str;
1212 u8 product_name_str;
1213 u8 version_str;
1214 u8 serial_number_str;
1215 u8 uuid[16];
1216 u8 wake_up_type;
1217 u8 sku_number_str;
1218 u8 family_str;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001219} __attribute__((__packed__));
1220
1221/* SMBIOS type 3 - System Enclosure (v2.3) */
1222struct smbios_type_3 {
1223 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001224 u8 manufacturer_str;
1225 u8 type;
1226 u8 version_str;
1227 u8 serial_number_str;
1228 u8 asset_tag_number_str;
1229 u8 boot_up_state;
1230 u8 power_supply_state;
1231 u8 thermal_state;
1232 u8 security_status;
1233 u32 oem_defined;
1234 u8 height;
1235 u8 number_of_power_cords;
1236 u8 contained_element_count;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001237 // contained elements follow
1238} __attribute__((__packed__));
1239
1240/* SMBIOS type 4 - Processor Information (v2.0) */
1241struct smbios_type_4 {
1242 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001243 u8 socket_designation_str;
1244 u8 processor_type;
1245 u8 processor_family;
1246 u8 processor_manufacturer_str;
1247 u32 processor_id[2];
1248 u8 processor_version_str;
1249 u8 voltage;
1250 u16 external_clock;
1251 u16 max_speed;
1252 u16 current_speed;
1253 u8 status;
1254 u8 processor_upgrade;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001255} __attribute__((__packed__));
1256
1257/* SMBIOS type 16 - Physical Memory Array
1258 * Associated with one type 17 (Memory Device).
1259 */
1260struct smbios_type_16 {
1261 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001262 u8 location;
1263 u8 use;
1264 u8 error_correction;
1265 u32 maximum_capacity;
1266 u16 memory_error_information_handle;
1267 u16 number_of_memory_devices;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001268} __attribute__((__packed__));
1269
1270/* SMBIOS type 17 - Memory Device
1271 * Associated with one type 19
1272 */
1273struct smbios_type_17 {
1274 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001275 u16 physical_memory_array_handle;
1276 u16 memory_error_information_handle;
1277 u16 total_width;
1278 u16 data_width;
1279 u16 size;
1280 u8 form_factor;
1281 u8 device_set;
1282 u8 device_locator_str;
1283 u8 bank_locator_str;
1284 u8 memory_type;
1285 u16 type_detail;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001286} __attribute__((__packed__));
1287
1288/* SMBIOS type 19 - Memory Array Mapped Address */
1289struct smbios_type_19 {
1290 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001291 u32 starting_address;
1292 u32 ending_address;
1293 u16 memory_array_handle;
1294 u8 partition_width;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001295} __attribute__((__packed__));
1296
1297/* SMBIOS type 20 - Memory Device Mapped Address */
1298struct smbios_type_20 {
1299 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001300 u32 starting_address;
1301 u32 ending_address;
1302 u16 memory_device_handle;
1303 u16 memory_array_mapped_address_handle;
1304 u8 partition_row_position;
1305 u8 interleave_position;
1306 u8 interleaved_data_depth;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001307} __attribute__((__packed__));
1308
1309/* SMBIOS type 32 - System Boot Information */
1310struct smbios_type_32 {
1311 struct smbios_structure_header header;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001312 u8 reserved[6];
1313 u8 boot_status;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001314} __attribute__((__packed__));
1315
1316/* SMBIOS type 127 -- End-of-table */
1317struct smbios_type_127 {
1318 struct smbios_structure_header header;
1319} __attribute__((__packed__));
1320
1321static void
1322smbios_entry_point_init(void *start,
Kevin O'Connore51313d2008-03-12 21:19:34 -04001323 u16 max_structure_size,
1324 u16 structure_table_length,
1325 u32 structure_table_address,
1326 u16 number_of_structures)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001327{
Kevin O'Connora4d35762008-03-08 15:43:03 -05001328 struct smbios_entry_point *ep = (struct smbios_entry_point *)start;
1329
1330 memcpy(ep->anchor_string, "_SM_", 4);
1331 ep->length = 0x1f;
1332 ep->smbios_major_version = 2;
1333 ep->smbios_minor_version = 4;
1334 ep->max_structure_size = max_structure_size;
1335 ep->entry_point_revision = 0;
1336 memset(ep->formatted_area, 0, 5);
1337 memcpy(ep->intermediate_anchor_string, "_DMI_", 5);
1338
1339 ep->structure_table_length = structure_table_length;
1340 ep->structure_table_address = structure_table_address;
1341 ep->number_of_structures = number_of_structures;
1342 ep->smbios_bcd_revision = 0x24;
1343
1344 ep->checksum = 0;
1345 ep->intermediate_checksum = 0;
1346
Kevin O'Connor2e7ab8b2008-03-29 14:29:35 -04001347 ep->checksum = -checksum(start, 0x10);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001348
Kevin O'Connor2e7ab8b2008-03-29 14:29:35 -04001349 ep->intermediate_checksum = -checksum(start + 0x10, ep->length - 0x10);
1350}
Kevin O'Connora4d35762008-03-08 15:43:03 -05001351
1352/* Type 0 -- BIOS Information */
1353#define RELEASE_DATE_STR "01/01/2007"
1354static void *
1355smbios_type_0_init(void *start)
1356{
1357 struct smbios_type_0 *p = (struct smbios_type_0 *)start;
1358
1359 p->header.type = 0;
1360 p->header.length = sizeof(struct smbios_type_0);
1361 p->header.handle = 0;
1362
1363 p->vendor_str = 1;
1364 p->bios_version_str = 1;
1365 p->bios_starting_address_segment = 0xe800;
1366 p->bios_release_date_str = 2;
1367 p->bios_rom_size = 0; /* FIXME */
1368
1369 memset(p->bios_characteristics, 0, 7);
1370 p->bios_characteristics[7] = 0x08; /* BIOS characteristics not supported */
1371 p->bios_characteristics_extension_bytes[0] = 0;
1372 p->bios_characteristics_extension_bytes[1] = 0;
1373
1374 p->system_bios_major_release = 1;
1375 p->system_bios_minor_release = 0;
1376 p->embedded_controller_major_release = 0xff;
1377 p->embedded_controller_minor_release = 0xff;
1378
1379 start += sizeof(struct smbios_type_0);
Kevin O'Connord9b06592008-05-06 20:00:12 -04001380 memcpy((char *)start, CONFIG_APPNAME, sizeof(CONFIG_APPNAME));
1381 start += sizeof(CONFIG_APPNAME);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001382 memcpy((char *)start, RELEASE_DATE_STR, sizeof(RELEASE_DATE_STR));
1383 start += sizeof(RELEASE_DATE_STR);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001384 *((u8 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001385
1386 return start+1;
1387}
1388
1389/* Type 1 -- System Information */
1390static void *
1391smbios_type_1_init(void *start)
1392{
1393 struct smbios_type_1 *p = (struct smbios_type_1 *)start;
1394 p->header.type = 1;
1395 p->header.length = sizeof(struct smbios_type_1);
1396 p->header.handle = 0x100;
1397
1398 p->manufacturer_str = 0;
1399 p->product_name_str = 0;
1400 p->version_str = 0;
1401 p->serial_number_str = 0;
1402
1403 memcpy(p->uuid, bios_uuid, 16);
1404
1405 p->wake_up_type = 0x06; /* power switch */
1406 p->sku_number_str = 0;
1407 p->family_str = 0;
1408
1409 start += sizeof(struct smbios_type_1);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001410 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001411
1412 return start+2;
1413}
1414
1415/* Type 3 -- System Enclosure */
1416static void *
1417smbios_type_3_init(void *start)
1418{
1419 struct smbios_type_3 *p = (struct smbios_type_3 *)start;
1420
1421 p->header.type = 3;
1422 p->header.length = sizeof(struct smbios_type_3);
1423 p->header.handle = 0x300;
1424
1425 p->manufacturer_str = 0;
1426 p->type = 0x01; /* other */
1427 p->version_str = 0;
1428 p->serial_number_str = 0;
1429 p->asset_tag_number_str = 0;
1430 p->boot_up_state = 0x03; /* safe */
1431 p->power_supply_state = 0x03; /* safe */
1432 p->thermal_state = 0x03; /* safe */
1433 p->security_status = 0x02; /* unknown */
1434 p->oem_defined = 0;
1435 p->height = 0;
1436 p->number_of_power_cords = 0;
1437 p->contained_element_count = 0;
1438
1439 start += sizeof(struct smbios_type_3);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001440 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001441
1442 return start+2;
1443}
1444
1445/* Type 4 -- Processor Information */
1446static void *
1447smbios_type_4_init(void *start, unsigned int cpu_number)
1448{
1449 struct smbios_type_4 *p = (struct smbios_type_4 *)start;
1450
1451 p->header.type = 4;
1452 p->header.length = sizeof(struct smbios_type_4);
1453 p->header.handle = 0x400 + cpu_number;
1454
1455 p->socket_designation_str = 1;
1456 p->processor_type = 0x03; /* CPU */
1457 p->processor_family = 0x01; /* other */
1458 p->processor_manufacturer_str = 0;
1459
1460 p->processor_id[0] = cpuid_signature;
1461 p->processor_id[1] = cpuid_features;
1462
1463 p->processor_version_str = 0;
1464 p->voltage = 0;
1465 p->external_clock = 0;
1466
1467 p->max_speed = 0; /* unknown */
1468 p->current_speed = 0; /* unknown */
1469
1470 p->status = 0x41; /* socket populated, CPU enabled */
1471 p->processor_upgrade = 0x01; /* other */
1472
1473 start += sizeof(struct smbios_type_4);
1474
1475 memcpy((char *)start, "CPU " "\0" "" "\0" "", 7);
1476 ((char *)start)[4] = cpu_number + '0';
1477
1478 return start+7;
1479}
1480
1481/* Type 16 -- Physical Memory Array */
1482static void *
Kevin O'Connore51313d2008-03-12 21:19:34 -04001483smbios_type_16_init(void *start, u32 memsize)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001484{
1485 struct smbios_type_16 *p = (struct smbios_type_16*)start;
1486
1487 p->header.type = 16;
1488 p->header.length = sizeof(struct smbios_type_16);
1489 p->header.handle = 0x1000;
1490
1491 p->location = 0x01; /* other */
1492 p->use = 0x03; /* system memory */
1493 p->error_correction = 0x01; /* other */
1494 p->maximum_capacity = memsize * 1024;
1495 p->memory_error_information_handle = 0xfffe; /* none provided */
1496 p->number_of_memory_devices = 1;
1497
1498 start += sizeof(struct smbios_type_16);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001499 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001500
1501 return start + 2;
1502}
1503
1504/* Type 17 -- Memory Device */
1505static void *
Kevin O'Connore51313d2008-03-12 21:19:34 -04001506smbios_type_17_init(void *start, u32 memory_size_mb)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001507{
1508 struct smbios_type_17 *p = (struct smbios_type_17 *)start;
1509
1510 p->header.type = 17;
1511 p->header.length = sizeof(struct smbios_type_17);
1512 p->header.handle = 0x1100;
1513
1514 p->physical_memory_array_handle = 0x1000;
1515 p->total_width = 64;
1516 p->data_width = 64;
1517 /* truncate memory_size_mb to 16 bits and clear most significant
1518 bit [indicates size in MB] */
Kevin O'Connore51313d2008-03-12 21:19:34 -04001519 p->size = (u16) memory_size_mb & 0x7fff;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001520 p->form_factor = 0x09; /* DIMM */
1521 p->device_set = 0;
1522 p->device_locator_str = 1;
1523 p->bank_locator_str = 0;
1524 p->memory_type = 0x07; /* RAM */
1525 p->type_detail = 0;
1526
1527 start += sizeof(struct smbios_type_17);
1528 memcpy((char *)start, "DIMM 1", 7);
1529 start += 7;
Kevin O'Connore51313d2008-03-12 21:19:34 -04001530 *((u8 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001531
1532 return start+1;
1533}
1534
1535/* Type 19 -- Memory Array Mapped Address */
1536static void *
Kevin O'Connore51313d2008-03-12 21:19:34 -04001537smbios_type_19_init(void *start, u32 memory_size_mb)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001538{
1539 struct smbios_type_19 *p = (struct smbios_type_19 *)start;
1540
1541 p->header.type = 19;
1542 p->header.length = sizeof(struct smbios_type_19);
1543 p->header.handle = 0x1300;
1544
1545 p->starting_address = 0;
1546 p->ending_address = (memory_size_mb-1) * 1024;
1547 p->memory_array_handle = 0x1000;
1548 p->partition_width = 1;
1549
1550 start += sizeof(struct smbios_type_19);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001551 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001552
1553 return start + 2;
1554}
1555
1556/* Type 20 -- Memory Device Mapped Address */
1557static void *
Kevin O'Connore51313d2008-03-12 21:19:34 -04001558smbios_type_20_init(void *start, u32 memory_size_mb)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001559{
1560 struct smbios_type_20 *p = (struct smbios_type_20 *)start;
1561
1562 p->header.type = 20;
1563 p->header.length = sizeof(struct smbios_type_20);
1564 p->header.handle = 0x1400;
1565
1566 p->starting_address = 0;
1567 p->ending_address = (memory_size_mb-1)*1024;
1568 p->memory_device_handle = 0x1100;
1569 p->memory_array_mapped_address_handle = 0x1300;
1570 p->partition_row_position = 1;
1571 p->interleave_position = 0;
1572 p->interleaved_data_depth = 0;
1573
1574 start += sizeof(struct smbios_type_20);
1575
Kevin O'Connore51313d2008-03-12 21:19:34 -04001576 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001577 return start+2;
1578}
1579
1580/* Type 32 -- System Boot Information */
1581static void *
1582smbios_type_32_init(void *start)
1583{
1584 struct smbios_type_32 *p = (struct smbios_type_32 *)start;
1585
1586 p->header.type = 32;
1587 p->header.length = sizeof(struct smbios_type_32);
1588 p->header.handle = 0x2000;
1589 memset(p->reserved, 0, 6);
1590 p->boot_status = 0; /* no errors detected */
1591
1592 start += sizeof(struct smbios_type_32);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001593 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001594
1595 return start+2;
1596}
1597
1598/* Type 127 -- End of Table */
1599static void *
1600smbios_type_127_init(void *start)
1601{
1602 struct smbios_type_127 *p = (struct smbios_type_127 *)start;
1603
1604 p->header.type = 127;
1605 p->header.length = sizeof(struct smbios_type_127);
1606 p->header.handle = 0x7f00;
1607
1608 start += sizeof(struct smbios_type_127);
Kevin O'Connore51313d2008-03-12 21:19:34 -04001609 *((u16 *)start) = 0;
Kevin O'Connora4d35762008-03-08 15:43:03 -05001610
1611 return start + 2;
1612}
1613
1614void smbios_init(void)
1615{
1616 unsigned cpu_num, nr_structs = 0, max_struct_size = 0;
1617 char *start, *p, *q;
Kevin O'Connor9571ac22008-05-17 22:20:27 -04001618 int memsize = GET_EBDA(ram_size) / (1024 * 1024);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001619
Kevin O'Connord9b06592008-05-06 20:00:12 -04001620#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001621 ebda_cur_addr = align(ebda_cur_addr, 16);
1622 start = (void *)(ebda_cur_addr);
1623#else
1624 bios_table_cur_addr = align(bios_table_cur_addr, 16);
1625 start = (void *)(bios_table_cur_addr);
1626#endif
1627
Kevin O'Connor2ad37442008-05-06 19:49:01 -04001628 p = (char *)start + sizeof(struct smbios_entry_point);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001629
1630#define add_struct(fn) { \
1631 q = (fn); \
1632 nr_structs++; \
1633 if ((q - p) > max_struct_size) \
1634 max_struct_size = q - p; \
1635 p = q; \
1636}
1637
1638 add_struct(smbios_type_0_init(p));
1639 add_struct(smbios_type_1_init(p));
1640 add_struct(smbios_type_3_init(p));
1641 for (cpu_num = 1; cpu_num <= smp_cpus; cpu_num++)
1642 add_struct(smbios_type_4_init(p, cpu_num));
1643 add_struct(smbios_type_16_init(p, memsize));
1644 add_struct(smbios_type_17_init(p, memsize));
1645 add_struct(smbios_type_19_init(p, memsize));
1646 add_struct(smbios_type_20_init(p, memsize));
1647 add_struct(smbios_type_32_init(p));
1648 add_struct(smbios_type_127_init(p));
1649
1650#undef add_struct
1651
1652 smbios_entry_point_init(
1653 start, max_struct_size,
1654 (p - (char *)start) - sizeof(struct smbios_entry_point),
Kevin O'Connore51313d2008-03-12 21:19:34 -04001655 (u32)(start + sizeof(struct smbios_entry_point)),
Kevin O'Connora4d35762008-03-08 15:43:03 -05001656 nr_structs);
1657
Kevin O'Connord9b06592008-05-06 20:00:12 -04001658#if (CONFIG_USE_EBDA_TABLES == 1)
Kevin O'Connora4d35762008-03-08 15:43:03 -05001659 ebda_cur_addr += (p - (char *)start);
1660#else
1661 bios_table_cur_addr += (p - (char *)start);
1662#endif
1663
Kevin O'Connorac8df8c2008-05-24 23:46:33 -04001664 dprintf(1, "SMBIOS table addr=0x%08lx\n", (unsigned long)start);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001665}
1666
1667void rombios32_init(void)
1668{
Kevin O'Connorf64f0db2008-05-18 02:42:58 -04001669 if (CONFIG_COREBOOT)
1670 // XXX - not supported on coreboot yet.
1671 return;
1672
Kevin O'Connorac8df8c2008-05-24 23:46:33 -04001673 dprintf(1, "Starting rombios32\n");
Kevin O'Connora4d35762008-03-08 15:43:03 -05001674
Kevin O'Connor9571ac22008-05-17 22:20:27 -04001675#if (CONFIG_USE_EBDA_TABLES == 1)
1676 ebda_cur_addr = ((*(u16 *)(0x40e)) << 4) + 0x380;
Kevin O'Connorac8df8c2008-05-24 23:46:33 -04001677 dprintf(1, "ebda_cur_addr: 0x%08lx\n", ebda_cur_addr);
Kevin O'Connor9571ac22008-05-17 22:20:27 -04001678#endif
Kevin O'Connora4d35762008-03-08 15:43:03 -05001679
1680 cpu_probe();
1681
1682 smp_probe();
1683
Kevin O'Connora4d35762008-03-08 15:43:03 -05001684 pci_bios_init();
1685
1686 if (bios_table_cur_addr != 0) {
1687
1688 mptable_init();
1689
Kevin O'Connor02270952008-05-13 22:31:39 -04001690 uuid_probe();
1691
Kevin O'Connora4d35762008-03-08 15:43:03 -05001692 smbios_init();
1693
1694 if (acpi_enabled)
1695 acpi_bios_init();
1696
1697 bios_lock_shadow_ram();
1698
Kevin O'Connorac8df8c2008-05-24 23:46:33 -04001699 dprintf(1, "bios_table_cur_addr: 0x%08lx\n", bios_table_cur_addr);
Kevin O'Connora4d35762008-03-08 15:43:03 -05001700 if (bios_table_cur_addr > bios_table_end_addr)
1701 BX_PANIC("bios_table_end_addr overflow!\n");
1702 }
1703}