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Kevin O'Connorda4a6482008-06-08 13:48:06 -04001// Support for enabling/disabling BIOS ram shadowing.
2//
Kevin O'Connor5bd01de2010-09-13 21:19:27 -04003// Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connorda4a6482008-06-08 13:48:06 -04004// Copyright (C) 2006 Fabrice Bellard
5//
Kevin O'Connorb1b7c2a2009-01-15 20:52:58 -05006// This file may be distributed under the terms of the GNU LGPLv3 license.
Kevin O'Connorda4a6482008-06-08 13:48:06 -04007
8#include "util.h" // memcpy
9#include "pci.h" // pci_config_writeb
Kevin O'Connor9521e262008-07-04 13:04:29 -040010#include "config.h" // CONFIG_*
Kevin O'Connor2ed2f582008-11-08 15:53:36 -050011#include "pci_ids.h" // PCI_VENDOR_ID_INTEL
Kevin O'Connorfaf6a4e2011-06-21 21:22:01 -040012#include "pci_regs.h" // PCI_VENDOR_ID
Ian Campbell74c78782011-06-01 11:00:29 +010013#include "xen.h" // usingXen
Kevin O'Connorda4a6482008-06-08 13:48:06 -040014
Kevin O'Connor35284962009-07-24 21:49:26 -040015// On the emulators, the bios at 0xf0000 is also at 0xffff0000
Kevin O'Connor5bd01de2010-09-13 21:19:27 -040016#define BIOS_SRC_OFFSET 0xfff00000
Kevin O'Connor35284962009-07-24 21:49:26 -040017
Kevin O'Connor6e4583c2011-06-19 10:09:26 -040018#define I440FX_PAM0 0x59
19
Kevin O'Connorda4a6482008-06-08 13:48:06 -040020// Enable shadowing and copy bios.
21static void
Isaku Yamahata08328e72010-07-20 16:50:45 +090022__make_bios_writable_intel(u16 bdf, u32 pam0)
Kevin O'Connorda4a6482008-06-08 13:48:06 -040023{
Kevin O'Connore7739302009-07-26 19:16:09 -040024 // Make ram from 0xc0000-0xf0000 writable
25 int clear = 0;
26 int i;
27 for (i=0; i<6; i++) {
Kevin O'Connor5bd01de2010-09-13 21:19:27 -040028 u32 pam = pam0 + 1 + i;
29 int reg = pci_config_readb(bdf, pam);
30 if (CONFIG_OPTIONROMS_DEPLOYED && (reg & 0x11) != 0x11) {
Anthony Liguori034ce4b2009-12-18 12:16:01 +010031 // Need to copy optionroms to work around qemu implementation
32 void *mem = (void*)(BUILD_ROM_START + i * 32*1024);
33 memcpy((void*)BUILD_BIOS_TMP_ADDR, mem, 32*1024);
Isaku Yamahata08328e72010-07-20 16:50:45 +090034 pci_config_writeb(bdf, pam, 0x33);
Anthony Liguori034ce4b2009-12-18 12:16:01 +010035 memcpy(mem, (void*)BUILD_BIOS_TMP_ADDR, 32*1024);
36 clear = 1;
Kevin O'Connore7739302009-07-26 19:16:09 -040037 } else {
Isaku Yamahata08328e72010-07-20 16:50:45 +090038 pci_config_writeb(bdf, pam, 0x33);
Kevin O'Connore7739302009-07-26 19:16:09 -040039 }
40 }
41 if (clear)
42 memset((void*)BUILD_BIOS_TMP_ADDR, 0, 32*1024);
43
Kevin O'Connor5b8f8092009-09-20 19:47:45 -040044 // Make ram from 0xf0000-0x100000 writable
Isaku Yamahata08328e72010-07-20 16:50:45 +090045 int reg = pci_config_readb(bdf, pam0);
46 pci_config_writeb(bdf, pam0, 0x30);
Kevin O'Connor5b8f8092009-09-20 19:47:45 -040047 if (reg & 0x10)
48 // Ram already present.
49 return;
50
51 // Copy bios.
Kevin O'Connor5bd01de2010-09-13 21:19:27 -040052 extern u8 code32flat_start[], code32flat_end[];
53 memcpy(code32flat_start, code32flat_start + BIOS_SRC_OFFSET
54 , code32flat_end - code32flat_start);
Kevin O'Connor5b8f8092009-09-20 19:47:45 -040055}
56
Kevin O'Connor6e4583c2011-06-19 10:09:26 -040057static void
Isaku Yamahata08328e72010-07-20 16:50:45 +090058make_bios_writable_intel(u16 bdf, u32 pam0)
59{
60 int reg = pci_config_readb(bdf, pam0);
61 if (!(reg & 0x10)) {
62 // QEMU doesn't fully implement the piix shadow capabilities -
63 // if ram isn't backing the bios segment when shadowing is
64 // disabled, the code itself wont be in memory. So, run the
65 // code from the high-memory flash location.
Kevin O'Connor5bd01de2010-09-13 21:19:27 -040066 u32 pos = (u32)__make_bios_writable_intel + BIOS_SRC_OFFSET;
Isaku Yamahata08328e72010-07-20 16:50:45 +090067 void (*func)(u16 bdf, u32 pam0) = (void*)pos;
68 func(bdf, pam0);
69 return;
70 }
71 // Ram already present - just enable writes
72 __make_bios_writable_intel(bdf, pam0);
73}
74
Kevin O'Connor6e4583c2011-06-19 10:09:26 -040075static void
Isaku Yamahata08328e72010-07-20 16:50:45 +090076make_bios_readonly_intel(u16 bdf, u32 pam0)
77{
78 // Flush any pending writes before locking memory.
79 wbinvd();
80
81 // Write protect roms from 0xc0000-0xf0000
Kevin O'Connor5e019082012-05-20 21:11:43 -040082 u32 romend = rom_get_last(), romtop = rom_get_top();
Isaku Yamahata08328e72010-07-20 16:50:45 +090083 int i;
84 for (i=0; i<6; i++) {
85 u32 mem = BUILD_ROM_START + i * 32*1024;
86 u32 pam = pam0 + 1 + i;
Kevin O'Connor5e019082012-05-20 21:11:43 -040087 if (romend <= mem + 16*1024 || romtop <= mem + 32*1024) {
88 if (romend > mem && romtop > mem + 16*1024)
Isaku Yamahata08328e72010-07-20 16:50:45 +090089 pci_config_writeb(bdf, pam, 0x31);
90 break;
91 }
92 pci_config_writeb(bdf, pam, 0x11);
93 }
94
95 // Write protect 0xf0000-0x100000
96 pci_config_writeb(bdf, pam0, 0x10);
97}
98
Kevin O'Connor278b19f2011-06-21 22:41:15 -040099static void i440fx_bios_make_readonly(struct pci_device *pci, void *arg)
Kevin O'Connor6e4583c2011-06-19 10:09:26 -0400100{
Kevin O'Connor278b19f2011-06-21 22:41:15 -0400101 make_bios_readonly_intel(pci->bdf, I440FX_PAM0);
Kevin O'Connor6e4583c2011-06-19 10:09:26 -0400102}
103
Kevin O'Connor6e4583c2011-06-19 10:09:26 -0400104static const struct pci_device_id dram_controller_make_readonly_tbl[] = {
105 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
106 i440fx_bios_make_readonly),
107 PCI_DEVICE_END
108};
109
Kevin O'Connor5b8f8092009-09-20 19:47:45 -0400110// Make the 0xc0000-0x100000 area read/writable.
111void
Kevin O'Connor1ca05b02010-01-03 17:43:37 -0500112make_bios_writable(void)
Kevin O'Connor5b8f8092009-09-20 19:47:45 -0400113{
Ian Campbell74c78782011-06-01 11:00:29 +0100114 if (CONFIG_COREBOOT || usingXen())
Kevin O'Connor5b8f8092009-09-20 19:47:45 -0400115 return;
116
117 dprintf(3, "enabling shadow ram\n");
118
Kevin O'Connorfaf6a4e2011-06-21 21:22:01 -0400119 // At this point, statically allocated variables can't be written,
120 // so do this search manually.
Kevin O'Connor2b333e42011-07-02 14:49:41 -0400121 int bdf;
122 foreachbdf(bdf, 0) {
Kevin O'Connorfaf6a4e2011-06-21 21:22:01 -0400123 u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID);
124 u16 vendor = vendev & 0xffff, device = vendev >> 16;
125 if (vendor == PCI_VENDOR_ID_INTEL
126 && device == PCI_DEVICE_ID_INTEL_82441) {
127 make_bios_writable_intel(bdf, I440FX_PAM0);
128 return;
129 }
Kevin O'Connor35284962009-07-24 21:49:26 -0400130 }
Kevin O'Connorfaf6a4e2011-06-21 21:22:01 -0400131 dprintf(1, "Unable to unlock ram - bridge not found\n");
Kevin O'Connorda4a6482008-06-08 13:48:06 -0400132}
133
134// Make the BIOS code segment area (0xf0000) read-only.
135void
Kevin O'Connor1ca05b02010-01-03 17:43:37 -0500136make_bios_readonly(void)
Kevin O'Connorda4a6482008-06-08 13:48:06 -0400137{
Ian Campbell74c78782011-06-01 11:00:29 +0100138 if (CONFIG_COREBOOT || usingXen())
Kevin O'Connorda4a6482008-06-08 13:48:06 -0400139 return;
140
141 dprintf(3, "locking shadow ram\n");
Kevin O'Connor278b19f2011-06-21 22:41:15 -0400142 struct pci_device *pci = pci_find_init_device(
143 dram_controller_make_readonly_tbl, NULL);
144 if (!pci)
Kevin O'Connorda4a6482008-06-08 13:48:06 -0400145 dprintf(1, "Unable to lock ram - bridge not found\n");
Kevin O'Connorda4a6482008-06-08 13:48:06 -0400146}
Kevin O'Connor244caf82010-09-15 21:48:16 -0400147
148void
149qemu_prep_reset(void)
150{
151 if (CONFIG_COREBOOT)
152 return;
153 // QEMU doesn't map 0xc0000-0xfffff back to the original rom on a
154 // reset, so do that manually before invoking a hard reset.
155 make_bios_writable();
156 extern u8 code32flat_start[], code32flat_end[];
157 memcpy(code32flat_start, code32flat_start + BIOS_SRC_OFFSET
158 , code32flat_end - code32flat_start);
159}