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review.coreboot.org / seabios / a12c2158f72611005e4c91972bf6bc7556cb11f6 / . / vgasrc / vgatables.h
blob: 82b13024cf72905a67576692a636018c8866aac4 [file] [log] [blame]
Kevin O'Connor1f2c3072009-05-06 23:35:59 -0400[diff] [blame]1
2#include "types.h" // u8
3
4/*
5 *
6 * VGA registers
7 *
8 */
9#define VGAREG_ACTL_ADDRESS 0x3c0
10#define VGAREG_ACTL_WRITE_DATA 0x3c0
11#define VGAREG_ACTL_READ_DATA 0x3c1
12
13#define VGAREG_INPUT_STATUS 0x3c2
14#define VGAREG_WRITE_MISC_OUTPUT 0x3c2
15#define VGAREG_VIDEO_ENABLE 0x3c3
16#define VGAREG_SEQU_ADDRESS 0x3c4
17#define VGAREG_SEQU_DATA 0x3c5
18
19#define VGAREG_PEL_MASK 0x3c6
20#define VGAREG_DAC_STATE 0x3c7
21#define VGAREG_DAC_READ_ADDRESS 0x3c7
22#define VGAREG_DAC_WRITE_ADDRESS 0x3c8
23#define VGAREG_DAC_DATA 0x3c9
24
25#define VGAREG_READ_FEATURE_CTL 0x3ca
26#define VGAREG_READ_MISC_OUTPUT 0x3cc
27
28#define VGAREG_GRDC_ADDRESS 0x3ce
29#define VGAREG_GRDC_DATA 0x3cf
30
31#define VGAREG_MDA_CRTC_ADDRESS 0x3b4
32#define VGAREG_MDA_CRTC_DATA 0x3b5
33#define VGAREG_VGA_CRTC_ADDRESS 0x3d4
34#define VGAREG_VGA_CRTC_DATA 0x3d5
35
36#define VGAREG_MDA_WRITE_FEATURE_CTL 0x3ba
37#define VGAREG_VGA_WRITE_FEATURE_CTL 0x3da
38#define VGAREG_ACTL_RESET 0x3da
39
40#define VGAREG_MDA_MODECTL 0x3b8
41#define VGAREG_CGA_MODECTL 0x3d8
42#define VGAREG_CGA_PALETTE 0x3d9
43
44/* Video memory */
45#define VGAMEM_GRAPH 0xA000
46#define VGAMEM_CTEXT 0xB800
47#define VGAMEM_MTEXT 0xB000
48
49/*
50 *
51 * Tables of default values for each mode
52 *
53 */
54#define MODE_MAX 15
55#define TEXT 0x00
56#define GRAPH 0x01
57
58#define CTEXT 0x00
59#define MTEXT 0x01
60#define CGA 0x02
61#define PLANAR1 0x03
62#define PLANAR4 0x04
63#define LINEAR8 0x05
64
65// for SVGA
66#define LINEAR15 0x10
67#define LINEAR16 0x11
68#define LINEAR24 0x12
69#define LINEAR32 0x13
70
71#define SCROLL_DOWN 0
72#define SCROLL_UP 1
73#define NO_ATTR 2
74#define WITH_ATTR 3
75
76#define SCREEN_SIZE(x,y) (((x*y*2)|0x00ff)+1)
77#define SCREEN_MEM_START(x,y,p) ((((x*y*2)|0x00ff)+1)*p)
78#define SCREEN_IO_START(x,y,p) ((((x*y)|0x00ff)+1)*p)
79
80
81extern u16 video_save_pointer_table[];
82
83struct vgamodes_s {
84 u8 svgamode;
85 u8 class; /* TEXT, GRAPH */
86 u8 memmodel; /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */
87 u8 pixbits;
88 u16 sstart;
89 u8 pelmask;
90 u8 dacmodel; /* 0 1 2 3 */
91} PACKED;
92
93extern struct vgamodes_s vga_modes[];
94
95/* Default Palette */
96#define DAC_MAX_MODEL 3
97
98extern u8 line_to_vpti[];
99extern u8 dac_regs[];
100
101/* standard BIOS Video Parameter Table */
102struct VideoParamTableEntry_s {
103 u8 twidth;
104 u8 theightm1;
105 u8 cheight;
106 u16 slength;
107 u8 sequ_regs[4];
108 u8 miscreg;
109 u8 crtc_regs[25];
110 u8 actl_regs[20];
111 u8 grdc_regs[9];
112} PACKED;
113
114extern struct VideoParamTableEntry_s video_param_table[];
115extern u8 palette0[];
116extern u8 palette1[];
117extern u8 palette2[];
118extern u8 palette3[];
119extern u8 static_functionality[];
120
121// vgafonts.c
122extern u8 vgafont8[];
123extern u8 vgafont14[];
124extern u8 vgafont16[];
125extern u8 vgafont14alt[];
126extern u8 vgafont16alt[];
127
128// vga.c
129void biosfn_set_single_palette_reg(u8 reg, u8 val);
130u8 biosfn_get_single_palette_reg(u8 reg);
131
132// clext.c
133void cirrus_set_video_mode(u8 mode);
134void cirrus_init();