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Kevin O'Connor84ad59a2008-07-04 05:47:26 -04001// Support for generating ACPI tables (on emulators)
Kevin O'Connor276d4a92008-06-11 22:47:01 -04002//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2006 Fabrice Bellard
5//
6// This file may be distributed under the terms of the GNU GPLv3 license.
7
8#include "acpi.h" // struct rsdp_descriptor
9#include "util.h" // memcpy
10#include "memmap.h" // bios_table_cur_addr
11#include "pci.h" // pci_find_device
Kevin O'Connor9521e262008-07-04 13:04:29 -040012#include "biosvar.h" // GET_EBDA
Kevin O'Connor2ed2f582008-11-08 15:53:36 -050013#include "pci_ids.h" // PCI_VENDOR_ID_INTEL
14#include "pci_regs.h" // PCI_INTERRUPT_LINE
Kevin O'Connor276d4a92008-06-11 22:47:01 -040015
16
17/****************************************************/
18/* ACPI tables init */
19
20/* Table structure from Linux kernel (the ACPI tables are under the
21 BSD license) */
22
23#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
24 u8 signature [4]; /* ACPI signature (4 ASCII characters) */\
25 u32 length; /* Length of table, in bytes, including header */\
26 u8 revision; /* ACPI Specification minor version # */\
27 u8 checksum; /* To make sum of entire table == 0 */\
28 u8 oem_id [6]; /* OEM identification */\
29 u8 oem_table_id [8]; /* OEM table identification */\
30 u32 oem_revision; /* OEM revision number */\
31 u8 asl_compiler_id [4]; /* ASL compiler vendor ID */\
32 u32 asl_compiler_revision; /* ASL compiler revision number */
33
34
35struct acpi_table_header /* ACPI common table header */
36{
37 ACPI_TABLE_HEADER_DEF
38};
39
40/*
41 * ACPI 1.0 Root System Description Table (RSDT)
42 */
43struct rsdt_descriptor_rev1
44{
45 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
46 u32 table_offset_entry [3]; /* Array of pointers to other */
47 /* ACPI tables */
48};
49
50/*
51 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
52 */
53struct facs_descriptor_rev1
54{
55 u8 signature[4]; /* ACPI Signature */
56 u32 length; /* Length of structure, in bytes */
57 u32 hardware_signature; /* Hardware configuration signature */
58 u32 firmware_waking_vector; /* ACPI OS waking vector */
59 u32 global_lock; /* Global Lock */
60 u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */
61 u32 reserved1 : 31; /* Must be 0 */
62 u8 resverved3 [40]; /* Reserved - must be zero */
63};
64
65
66/*
67 * ACPI 1.0 Fixed ACPI Description Table (FADT)
68 */
69struct fadt_descriptor_rev1
70{
71 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
72 u32 firmware_ctrl; /* Physical address of FACS */
73 u32 dsdt; /* Physical address of DSDT */
74 u8 model; /* System Interrupt Model */
75 u8 reserved1; /* Reserved */
76 u16 sci_int; /* System vector of SCI interrupt */
77 u32 smi_cmd; /* Port address of SMI command port */
78 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
79 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
80 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
81 u8 reserved2; /* Reserved - must be zero */
82 u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
83 u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
84 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
85 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
86 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
87 u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
88 u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
89 u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
90 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
91 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
92 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
93 u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
94 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
95 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
96 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
97 u8 reserved3; /* Reserved */
98 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
99 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
100 u16 flush_size; /* Size of area read to flush caches */
101 u16 flush_stride; /* Stride used in flushing caches */
102 u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
103 u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
104 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
105 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
106 u8 century; /* Index to century in RTC CMOS RAM */
107 u8 reserved4; /* Reserved */
108 u8 reserved4a; /* Reserved */
109 u8 reserved4b; /* Reserved */
110#if 0
111 u32 wb_invd : 1; /* The wbinvd instruction works properly */
112 u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
113 u32 proc_c1 : 1; /* All processors support C1 state */
114 u32 plvl2_up : 1; /* C2 state works on MP system */
115 u32 pwr_button : 1; /* Power button is handled as a generic feature */
116 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
117 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
118 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
119 u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */
120 u32 reserved5 : 23; /* Reserved - must be zero */
121#else
122 u32 flags;
123#endif
124};
125
126/*
127 * MADT values and structures
128 */
129
130/* Values for MADT PCATCompat */
131
132#define DUAL_PIC 0
133#define MULTIPLE_APIC 1
134
135
136/* Master MADT */
137
138struct multiple_apic_table
139{
140 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
141 u32 local_apic_address; /* Physical address of local APIC */
142#if 0
143 u32 PCATcompat : 1; /* A one indicates system also has dual 8259s */
144 u32 reserved1 : 31;
145#else
146 u32 flags;
147#endif
148};
149
150
151/* Values for Type in APIC_HEADER_DEF */
152
153#define APIC_PROCESSOR 0
154#define APIC_IO 1
155#define APIC_XRUPT_OVERRIDE 2
156#define APIC_NMI 3
157#define APIC_LOCAL_NMI 4
158#define APIC_ADDRESS_OVERRIDE 5
159#define APIC_IO_SAPIC 6
160#define APIC_LOCAL_SAPIC 7
161#define APIC_XRUPT_SOURCE 8
162#define APIC_RESERVED 9 /* 9 and greater are reserved */
163
164/*
165 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
166 */
167#define APIC_HEADER_DEF /* Common APIC sub-structure header */\
168 u8 type; \
169 u8 length;
170
171/* Sub-structures for MADT */
172
173struct madt_processor_apic
174{
175 APIC_HEADER_DEF
176 u8 processor_id; /* ACPI processor id */
177 u8 local_apic_id; /* Processor's local APIC id */
178#if 0
179 u32 processor_enabled: 1; /* Processor is usable if set */
180 u32 reserved2 : 31; /* Reserved, must be zero */
181#else
182 u32 flags;
183#endif
184};
185
186struct madt_io_apic
187{
188 APIC_HEADER_DEF
189 u8 io_apic_id; /* I/O APIC ID */
190 u8 reserved; /* Reserved - must be zero */
191 u32 address; /* APIC physical address */
192 u32 interrupt; /* Global system interrupt where INTI
193 * lines start */
194};
195
196#include "acpi-dsdt.hex"
197
198static inline u16 cpu_to_le16(u16 x)
199{
200 return x;
201}
202
203static inline u32 cpu_to_le32(u32 x)
204{
205 return x;
206}
207
208static void acpi_build_table_header(struct acpi_table_header *h,
209 char *sig, int len, u8 rev)
210{
211 memcpy(h->signature, sig, 4);
212 h->length = cpu_to_le32(len);
213 h->revision = rev;
Kevin O'Connor6cb8ba92008-08-17 11:03:24 -0400214 memcpy(h->oem_id, CONFIG_APPNAME6, 6);
215 memcpy(h->oem_table_id, CONFIG_APPNAME4, 4);
216 memcpy(h->asl_compiler_id, CONFIG_APPNAME4, 4);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400217 memcpy(h->oem_table_id + 4, sig, 4);
218 h->oem_revision = cpu_to_le32(1);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400219 h->asl_compiler_revision = cpu_to_le32(1);
220 h->checksum = -checksum((void *)h, len);
221}
222
223static int
224acpi_build_processor_ssdt(u8 *ssdt)
225{
226 u8 *ssdt_ptr = ssdt;
227 int i, length;
Kevin O'Connor84ad59a2008-07-04 05:47:26 -0400228 int smp_cpus = smp_probe();
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400229 int acpi_cpus = smp_cpus > 0xff ? 0xff : smp_cpus;
230
231 ssdt_ptr[9] = 0; // checksum;
232 ssdt_ptr += sizeof(struct acpi_table_header);
233
234 // caluculate the length of processor block and scope block excluding PkgLength
235 length = 0x0d * acpi_cpus + 4;
236
237 // build processor scope header
238 *(ssdt_ptr++) = 0x10; // ScopeOp
239 if (length <= 0x3e) {
240 *(ssdt_ptr++) = length + 1;
241 } else {
242 *(ssdt_ptr++) = 0x7F;
243 *(ssdt_ptr++) = (length + 2) >> 6;
244 }
245 *(ssdt_ptr++) = '_'; // Name
246 *(ssdt_ptr++) = 'P';
247 *(ssdt_ptr++) = 'R';
248 *(ssdt_ptr++) = '_';
249
250 // build object for each processor
251 for(i=0;i<acpi_cpus;i++) {
252 *(ssdt_ptr++) = 0x5B; // ProcessorOp
253 *(ssdt_ptr++) = 0x83;
254 *(ssdt_ptr++) = 0x0B; // Length
255 *(ssdt_ptr++) = 'C'; // Name (CPUxx)
256 *(ssdt_ptr++) = 'P';
257 if ((i & 0xf0) != 0)
258 *(ssdt_ptr++) = (i >> 4) < 0xa ? (i >> 4) + '0' : (i >> 4) + 'A' - 0xa;
259 else
260 *(ssdt_ptr++) = 'U';
261 *(ssdt_ptr++) = (i & 0xf) < 0xa ? (i & 0xf) + '0' : (i & 0xf) + 'A' - 0xa;
262 *(ssdt_ptr++) = i;
263 *(ssdt_ptr++) = 0x10; // Processor block address
264 *(ssdt_ptr++) = 0xb0;
265 *(ssdt_ptr++) = 0;
266 *(ssdt_ptr++) = 0;
267 *(ssdt_ptr++) = 6; // Processor block length
268 }
269
270 acpi_build_table_header((struct acpi_table_header *)ssdt,
271 "SSDT", ssdt_ptr - ssdt, 1);
272
273 return ssdt_ptr - ssdt;
274}
275
276/* base_addr must be a multiple of 4KB */
277void acpi_bios_init(void)
278{
Kevin O'Connord8a18112008-06-12 22:12:48 -0400279 if (! CONFIG_ACPI)
280 return;
281
Kevin O'Connor7b49cd92008-11-08 10:35:26 -0500282 dprintf(3, "init ACPI tables\n");
283
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400284 // This code is hardcoded for PIIX4 Power Management device.
Kevin O'Connor4132e022008-12-04 19:39:10 -0500285 int bdf = pci_find_device(PCI_VENDOR_ID_INTEL
286 , PCI_DEVICE_ID_INTEL_82371AB_3);
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500287 if (bdf < 0)
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400288 // Device not found
289 return;
290
291 struct rsdp_descriptor *rsdp;
292 struct rsdt_descriptor_rev1 *rsdt;
293 struct fadt_descriptor_rev1 *fadt;
294 struct facs_descriptor_rev1 *facs;
295 struct multiple_apic_table *madt;
296 u8 *dsdt, *ssdt;
297 u32 base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr, ssdt_addr;
298 u32 acpi_tables_size, madt_addr, madt_size;
299 int i;
300
301 /* reserve memory space for tables */
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400302 bios_table_cur_addr = ALIGN(bios_table_cur_addr, 16);
303 rsdp = (void *)(bios_table_cur_addr);
304 bios_table_cur_addr += sizeof(*rsdp);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400305
306 addr = base_addr = GET_EBDA(ram_size) - CONFIG_ACPI_DATA_SIZE;
307 add_e820(addr, CONFIG_ACPI_DATA_SIZE, E820_ACPI);
308 rsdt_addr = addr;
309 rsdt = (void *)(addr);
310 addr += sizeof(*rsdt);
311
312 fadt_addr = addr;
313 fadt = (void *)(addr);
314 addr += sizeof(*fadt);
315
Kevin O'Connore06363e2008-08-29 21:12:03 -0400316 addr = ALIGN(addr, 64);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400317 facs_addr = addr;
318 facs = (void *)(addr);
319 addr += sizeof(*facs);
320
321 dsdt_addr = addr;
322 dsdt = (void *)(addr);
323 addr += sizeof(AmlCode);
324
325 ssdt_addr = addr;
326 ssdt = (void *)(addr);
327 addr += acpi_build_processor_ssdt(ssdt);
328
Kevin O'Connor84ad59a2008-07-04 05:47:26 -0400329 int smp_cpus = smp_probe();
Kevin O'Connore06363e2008-08-29 21:12:03 -0400330 addr = ALIGN(addr, 8);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400331 madt_addr = addr;
332 madt_size = sizeof(*madt) +
333 sizeof(struct madt_processor_apic) * smp_cpus +
334 sizeof(struct madt_io_apic);
335 madt = (void *)(addr);
336 addr += madt_size;
337
338 acpi_tables_size = addr - base_addr;
339
340 dprintf(1, "ACPI tables: RSDP addr=0x%08lx"
341 " ACPI DATA addr=0x%08lx size=0x%x\n",
342 (unsigned long)rsdp,
343 (unsigned long)rsdt, acpi_tables_size);
344
345 /* RSDP */
346 memset(rsdp, 0, sizeof(*rsdp));
347 memcpy(rsdp->signature, "RSD PTR ", 8);
Kevin O'Connor6cb8ba92008-08-17 11:03:24 -0400348 memcpy(rsdp->oem_id, CONFIG_APPNAME6, 6);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400349 rsdp->rsdt_physical_address = cpu_to_le32(rsdt_addr);
350 rsdp->checksum = -checksum((void *)rsdp, 20);
351
352 /* RSDT */
353 memset(rsdt, 0, sizeof(*rsdt));
354 rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr);
355 rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr);
356 rsdt->table_offset_entry[2] = cpu_to_le32(ssdt_addr);
357 acpi_build_table_header((struct acpi_table_header *)rsdt,
358 "RSDT", sizeof(*rsdt), 1);
359
360 /* FADT */
361 memset(fadt, 0, sizeof(*fadt));
362 fadt->firmware_ctrl = cpu_to_le32(facs_addr);
363 fadt->dsdt = cpu_to_le32(dsdt_addr);
364 fadt->model = 1;
365 fadt->reserved1 = 0;
Kevin O'Connorbe19cdc2008-11-09 15:33:47 -0500366 int pm_sci_int = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400367 fadt->sci_int = cpu_to_le16(pm_sci_int);
368 fadt->smi_cmd = cpu_to_le32(BUILD_SMI_CMD_IO_ADDR);
369 fadt->acpi_enable = 0xf1;
370 fadt->acpi_disable = 0xf0;
371 fadt->pm1a_evt_blk = cpu_to_le32(BUILD_PM_IO_BASE);
372 fadt->pm1a_cnt_blk = cpu_to_le32(BUILD_PM_IO_BASE + 0x04);
373 fadt->pm_tmr_blk = cpu_to_le32(BUILD_PM_IO_BASE + 0x08);
374 fadt->pm1_evt_len = 4;
375 fadt->pm1_cnt_len = 2;
376 fadt->pm_tmr_len = 4;
377 fadt->plvl2_lat = cpu_to_le16(0xfff); // C2 state not supported
378 fadt->plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported
379 /* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */
380 fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6));
381 acpi_build_table_header((struct acpi_table_header *)fadt, "FACP",
382 sizeof(*fadt), 1);
383
384 /* FACS */
385 memset(facs, 0, sizeof(*facs));
386 memcpy(facs->signature, "FACS", 4);
387 facs->length = cpu_to_le32(sizeof(*facs));
388
389 /* DSDT */
390 memcpy(dsdt, AmlCode, sizeof(AmlCode));
391
392 /* MADT */
393 {
394 struct madt_processor_apic *apic;
395 struct madt_io_apic *io_apic;
396
397 memset(madt, 0, madt_size);
398 madt->local_apic_address = cpu_to_le32(0xfee00000);
399 madt->flags = cpu_to_le32(1);
400 apic = (void *)(madt + 1);
401 for(i=0;i<smp_cpus;i++) {
402 apic->type = APIC_PROCESSOR;
403 apic->length = sizeof(*apic);
404 apic->processor_id = i;
405 apic->local_apic_id = i;
406 apic->flags = cpu_to_le32(1);
407 apic++;
408 }
409 io_apic = (void *)apic;
410 io_apic->type = APIC_IO;
411 io_apic->length = sizeof(*io_apic);
412 io_apic->io_apic_id = smp_cpus;
413 io_apic->address = cpu_to_le32(0xfec00000);
414 io_apic->interrupt = cpu_to_le32(0);
415
416 acpi_build_table_header((struct acpi_table_header *)madt,
417 "APIC", madt_size, 1);
418 }
419}