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Kevin O'Connorc892b132009-08-11 21:59:37 -04001#ifndef __ATA_H
2#define __ATA_H
3
4#include "types.h" // u8
5#include "config.h" // CONFIG_MAX_ATA_INTERFACES
6
7struct ata_channel_s {
Kevin O'Connor4ccb2312009-12-05 11:25:09 -05008 u16 iobase1;
9 u16 iobase2;
10 u8 irq;
11 int pci_bdf;
Kevin O'Connorc892b132009-08-11 21:59:37 -040012};
13
14// ata.c
15extern struct ata_channel_s ATA_channels[CONFIG_MAX_ATA_INTERFACES];
16int cdrom_read(struct disk_op_s *op);
Kevin O'Connor77d227b2009-10-22 21:48:39 -040017int ata_cmd_packet(struct drive_s *drive_g, u8 *cmdbuf, u8 cmdlen
Kevin O'Connorc892b132009-08-11 21:59:37 -040018 , u32 length, void *buf_fl);
19void ata_setup();
20int process_ata_op(struct disk_op_s *op);
21int process_atapi_op(struct disk_op_s *op);
Kevin O'Connor77d227b2009-10-22 21:48:39 -040022void describe_ata(struct drive_s *drive_g);
23void describe_atapi(struct drive_s *drive_g);
Kevin O'Connorc892b132009-08-11 21:59:37 -040024
Kevin O'Connor1fcf1442008-03-11 19:42:41 -040025// Global defines -- ATA register and register bits.
26// command block & control block regs
27#define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0
28#define ATA_CB_ERR 1 // error in pio_base_addr1+1
29#define ATA_CB_FR 1 // feature reg out pio_base_addr1+1
30#define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2
31#define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3
32#define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4
33#define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5
34#define ATA_CB_DH 6 // device head in/out pio_base_addr1+6
35#define ATA_CB_STAT 7 // primary status in pio_base_addr1+7
36#define ATA_CB_CMD 7 // command out pio_base_addr1+7
Kevin O'Connor525219b2009-12-05 13:36:18 -050037
38#define ATA_CB_ASTAT 2 // alternate status in pio_base_addr2+2
39#define ATA_CB_DC 2 // device control out pio_base_addr2+2
40#define ATA_CB_DA 3 // device address in pio_base_addr2+3
Kevin O'Connor1fcf1442008-03-11 19:42:41 -040041
42#define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC
43#define ATA_CB_ER_BBK 0x80 // ATA bad block
44#define ATA_CB_ER_UNC 0x40 // ATA uncorrected error
45#define ATA_CB_ER_MC 0x20 // ATA media change
46#define ATA_CB_ER_IDNF 0x10 // ATA id not found
47#define ATA_CB_ER_MCR 0x08 // ATA media change request
48#define ATA_CB_ER_ABRT 0x04 // ATA command aborted
49#define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found
50#define ATA_CB_ER_NDAM 0x01 // ATA address mark not found
51
52#define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)
53#define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request
54#define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort
55#define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media
56#define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication
57
58// ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)
59#define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask)
60#define ATA_CB_SC_P_REL 0x04 // ATAPI release
61#define ATA_CB_SC_P_IO 0x02 // ATAPI I/O
62#define ATA_CB_SC_P_CD 0x01 // ATAPI C/D
63
64// bits 7-4 of the device/head (CB_DH) reg
65#define ATA_CB_DH_DEV0 0xa0 // select device 0
66#define ATA_CB_DH_DEV1 0xb0 // select device 1
67#define ATA_CB_DH_LBA 0x40 // use LBA
68
69// status reg (CB_STAT and CB_ASTAT) bits
70#define ATA_CB_STAT_BSY 0x80 // busy
71#define ATA_CB_STAT_RDY 0x40 // ready
72#define ATA_CB_STAT_DF 0x20 // device fault
73#define ATA_CB_STAT_WFT 0x20 // write fault (old name)
74#define ATA_CB_STAT_SKC 0x10 // seek complete
75#define ATA_CB_STAT_SERV 0x10 // service
76#define ATA_CB_STAT_DRQ 0x08 // data request
77#define ATA_CB_STAT_CORR 0x04 // corrected
78#define ATA_CB_STAT_IDX 0x02 // index
79#define ATA_CB_STAT_ERR 0x01 // error (ATA)
80#define ATA_CB_STAT_CHK 0x01 // check (ATAPI)
81
82// device control reg (CB_DC) bits
83#define ATA_CB_DC_HD15 0x08 // bit should always be set to one
84#define ATA_CB_DC_SRST 0x04 // soft reset
85#define ATA_CB_DC_NIEN 0x02 // disable interrupts
86
87// Most mandtory and optional ATA commands (from ATA-3),
88#define ATA_CMD_CFA_ERASE_SECTORS 0xC0
89#define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
90#define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87
91#define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
92#define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
93#define ATA_CMD_CHECK_POWER_MODE1 0xE5
94#define ATA_CMD_CHECK_POWER_MODE2 0x98
95#define ATA_CMD_DEVICE_RESET 0x08
96#define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
97#define ATA_CMD_FLUSH_CACHE 0xE7
98#define ATA_CMD_FORMAT_TRACK 0x50
99#define ATA_CMD_IDENTIFY_DEVICE 0xEC
100#define ATA_CMD_IDENTIFY_DEVICE_PACKET 0xA1
101#define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1
102#define ATA_CMD_IDLE1 0xE3
103#define ATA_CMD_IDLE2 0x97
104#define ATA_CMD_IDLE_IMMEDIATE1 0xE1
105#define ATA_CMD_IDLE_IMMEDIATE2 0x95
106#define ATA_CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
107#define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
108#define ATA_CMD_NOP 0x00
109#define ATA_CMD_PACKET 0xA0
110#define ATA_CMD_READ_BUFFER 0xE4
111#define ATA_CMD_READ_DMA 0xC8
112#define ATA_CMD_READ_DMA_QUEUED 0xC7
113#define ATA_CMD_READ_MULTIPLE 0xC4
114#define ATA_CMD_READ_SECTORS 0x20
Kevin O'Connord43e1782009-12-13 12:02:55 -0500115#define ATA_CMD_READ_SECTORS_EXT 0x24
Kevin O'Connor1fcf1442008-03-11 19:42:41 -0400116#define ATA_CMD_READ_VERIFY_SECTORS 0x40
117#define ATA_CMD_RECALIBRATE 0x10
118#define ATA_CMD_REQUEST_SENSE 0x03
119#define ATA_CMD_SEEK 0x70
120#define ATA_CMD_SET_FEATURES 0xEF
121#define ATA_CMD_SET_MULTIPLE_MODE 0xC6
122#define ATA_CMD_SLEEP1 0xE6
123#define ATA_CMD_SLEEP2 0x99
124#define ATA_CMD_STANDBY1 0xE2
125#define ATA_CMD_STANDBY2 0x96
126#define ATA_CMD_STANDBY_IMMEDIATE1 0xE0
127#define ATA_CMD_STANDBY_IMMEDIATE2 0x94
128#define ATA_CMD_WRITE_BUFFER 0xE8
129#define ATA_CMD_WRITE_DMA 0xCA
130#define ATA_CMD_WRITE_DMA_QUEUED 0xCC
131#define ATA_CMD_WRITE_MULTIPLE 0xC5
132#define ATA_CMD_WRITE_SECTORS 0x30
Kevin O'Connord43e1782009-12-13 12:02:55 -0500133#define ATA_CMD_WRITE_SECTORS_EXT 0x34
Kevin O'Connor1fcf1442008-03-11 19:42:41 -0400134#define ATA_CMD_WRITE_VERIFY 0x3C
Kevin O'Connorc892b132009-08-11 21:59:37 -0400135
136#endif // ata.h