blob: c92e1f03efe0c2c8c06ba1290f6ec450600ee09d [file] [log] [blame]
Kevin O'Connorf076a3e2008-02-25 22:25:15 -05001// 16bit system callbacks
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU GPLv3 license.
7
8#include "util.h" // irq_restore
9#include "biosvar.h" // CONFIG_BIOS_TABLE
10#include "ioport.h" // inb
11#include "cmos.h" // inb_cmos
12
Kevin O'Connore2e5f012008-03-08 10:27:39 -050013#define E820_RAM 1
14#define E820_RESERVED 2
15#define E820_ACPI 3
16#define E820_NVS 4
17#define E820_UNUSABLE 5
18
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050019// Use PS2 System Control port A to set A20 enable
20static inline u8
21set_a20(u8 cond)
22{
23 // get current setting first
24 u8 newval, oldval = inb(PORT_A20);
25 if (cond)
26 newval = oldval | 0x02;
27 else
28 newval = oldval & ~0x02;
29 outb(newval, PORT_A20);
30
31 return (newval & 0x02) != 0;
32}
33
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050034static void
35handle_152400(struct bregs *regs)
36{
37 set_a20(0);
Kevin O'Connor6c781222008-03-09 12:19:23 -040038 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050039}
40
41static void
42handle_152401(struct bregs *regs)
43{
44 set_a20(1);
Kevin O'Connor6c781222008-03-09 12:19:23 -040045 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050046}
47
48static void
49handle_152402(struct bregs *regs)
50{
51 regs->al = !!(inb(PORT_A20) & 0x20);
Kevin O'Connor6c781222008-03-09 12:19:23 -040052 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050053}
54
55static void
56handle_152403(struct bregs *regs)
57{
58 regs->bx = 3;
Kevin O'Connor6c781222008-03-09 12:19:23 -040059 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050060}
61
62static void
63handle_1524XX(struct bregs *regs)
64{
Kevin O'Connor6c781222008-03-09 12:19:23 -040065 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050066}
67
Kevin O'Connoradb6b372008-03-01 13:38:38 -050068static void
69handle_1524(struct bregs *regs)
70{
71 switch (regs->al) {
72 case 0x00: handle_152400(regs); break;
73 case 0x01: handle_152401(regs); break;
74 case 0x02: handle_152402(regs); break;
75 case 0x03: handle_152403(regs); break;
76 default: handle_1524XX(regs); break;
77 }
78}
79
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050080// removable media eject
81static void
82handle_1552(struct bregs *regs)
83{
Kevin O'Connor6c781222008-03-09 12:19:23 -040084 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050085}
86
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050087// Wait for CX:DX microseconds. currently using the
88// refresh request port 0x61 bit4, toggling every 15usec
89static void
90handle_1586(struct bregs *regs)
91{
92 irq_enable();
93 usleep((regs->cx << 16) | regs->dx);
94 irq_disable();
95}
96
97static void
98handle_1587(struct bregs *regs)
99{
100 // +++ should probably have descriptor checks
101 // +++ should have exception handlers
102
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500103 u8 prev_a20_enable = set_a20(1); // enable A20 line
104
105 // 128K max of transfer on 386+ ???
106 // source == destination ???
107
108 // ES:SI points to descriptor table
109 // offset use initially comments
110 // ==============================================
111 // 00..07 Unused zeros Null descriptor
112 // 08..0f GDT zeros filled in by BIOS
113 // 10..17 source ssssssss source of data
114 // 18..1f dest dddddddd destination of data
115 // 20..27 CS zeros filled in by BIOS
116 // 28..2f SS zeros filled in by BIOS
117
118 //es:si
119 //eeee0
120 //0ssss
121 //-----
122
123// check for access rights of source & dest here
124
125 // Initialize GDT descriptor
126 u16 si = regs->si;
127 u16 base15_00 = (regs->es << 4) + si;
128 u16 base23_16 = regs->es >> 12;
129 if (base15_00 < (regs->es<<4))
130 base23_16++;
131 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
132 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
133 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
134 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
135 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
136
137 // Initialize CS descriptor
138 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
139 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
140 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
141 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
142 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
143
144 // Initialize SS descriptor
145 u16 ss = GET_SEG(SS);
146 base15_00 = ss << 4;
147 base23_16 = ss >> 12;
148 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
149 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
150 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
151 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
152 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
153
154 asm volatile(
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500155 // Load new descriptor tables
156 "lgdt %%es:(%1)\n"
157 "lidt %%cs:pmode_IDT_info\n"
158
159 // set PE bit in CR0
160 "movl %%cr0, %%eax\n"
161 "orb $0x01, %%al\n"
162 "movl %%eax, %%cr0\n"
163
164 // far jump to flush CPU queue after transition to protected mode
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500165 "ljmpw $0x0020, $1f\n"
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500166 "1:\n"
167
168 // GDT points to valid descriptor table, now load DS, ES
169 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
170 "movw %%ax, %%ds\n"
171 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
172 "movw %%ax, %%es\n"
173
174 // move CX words from DS:SI to ES:DI
175 "xorw %%si, %%si\n"
176 "xorw %%di, %%di\n"
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500177 "rep movsw\n"
178
179 // reset PG bit in CR0 ???
180 "movl %%cr0, %%eax\n"
181 "andb $0xfe, %%al\n"
182 "movl %%eax, %%cr0\n"
183
184 // far jump to flush CPU queue after transition to real mode
185 "ljmpw $0xf000, $2f\n"
186 "2:\n"
187
188 // restore IDT to normal real-mode defaults
189 "lidt %%cs:rmode_IDT_info\n"
190
Kevin O'Connore20ed9f2008-03-01 14:25:44 -0500191 // Restore %ds (from %ss)
192 "movw %%ss, %%ax\n"
193 "movw %%ax, %%ds\n"
194 : : "c" (regs->cx), "r" (si + 8)
195 : "eax", "di", "si"); // XXX - also clobbers %es
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500196
197 set_a20(prev_a20_enable);
198
Kevin O'Connor6c781222008-03-09 12:19:23 -0400199 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500200}
201
202// Get the amount of extended memory (above 1M)
203static void
204handle_1588(struct bregs *regs)
205{
Kevin O'Connore09b9822008-03-06 19:16:37 -0500206 regs->al = inb_cmos(CMOS_MEM_EXTMEM_LOW);
207 regs->ah = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500208 // According to Ralf Brown's interrupt the limit should be 15M,
209 // but real machines mostly return max. 63M.
210 if (regs->ax > 0xffc0)
211 regs->ax = 0xffc0;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400212 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500213}
214
215// Device busy interrupt. Called by Int 16h when no key available
216static void
217handle_1590(struct bregs *regs)
218{
219}
220
221// Interrupt complete. Called by Int 16h when key becomes available
222static void
223handle_1591(struct bregs *regs)
224{
225}
226
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500227// keyboard intercept
228static void
229handle_154f(struct bregs *regs)
230{
Kevin O'Connor6c781222008-03-09 12:19:23 -0400231 // set_fail(regs); -- don't report this failure.
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500232 set_cf(regs, 1);
233}
234
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500235static void
236handle_15c0(struct bregs *regs)
237{
238 regs->es = SEG_BIOS;
239 regs->bx = (u16)&BIOS_CONFIG_TABLE;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400240 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500241}
242
243static void
244handle_15c1(struct bregs *regs)
245{
246 regs->es = GET_BDA(ebda_seg);
Kevin O'Connor6c781222008-03-09 12:19:23 -0400247 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500248}
249
250static void
251handle_15e801(struct bregs *regs)
252{
253 // my real system sets ax and bx to 0
254 // this is confirmed by Ralph Brown list
255 // but syslinux v1.48 is known to behave
256 // strangely if ax is set to 0
257 // regs.u.r16.ax = 0;
258 // regs.u.r16.bx = 0;
259
260 // Get the amount of extended memory (above 1M)
Kevin O'Connore09b9822008-03-06 19:16:37 -0500261 regs->cl = inb_cmos(CMOS_MEM_EXTMEM_LOW);
262 regs->ch = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500263
264 // limit to 15M
265 if (regs->cx > 0x3c00)
266 regs->cx = 0x3c00;
267
268 // Get the amount of extended memory above 16M in 64k blocs
Kevin O'Connore09b9822008-03-06 19:16:37 -0500269 regs->dl = inb_cmos(CMOS_MEM_EXTMEM2_LOW);
270 regs->dh = inb_cmos(CMOS_MEM_EXTMEM2_HIGH);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500271
272 // Set configured memory equal to extended memory
273 regs->ax = regs->cx;
274 regs->bx = regs->dx;
275
Kevin O'Connor6c781222008-03-09 12:19:23 -0400276 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500277}
278
Kevin O'Connor47baa3c2008-03-08 13:17:16 -0500279#define ACPI_DATA_SIZE 0x00010000L
280
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500281static void
282set_e820_range(u16 DI, u32 start, u32 end, u16 type)
283{
284 SET_VAR(ES, *(u16*)(DI+0), start);
285 SET_VAR(ES, *(u16*)(DI+2), start >> 16);
286 SET_VAR(ES, *(u16*)(DI+4), 0x00);
287 SET_VAR(ES, *(u16*)(DI+6), 0x00);
288
289 end -= start;
290 SET_VAR(ES, *(u16*)(DI+8), end);
291 SET_VAR(ES, *(u16*)(DI+10), end >> 16);
292 SET_VAR(ES, *(u16*)(DI+12), 0x0000);
293 SET_VAR(ES, *(u16*)(DI+14), 0x0000);
294
295 SET_VAR(ES, *(u16*)(DI+16), type);
296 SET_VAR(ES, *(u16*)(DI+18), 0x0);
297}
298
299// XXX - should create e820 memory map in post and just copy it here.
300static void
301handle_15e820(struct bregs *regs)
302{
303 if (regs->edx != 0x534D4150) {
Kevin O'Connor6c781222008-03-09 12:19:23 -0400304 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500305 return;
306 }
307
Kevin O'Connore09b9822008-03-06 19:16:37 -0500308 u32 extended_memory_size = inb_cmos(CMOS_MEM_EXTMEM2_HIGH);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500309 extended_memory_size <<= 8;
Kevin O'Connore09b9822008-03-06 19:16:37 -0500310 extended_memory_size |= inb_cmos(CMOS_MEM_EXTMEM2_LOW);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500311 extended_memory_size *= 64;
312 // greater than EFF00000???
313 if (extended_memory_size > 0x3bc000)
314 // everything after this is reserved memory until we get to 0x100000000
315 extended_memory_size = 0x3bc000;
316 extended_memory_size *= 1024;
317 extended_memory_size += (16L * 1024 * 1024);
318
319 if (extended_memory_size <= (16L * 1024 * 1024)) {
Kevin O'Connore09b9822008-03-06 19:16:37 -0500320 extended_memory_size = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500321 extended_memory_size <<= 8;
Kevin O'Connore09b9822008-03-06 19:16:37 -0500322 extended_memory_size |= inb_cmos(CMOS_MEM_EXTMEM_LOW);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500323 extended_memory_size *= 1024;
324 }
325
326 switch (regs->bx) {
327 case 0:
Kevin O'Connore2e5f012008-03-08 10:27:39 -0500328 set_e820_range(regs->di, 0x0000000L, 0x0009fc00L, E820_RAM);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500329 regs->ebx = 1;
330 regs->eax = 0x534D4150;
331 regs->ecx = 0x14;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400332 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500333 break;
334 case 1:
Kevin O'Connore2e5f012008-03-08 10:27:39 -0500335 set_e820_range(regs->di, 0x0009fc00L, 0x000a0000L, E820_RESERVED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500336 regs->ebx = 2;
337 regs->eax = 0x534D4150;
338 regs->ecx = 0x14;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400339 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500340 break;
341 case 2:
Kevin O'Connore2e5f012008-03-08 10:27:39 -0500342 set_e820_range(regs->di, 0x000e8000L, 0x00100000L, E820_RESERVED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500343 regs->ebx = 3;
344 regs->eax = 0x534D4150;
345 regs->ecx = 0x14;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400346 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500347 break;
348 case 3:
349 set_e820_range(regs->di, 0x00100000L,
Kevin O'Connore2e5f012008-03-08 10:27:39 -0500350 extended_memory_size - ACPI_DATA_SIZE, E820_RAM);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500351 regs->ebx = 4;
352 regs->eax = 0x534D4150;
353 regs->ecx = 0x14;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400354 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500355 break;
356 case 4:
357 set_e820_range(regs->di,
358 extended_memory_size - ACPI_DATA_SIZE,
Kevin O'Connore2e5f012008-03-08 10:27:39 -0500359 extended_memory_size, E820_ACPI); // ACPI RAM
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500360 regs->ebx = 5;
361 regs->eax = 0x534D4150;
362 regs->ecx = 0x14;
363 set_cf(regs, 0);
364 break;
365 case 5:
366 /* 256KB BIOS area at the end of 4 GB */
Kevin O'Connore2e5f012008-03-08 10:27:39 -0500367 set_e820_range(regs->di, 0xfffc0000L, 0x00000000L, E820_RESERVED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500368 regs->ebx = 0;
369 regs->eax = 0x534D4150;
370 regs->ecx = 0x14;
371 set_cf(regs, 0);
372 break;
373 default: /* AX=E820, DX=534D4150, BX unrecognized */
Kevin O'Connor6c781222008-03-09 12:19:23 -0400374 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500375 }
376}
377
378static void
379handle_15e8XX(struct bregs *regs)
380{
Kevin O'Connor6c781222008-03-09 12:19:23 -0400381 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500382}
383
384static void
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500385handle_15e8(struct bregs *regs)
386{
387 switch (regs->al) {
388 case 0x01: handle_15e801(regs); break;
389 case 0x20: handle_15e820(regs); break;
390 default: handle_15e8XX(regs); break;
391 }
392}
393
394static void
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500395handle_15XX(struct bregs *regs)
396{
Kevin O'Connor6c781222008-03-09 12:19:23 -0400397 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500398}
399
400// INT 15h System Services Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500401void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500402handle_15(struct bregs *regs)
403{
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500404 //debug_enter(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500405 switch (regs->ah) {
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500406 case 0x24: handle_1524(regs); break;
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500407 case 0x4f: handle_154f(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500408 case 0x52: handle_1552(regs); break;
Kevin O'Connorbdce35f2008-02-26 21:33:14 -0500409 case 0x53: handle_1553(regs); break;
410 case 0x83: handle_1583(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500411 case 0x86: handle_1586(regs); break;
412 case 0x87: handle_1587(regs); break;
413 case 0x88: handle_1588(regs); break;
414 case 0x90: handle_1590(regs); break;
415 case 0x91: handle_1591(regs); break;
416 case 0xc0: handle_15c0(regs); break;
417 case 0xc1: handle_15c1(regs); break;
418 case 0xc2: handle_15c2(regs); break;
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500419 case 0xe8: handle_15e8(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500420 default: handle_15XX(regs); break;
421 }
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500422}
423
424// INT 12h Memory Size Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500425void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500426handle_12(struct bregs *regs)
427{
428 debug_enter(regs);
429 regs->ax = GET_BDA(mem_size_kb);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500430}
431
432// INT 11h Equipment List Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500433void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500434handle_11(struct bregs *regs)
435{
436 debug_enter(regs);
437 regs->ax = GET_BDA(equipment_list_flags);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500438}
439
440// INT 05h Print Screen Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500441void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500442handle_05(struct bregs *regs)
443{
444 debug_enter(regs);
445}
446
447// INT 10h Video Support Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500448void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500449handle_10(struct bregs *regs)
450{
451 debug_enter(regs);
452 // dont do anything, since the VGA BIOS handles int10h requests
453}
454
Kevin O'Connor19786762008-03-05 21:09:59 -0500455void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500456handle_nmi(struct bregs *regs)
457{
Kevin O'Connorc65a3802008-03-02 13:58:23 -0500458 debug_isr(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500459 // XXX
460}
461
462// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
Kevin O'Connor19786762008-03-05 21:09:59 -0500463void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500464handle_75(struct bregs *regs)
465{
Kevin O'Connorc65a3802008-03-02 13:58:23 -0500466 debug_isr(regs);
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500467
468 // clear irq13
469 outb(0, PORT_MATH_CLEAR);
470 // clear interrupt
471 eoi_both_pics();
472 // legacy nmi call
473 struct bregs br;
474 memset(&br, 0, sizeof(br));
475 call16_int(0x02, &br);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500476}