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Kevin O'Connor276d4a92008-06-11 22:47:01 -04001#ifndef __ACPI_H
2#define __ACPI_H
3
4#include "types.h" // u32
5
6void acpi_bios_init(void);
Kevin O'Connor1ca05b02010-01-03 17:43:37 -05007u32 find_resume_vector(void);
Kevin O'Connor276d4a92008-06-11 22:47:01 -04008
Kevin O'Connore10e6f82008-06-21 19:46:43 -04009#define RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR "
10
Kevin O'Connor35746442009-02-27 20:54:51 -050011struct rsdp_descriptor { /* Root System Descriptor Pointer */
12 u64 signature; /* ACPI signature, contains "RSD PTR " */
13 u8 checksum; /* To make sum of struct == 0 */
14 u8 oem_id [6]; /* OEM identification */
15 u8 revision; /* Must be 0 for 1.0, 2 for 2.0 */
16 u32 rsdt_physical_address; /* 32-bit physical address of RSDT */
17 u32 length; /* XSDT Length in bytes including hdr */
18 u64 xsdt_physical_address; /* 64-bit physical address of XSDT */
19 u8 extended_checksum; /* Checksum of entire table */
20 u8 reserved [3]; /* Reserved field must be 0 */
Kevin O'Connor276d4a92008-06-11 22:47:01 -040021};
22
Kevin O'Connor9967ab72008-12-18 21:57:33 -050023extern struct rsdp_descriptor *RsdpAddr;
24
Isaku Yamahatad06afb42010-07-20 16:37:17 +090025/* Table structure from Linux kernel (the ACPI tables are under the
26 BSD license) */
27
28#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
29 u32 signature; /* ACPI signature (4 ASCII characters) */ \
30 u32 length; /* Length of table, in bytes, including header */ \
31 u8 revision; /* ACPI Specification minor version # */ \
32 u8 checksum; /* To make sum of entire table == 0 */ \
33 u8 oem_id [6]; /* OEM identification */ \
34 u8 oem_table_id [8]; /* OEM table identification */ \
35 u32 oem_revision; /* OEM revision number */ \
36 u8 asl_compiler_id [4]; /* ASL compiler vendor ID */ \
37 u32 asl_compiler_revision; /* ASL compiler revision number */
38
39
40/*
41 * ACPI 1.0 Fixed ACPI Description Table (FADT)
42 */
43#define FACP_SIGNATURE 0x50434146 // FACP
44struct fadt_descriptor_rev1
45{
46 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
47 u32 firmware_ctrl; /* Physical address of FACS */
48 u32 dsdt; /* Physical address of DSDT */
49 u8 model; /* System Interrupt Model */
50 u8 reserved1; /* Reserved */
51 u16 sci_int; /* System vector of SCI interrupt */
52 u32 smi_cmd; /* Port address of SMI command port */
53 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
54 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
55 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
56 u8 reserved2; /* Reserved - must be zero */
57 u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
58 u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
59 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
60 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
61 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
62 u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
63 u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
64 u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
65 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
66 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
67 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
68 u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
69 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
70 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
71 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
72 u8 reserved3; /* Reserved */
73 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
74 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
75 u16 flush_size; /* Size of area read to flush caches */
76 u16 flush_stride; /* Stride used in flushing caches */
77 u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
78 u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
79 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
80 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
81 u8 century; /* Index to century in RTC CMOS RAM */
82 u8 reserved4; /* Reserved */
83 u8 reserved4a; /* Reserved */
84 u8 reserved4b; /* Reserved */
85#if 0
86 u32 wb_invd : 1; /* The wbinvd instruction works properly */
87 u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
88 u32 proc_c1 : 1; /* All processors support C1 state */
89 u32 plvl2_up : 1; /* C2 state works on MP system */
90 u32 pwr_button : 1; /* Power button is handled as a generic feature */
91 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
92 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
93 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
94 u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */
95 u32 reserved5 : 23; /* Reserved - must be zero */
96#else
97 u32 flags;
98#endif
99} PACKED;
100
Gerd Hoffmann2062f2b2012-06-07 10:34:33 +0200101struct bfld {
102 u64 p0s; /* pci window 0 (below 4g) - start */
103 u64 p0e; /* pci window 0 (below 4g) - end */
104 u64 p0l; /* pci window 0 (below 4g) - length */
105 u64 p1s; /* pci window 1 (above 4g) - start */
106 u64 p1e; /* pci window 1 (above 4g) - end */
107 u64 p1l; /* pci window 1 (above 4g) - length */
108} PACKED;
109
Kevin O'Connor276d4a92008-06-11 22:47:01 -0400110#endif // acpi.h