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Kevin O'Connor84ad59a2008-07-04 05:47:26 -04001// CPU count detection
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2006 Fabrice Bellard
5//
Kevin O'Connorb1b7c2a2009-01-15 20:52:58 -05006// This file may be distributed under the terms of the GNU LGPLv3 license.
Kevin O'Connor84ad59a2008-07-04 05:47:26 -04007
8#include "util.h" // dprintf
Kevin O'Connor9521e262008-07-04 13:04:29 -04009#include "config.h" // CONFIG_*
Kevin O'Connor5d369d82013-09-02 20:48:46 -040010#include "hw/cmos.h" // CMOS_BIOS_SMP_COUNT
Kevin O'Connor41639f82013-09-14 19:37:36 -040011#include "romfile.h" // romfile_loadint
Kevin O'Connor3df600b2013-09-14 19:28:55 -040012#include "stacks.h" // yield
Kevin O'Connorb9c6a962013-09-14 13:01:30 -040013#include "x86.h" // wrmsr
Kevin O'Connor84ad59a2008-07-04 05:47:26 -040014
Kevin O'Connorf5c11612008-12-14 10:11:45 -050015#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
16#define APIC_SVR ((u8*)BUILD_APIC_ADDR + 0x0F0)
Kevin O'Connor19c1a762009-11-14 13:43:01 -050017#define APIC_LINT0 ((u8*)BUILD_APIC_ADDR + 0x350)
18#define APIC_LINT1 ((u8*)BUILD_APIC_ADDR + 0x360)
Kevin O'Connor84ad59a2008-07-04 05:47:26 -040019
20#define APIC_ENABLED 0x0100
21
Kevin O'Connor89a2f962013-02-18 23:36:03 -050022struct { u32 ecx, eax, edx; } smp_mtrr[32] VARFSEG;
23u32 smp_mtrr_count VARFSEG;
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040024
25void
26wrmsr_smp(u32 index, u64 val)
27{
28 wrmsr(index, val);
Kevin O'Connore0f87ce2011-07-29 19:21:07 -040029 if (smp_mtrr_count >= ARRAY_SIZE(smp_mtrr)) {
30 warn_noalloc();
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040031 return;
Kevin O'Connore0f87ce2011-07-29 19:21:07 -040032 }
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040033 smp_mtrr[smp_mtrr_count].ecx = index;
34 smp_mtrr[smp_mtrr_count].eax = val;
35 smp_mtrr[smp_mtrr_count].edx = val >> 32;
36 smp_mtrr_count++;
37}
38
Kevin O'Connor89a2f962013-02-18 23:36:03 -050039u32 CountCPUs VARFSEG;
Kevin O'Connorf96ff442013-08-10 10:37:50 -040040u32 MaxCountCPUs;
Eduardo Habkost008c1fc2012-07-25 15:45:30 -030041// 256 bits for the found APIC IDs
Kevin O'Connor89a2f962013-02-18 23:36:03 -050042u32 FoundAPICIDs[256/32] VARFSEG;
Kevin O'Connor1ca05b02010-01-03 17:43:37 -050043extern void smp_ap_boot_code(void);
Kevin O'Connor4a754b32008-12-28 21:37:27 -050044ASM16(
Kevin O'Connora06bfb62008-12-06 19:37:56 -050045 " .global smp_ap_boot_code\n"
46 "smp_ap_boot_code:\n"
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040047
48 // Setup data segment
Kevin O'Connora06bfb62008-12-06 19:37:56 -050049 " movw $" __stringify(SEG_BIOS) ", %ax\n"
Kevin O'Connor484270d2008-08-17 10:50:57 -040050 " movw %ax, %ds\n"
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040051
52 // MTRR setup
53 " movl $smp_mtrr, %esi\n"
54 " movl smp_mtrr_count, %ebx\n"
55 "1:testl %ebx, %ebx\n"
56 " jz 2f\n"
57 " movl 0(%esi), %ecx\n"
58 " movl 4(%esi), %eax\n"
59 " movl 8(%esi), %edx\n"
60 " wrmsr\n"
61 " addl $12, %esi\n"
62 " decl %ebx\n"
63 " jmp 1b\n"
64 "2:\n"
65
Eduardo Habkost008c1fc2012-07-25 15:45:30 -030066 // get apic ID on EBX, set bit on FoundAPICIDs
67 " movl $1, %eax\n"
68 " cpuid\n"
69 " shrl $24, %ebx\n"
70 " lock btsl %ebx, FoundAPICIDs\n"
71
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040072 // Increment the cpu counter
73 " lock incl CountCPUs\n"
74
Kevin O'Connor484270d2008-08-17 10:50:57 -040075 // Halt the processor.
Kevin O'Connor60b69992009-02-07 13:25:25 -050076 "1:hlt\n"
77 " jmp 1b\n"
Kevin O'Connor84ad59a2008-07-04 05:47:26 -040078 );
Kevin O'Connor84ad59a2008-07-04 05:47:26 -040079
Eduardo Habkost008c1fc2012-07-25 15:45:30 -030080int apic_id_is_present(u8 apic_id)
81{
Eduardo Habkost7f036852012-08-31 15:11:16 -030082 return !!(FoundAPICIDs[apic_id/32] & (1ul << (apic_id % 32)));
Eduardo Habkost008c1fc2012-07-25 15:45:30 -030083}
84
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040085// find and initialize the CPUs by launching a SIPI to them
86void
Kevin O'Connord83c87b2013-01-21 01:14:12 -050087smp_setup(void)
Kevin O'Connor84ad59a2008-07-04 05:47:26 -040088{
Kevin O'Connor5dbf1732013-02-09 23:58:55 -050089 if (!CONFIG_QEMU)
90 return;
91
Kevin O'Connor52a300f2009-12-26 23:32:57 -050092 ASSERT32FLAT();
Kevin O'Connor84ad59a2008-07-04 05:47:26 -040093 u32 eax, ebx, ecx, cpuid_features;
94 cpuid(1, &eax, &ebx, &ecx, &cpuid_features);
Lubomir Rintel22f63782010-08-20 13:37:54 +020095 if (eax < 1 || !(cpuid_features & CPUID_APIC)) {
Kevin O'Connora06bfb62008-12-06 19:37:56 -050096 // No apic - only the main cpu is present.
Kevin O'Connorb49e1e32009-11-24 09:41:06 -050097 dprintf(1, "No apic - only the main cpu is present.\n");
Kevin O'Connore97ca7b2009-06-21 09:10:28 -040098 CountCPUs= 1;
Kevin O'Connorb49e1e32009-11-24 09:41:06 -050099 MaxCountCPUs = 1;
Kevin O'Connore97ca7b2009-06-21 09:10:28 -0400100 return;
Kevin O'Connor84ad59a2008-07-04 05:47:26 -0400101 }
Kevin O'Connor84ad59a2008-07-04 05:47:26 -0400102
Eduardo Habkost008c1fc2012-07-25 15:45:30 -0300103 // mark the BSP initial APIC ID as found, too:
104 u8 apic_id = ebx>>24;
105 FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32));
106
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500107 // Init the counter.
Kevin O'Connore97ca7b2009-06-21 09:10:28 -0400108 writel(&CountCPUs, 1);
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500109
110 // Setup jump trampoline to counter code.
111 u64 old = *(u64*)BUILD_AP_BOOT_ADDR;
112 // ljmpw $SEG_BIOS, $(smp_ap_boot_code - BUILD_BIOS_ADDR)
113 u64 new = (0xea | ((u64)SEG_BIOS<<24)
114 | (((u32)smp_ap_boot_code - BUILD_BIOS_ADDR) << 8));
115 *(u64*)BUILD_AP_BOOT_ADDR = new;
116
117 // enable local APIC
Kevin O'Connorf5c11612008-12-14 10:11:45 -0500118 u32 val = readl(APIC_SVR);
119 writel(APIC_SVR, val | APIC_ENABLED);
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500120
Kevin O'Connor5dbf1732013-02-09 23:58:55 -0500121 /* Set LINT0 as Ext_INT, level triggered */
122 writel(APIC_LINT0, 0x8700);
Kevin O'Connor19c1a762009-11-14 13:43:01 -0500123
Kevin O'Connor5dbf1732013-02-09 23:58:55 -0500124 /* Set LINT1 as NMI, level triggered */
125 writel(APIC_LINT1, 0x8400);
Kevin O'Connor19c1a762009-11-14 13:43:01 -0500126
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500127 // broadcast SIPI
Kevin O'Connor808939c2010-03-10 22:32:26 -0500128 barrier();
Kevin O'Connorf5c11612008-12-14 10:11:45 -0500129 writel(APIC_ICR_LOW, 0x000C4500);
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500130 u32 sipi_vector = BUILD_AP_BOOT_ADDR >> 12;
Kevin O'Connorf5c11612008-12-14 10:11:45 -0500131 writel(APIC_ICR_LOW, 0x000C4600 | sipi_vector);
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500132
133 // Wait for other CPUs to process the SIPI.
Kevin O'Connor5dbf1732013-02-09 23:58:55 -0500134 u8 cmos_smp_count = inb_cmos(CMOS_BIOS_SMP_COUNT);
135 while (cmos_smp_count + 1 != readl(&CountCPUs))
136 yield();
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500137
138 // Restore memory.
Kevin O'Connora06bfb62008-12-06 19:37:56 -0500139 *(u64*)BUILD_AP_BOOT_ADDR = old;
140
Kevin O'Connor56c50892013-02-09 19:25:51 -0500141 MaxCountCPUs = romfile_loadint("etc/max-cpus", 0);
Kevin O'Connor84705852009-10-08 22:13:15 -0400142 if (!MaxCountCPUs || MaxCountCPUs < CountCPUs)
143 MaxCountCPUs = CountCPUs;
144
145 dprintf(1, "Found %d cpu(s) max supported %d cpu(s)\n", readl(&CountCPUs),
146 MaxCountCPUs);
Kevin O'Connor84ad59a2008-07-04 05:47:26 -0400147}