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Nils31eabf92012-01-14 12:11:41 -05001// Geode GX2/LX VGA functions
2//
3// Copyright (C) 2009 Chris Kindt
4//
5// Writen for Google Summer of Code 2009 for the coreboot project
6//
7// This file may be distributed under the terms of the GNU LGPLv3 license.
8
9#ifndef GEODEVGA_H
10#define GEODEVGA_H
11
12#define VRC_INDEX 0xAC1C // Index register
13#define VRC_DATA 0xAC1E // Data register
14#define VR_UNLOCK 0xFC53 // Virtual register unlock code
15
16#define EXTENDED_REGISTER_LOCK 0x30
17#define EXTENDED_MODE_CONTROL 0x43
18#define EXTENDED_START_ADDR 0x44
19
20#define CRTCE_UNLOCK 0x4c
21#define CRTCE_LOCK 0xff
22
23// Graphics-specific registers:
24#define OEM_BAR0 0x50
25#define OEM_BAR1 0x54
26#define OEM_BAR2 0x58
27#define OEM_BAR3 0x5C
28
Nilse8b184f2012-01-14 12:13:34 -050029#define GEODE_PCI_ADDR 0x80000900
30#define GEODE_PCI_CMD (GEODE_PCI_ADDR + 0x04)
31#define GEODE_PCI_FB (GEODE_PCI_ADDR + 0x10)
32#define GEODE_PCI_DC (GEODE_PCI_ADDR + 0x18)
33#define GEODE_PCI_VP (GEODE_PCI_ADDR + 0x1c)
Nils31eabf92012-01-14 12:11:41 -050034
35#define DC_LOCK_LOCK 0x00000000
36#define DC_LOCK_UNLOCK 0x00004758
37
38/* LX MSRs */
39#define MSR_GLIU0 (1 << 28)
Nils24ddd862012-01-14 12:15:14 -050040#define MSR_GLIU0_BASE4 (MSR_GLIU0 + 0x23) /* LX */
41#define GLIU0_P2D_BM_4 (MSR_GLIU0 + 0x24) /* GX2 */
Nils31eabf92012-01-14 12:11:41 -050042#define GLIU0_IOD_BM_0 (MSR_GLIU0 + 0xE0)
43#define GLIU0_IOD_BM_1 (MSR_GLIU0 + 0xE1)
44#define DC_SPARE 0x80000011
Nils24ddd862012-01-14 12:15:14 -050045#define VP_MSR_CONFIG_GX2 0xc0002001 /* GX2 */
46#define VP_MSR_CONFIG_LX 0x48002001 /* LX */
Nils31eabf92012-01-14 12:11:41 -050047
48/* DC REG OFFSET */
49#define DC_UNLOCK 0x0
50#define DC_GENERAL_CFG 0x4
51#define DC_DISPLAY_CFG 0x8
Nils31eabf92012-01-14 12:11:41 -050052#define DC_FB_ST_OFFSET 0x10
53#define DC_CB_ST_OFFSET 0x14
54#define DC_CURS_ST_OFFSET 0x18
55#define DC_GLIU0_MEM_OFFSET 0x84
56
57/* VP REG OFFSET */
58#define VP_VCFG 0x0
59#define VP_DCFG 0x8
60#define VP_MISC 0x50
61
62
63/* DC bits */
64#define DC_VGAE (1 << 7)
65#define DC_GDEN (1 << 3)
66#define DC_TRUP (1 << 6)
67
68/* VP bits */
69#define VP_CRT_EN (1 << 0)
70#define VP_HSYNC_EN (1 << 1)
71#define VP_VSYNC_EN (1 << 2)
72#define VP_DAC_BL_EN (1 << 3)
73#define VP_CRT_SKEW (1 << 16)
74#define VP_BYP_BOTH (1 << 0)
75
Nilse8b184f2012-01-14 12:13:34 -050076/* Mask */
Nils31eabf92012-01-14 12:11:41 -050077#define DC_CFG_MSK 0xf000a6
78
79int geodevga_init();
80
81#endif