blob: 6f23722692f67d5d3b06a9a224ca3124e93949d9 [file] [log] [blame]
Kevin O'Connor190cc622010-03-09 19:43:52 -05001// Code for handling EHCI USB controllers.
2//
3// Copyright (C) 2010 Kevin O'Connor <kevin@koconnor.net>
4//
5// This file may be distributed under the terms of the GNU LGPLv3 license.
6
7#include "util.h" // dprintf
8#include "pci.h" // pci_bdf_to_bus
9#include "config.h" // CONFIG_*
10#include "ioport.h" // outw
11#include "usb-ehci.h" // struct ehci_qh
12#include "pci_ids.h" // PCI_CLASS_SERIAL_USB_UHCI
13#include "pci_regs.h" // PCI_BASE_ADDRESS_0
14#include "usb.h" // struct usb_s
15#include "farptr.h" // GET_FLATPTR
16#include "usb-hub.h" // struct usbhub_s
17#include "usb-uhci.h" // init_uhci
18#include "usb-ohci.h" // init_ohci
19
20struct companion_s {
21 u16 bdf;
22 u16 type;
23};
24
25struct usb_ehci_s {
26 struct usb_s usb;
27 struct ehci_caps *caps;
28 struct ehci_regs *regs;
29 struct ehci_qh *async_qh;
30 struct companion_s companion[8];
31 int checkports;
32 int legacycount;
33};
34
35
36/****************************************************************
37 * Root hub
38 ****************************************************************/
39
40#define EHCI_TIME_POSTPOWER 20
41#define EHCI_TIME_POSTRESET 2
42
43// Start processing of companion controllers for full/low speed devices
44static void
45ehci_startcompanion(struct usb_ehci_s *cntl)
46{
47 if (! cntl->legacycount)
48 // No full/low speed devices found.
49 return;
50 int i;
51 for (i=0; i<ARRAY_SIZE(cntl->companion); i++) {
52 u16 type = cntl->companion[i].type;
53 if (type == USB_TYPE_UHCI)
54 uhci_init(cntl->companion[i].bdf, cntl->usb.busid + i);
55 else if (type == USB_TYPE_OHCI)
56 ohci_init(cntl->companion[i].bdf, cntl->usb.busid + i);
57 else
58 return;
59 }
60}
61
62static void
63init_ehci_port(void *data)
64{
65 struct usbhub_s *hub = data;
66 u32 port = hub->port; // XXX - find better way to pass port
67 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
68
69 u32 *portreg = &cntl->regs->portsc[port];
70 u32 portsc = readl(portreg);
71
72 // Power up port.
73 if (!(portsc & PORT_POWER)) {
74 portsc |= PORT_POWER;
75 writel(portreg, portsc);
76 msleep(EHCI_TIME_POSTPOWER);
77 portsc = readl(portreg);
78 }
79
80 if (!(portsc & PORT_CONNECT))
81 // No device present
82 goto done;
83
84 if ((portsc & PORT_LINESTATUS_MASK) == PORT_LINESTATUS_KSTATE) {
85 // low speed device
86 cntl->legacycount++;
87 writel(portreg, portsc | PORT_OWNER);
88 goto done;
89 }
90
91 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
92
93 // Reset port
94 portsc = (portsc & ~PORT_PE) | PORT_RESET;
95 writel(portreg, portsc);
96 msleep(USB_TIME_DRSTR);
97 mutex_lock(&cntl->usb.resetlock);
98 portsc &= ~PORT_RESET;
99 writel(portreg, portsc);
100 msleep(EHCI_TIME_POSTRESET);
101
102 portsc = readl(portreg);
103 if (!(portsc & PORT_CONNECT))
104 // No longer connected
105 goto resetfail;
106 if (!(portsc & PORT_PE)) {
107 // full speed device
108 cntl->legacycount++;
109 writel(portreg, portsc | PORT_OWNER);
110 goto resetfail;
111 }
112 struct usb_pipe *pipe = usb_set_address(hub, port, USB_HIGHSPEED);
113 if (!pipe)
114 goto resetfail;
115 mutex_unlock(&cntl->usb.resetlock);
116
117 // Configure port
118 int count = configure_usb_device(pipe);
119 free_pipe(pipe);
120 if (! count)
121 // Disable port
122 writel(portreg, portsc & ~PORT_PE);
123 hub->devcount += count;
124done:
125 if (! --cntl->checkports)
126 ehci_startcompanion(cntl);
127 hub->threads--;
128 return;
129
130resetfail:
131 mutex_unlock(&cntl->usb.resetlock);
132 goto done;
133}
134
135// Find any devices connected to the root hub.
136static int
137check_ehci_ports(struct usb_ehci_s *cntl)
138{
139 ASSERT32FLAT();
140
141 // Launch a thread for every port.
142 struct usbhub_s hub;
143 memset(&hub, 0, sizeof(hub));
144 hub.cntl = &cntl->usb;
145 int ports = cntl->checkports;
146 hub.threads = ports;
147 int i;
148 for (i=0; i<ports; i++) {
149 hub.port = i;
150 run_thread(init_ehci_port, &hub);
151 }
152
153 // Wait for threads to complete.
154 while (hub.threads)
155 yield();
156
157 return hub.devcount;
158}
159
160
161/****************************************************************
162 * Setup
163 ****************************************************************/
164
165static void
166configure_ehci(void *data)
167{
168 struct usb_ehci_s *cntl = data;
169
170 // Allocate ram for schedule storage
171 struct ehci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
172 struct ehci_qh *intr_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*intr_qh));
173 struct ehci_qh *async_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*async_qh));
174 if (!fl || !intr_qh || !async_qh) {
175 warn_noalloc();
176 goto fail;
177 }
178
179 // XXX - check for halted?
180
181 // Reset the HC
182 u32 cmd = readl(&cntl->regs->usbcmd);
183 writel(&cntl->regs->usbcmd, (cmd & ~(CMD_ASE | CMD_PSE)) | CMD_HCRESET);
184 u64 end = calc_future_tsc(250);
185 for (;;) {
186 cmd = readl(&cntl->regs->usbcmd);
187 if (!(cmd & CMD_HCRESET))
188 break;
189 if (check_time(end)) {
190 warn_timeout();
191 goto fail;
192 }
193 }
194
195 // Disable interrupts (just to be safe).
196 writel(&cntl->regs->usbintr, 0);
197
198 // Set schedule to point to primary intr queue head
199 memset(intr_qh, 0, sizeof(*intr_qh));
200 intr_qh->next = EHCI_PTR_TERM;
201 intr_qh->info2 = (0x01 << QH_SMASK_SHIFT);
202 intr_qh->token = QTD_STS_HALT;
203 intr_qh->qtd_next = intr_qh->alt_next = EHCI_PTR_TERM;
204 int i;
205 for (i=0; i<ARRAY_SIZE(fl->links); i++)
206 fl->links[i] = (u32)intr_qh | EHCI_PTR_QH;
207 writel(&cntl->regs->periodiclistbase, (u32)fl);
208
209 // Set async list to point to primary async queue head
210 memset(async_qh, 0, sizeof(*async_qh));
211 async_qh->next = (u32)async_qh | EHCI_PTR_QH;
212 async_qh->info1 = QH_HEAD;
213 async_qh->token = QTD_STS_HALT;
214 async_qh->qtd_next = async_qh->alt_next = EHCI_PTR_TERM;
215 cntl->async_qh = async_qh;
216 writel(&cntl->regs->asynclistbase, (u32)async_qh);
217
218 // Enable queues
219 writel(&cntl->regs->usbcmd, cmd | CMD_ASE | CMD_PSE | CMD_RUN);
220
221 // Set default of high speed for root hub.
222 writel(&cntl->regs->configflag, 1);
223 cntl->checkports = readl(&cntl->caps->hcsparams) & HCS_N_PORTS_MASK;
224
225 // Find devices
226 int count = check_ehci_ports(cntl);
227 free_pipe(cntl->usb.defaultpipe);
228 if (count)
229 // Success
230 return;
231
232 // No devices found - shutdown and free controller.
233 writel(&cntl->regs->usbcmd, cmd & ~CMD_RUN);
234 msleep(4); // 2ms to stop reading memory - XXX
235fail:
236 free(fl);
237 free(intr_qh);
238 free(async_qh);
239 free(cntl);
240}
241
242int
243ehci_init(u16 bdf, int busid, int compbdf)
244{
245 if (! CONFIG_USB_EHCI)
246 return -1;
247
248 u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
249 struct ehci_caps *caps = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
250 u32 hcc_params = readl(&caps->hccparams);
251 if (hcc_params & HCC_64BIT_ADDR) {
252 dprintf(1, "No support for 64bit EHCI\n");
253 return -1;
254 }
255
256 struct usb_ehci_s *cntl = malloc_tmphigh(sizeof(*cntl));
257 memset(cntl, 0, sizeof(*cntl));
258 cntl->usb.busid = busid;
259 cntl->usb.type = USB_TYPE_EHCI;
260 cntl->caps = caps;
261 cntl->regs = (void*)caps + readb(&caps->caplength);
262
263 dprintf(3, "EHCI init on dev %02x:%02x.%x (regs=%p)\n"
264 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
265 , pci_bdf_to_fn(bdf), cntl->regs);
266
267 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
268
269 // XXX - check for and disable SMM control?
270
271 // Find companion controllers.
272 int count = 0;
273 int max = pci_to_bdf(pci_bdf_to_bus(bdf) + 1, 0, 0);
274 for (;;) {
275 if (compbdf < 0 || compbdf >= bdf)
276 break;
277 u32 code = pci_config_readl(compbdf, PCI_CLASS_REVISION) >> 8;
278 if (code == PCI_CLASS_SERIAL_USB_UHCI) {
279 cntl->companion[count].bdf = compbdf;
280 cntl->companion[count].type = USB_TYPE_UHCI;
281 count++;
282 } else if (code == PCI_CLASS_SERIAL_USB_OHCI) {
283 cntl->companion[count].bdf = compbdf;
284 cntl->companion[count].type = USB_TYPE_OHCI;
285 count++;
286 }
287 compbdf = pci_next(compbdf+1, &max);
288 }
289
290 run_thread(configure_ehci, cntl);
291 return 0;
292}
293
294
295/****************************************************************
296 * End point communication
297 ****************************************************************/
298
299static int
300ehci_wait_qh(struct usb_ehci_s *cntl, struct ehci_qh *qh)
301{
302 // XXX - 500ms just a guess
303 u64 end = calc_future_tsc(500);
304 for (;;) {
305 if (qh->qtd_next & EHCI_PTR_TERM)
306 // XXX - confirm
307 return 0;
308 if (check_time(end)) {
309 warn_timeout();
310 return -1;
311 }
312 yield();
313 }
314}
315
316// Wait for next USB async frame to start - for ensuring safe memory release.
317static void
318ehci_waittick(struct usb_ehci_s *cntl)
319{
320 if (MODE16) {
321 msleep(10);
322 return;
323 }
324 // Wait for access to "doorbell"
325 barrier();
326 u32 cmd, sts;
327 u64 end = calc_future_tsc(100);
328 for (;;) {
329 sts = readl(&cntl->regs->usbsts);
330 if (!(sts & STS_IAA)) {
331 cmd = readl(&cntl->regs->usbcmd);
332 if (!(cmd & CMD_IAAD))
333 break;
334 }
335 if (check_time(end)) {
336 warn_timeout();
337 return;
338 }
339 yield();
340 }
341 // Ring "doorbell"
342 writel(&cntl->regs->usbcmd, cmd | CMD_IAAD);
343 // Wait for completion
344 for (;;) {
345 sts = readl(&cntl->regs->usbsts);
346 if (sts & STS_IAA)
347 break;
348 if (check_time(end)) {
349 warn_timeout();
350 return;
351 }
352 yield();
353 }
354 // Ack completion
355 writel(&cntl->regs->usbsts, STS_IAA);
356}
357
358struct ehci_pipe {
359 struct ehci_qh qh;
360 struct ehci_qtd *next_td, *tds;
361 void *data;
362 struct usb_pipe pipe;
363};
364
365void
366ehci_free_pipe(struct usb_pipe *p)
367{
368 if (! CONFIG_USB_EHCI)
369 return;
370 dprintf(7, "ehci_free_pipe %p\n", p);
371 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
372 struct usb_ehci_s *cntl = container_of(
373 pipe->pipe.cntl, struct usb_ehci_s, usb);
374
375 struct ehci_qh *start = cntl->async_qh;
376 struct ehci_qh *pos = start;
377 for (;;) {
378 struct ehci_qh *next = (void*)(pos->next & ~EHCI_PTR_BITS);
379 if (next == start) {
380 // Not found?! Exit without freeing.
381 warn_internalerror();
382 return;
383 }
384 if (next == &pipe->qh) {
385 pos->next = next->next;
386 ehci_waittick(cntl);
387 free(pipe);
388 return;
389 }
390 pos = next;
391 }
392}
393
394struct usb_pipe *
395ehci_alloc_control_pipe(struct usb_pipe *dummy)
396{
397 if (! CONFIG_USB_EHCI)
398 return NULL;
399 struct usb_ehci_s *cntl = container_of(
400 dummy->cntl, struct usb_ehci_s, usb);
401 dprintf(7, "ehci_alloc_control_pipe %p\n", &cntl->usb);
402
403 // Allocate a queue head.
404 struct ehci_pipe *pipe = memalign_tmphigh(EHCI_QH_ALIGN, sizeof(*pipe));
405 if (!pipe) {
406 warn_noalloc();
407 return NULL;
408 }
409 memset(pipe, 0, sizeof(*pipe));
410 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
411 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
412 pipe->qh.token = QTD_STS_HALT;
413
414 // Add queue head to controller list.
415 struct ehci_qh *async_qh = cntl->async_qh;
416 pipe->qh.next = async_qh->next;
417 barrier();
418 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
419 return &pipe->pipe;
420}
421
422static int
423fillTDbuffer(struct ehci_qtd *td, u16 maxpacket, const void *buf, int bytes)
424{
425 u32 dest = (u32)buf;
426 u32 *pos = td->buf;
427 while (bytes) {
428 if (pos >= &td->buf[ARRAY_SIZE(td->buf)])
429 // More data than can transfer in a single qtd - only use
430 // full packets to prevent a babble error.
431 return ALIGN_DOWN(dest - (u32)buf, maxpacket);
432 u32 count = bytes;
433 u32 max = 0x1000 - (dest & 0xfff);
434 if (count > max)
435 count = max;
436 *pos = dest;
437 bytes -= count;
438 dest += count;
439 pos++;
440 }
441 return dest - (u32)buf;
442}
443
444int
445ehci_control(struct usb_pipe *p, int dir, const void *cmd, int cmdsize
446 , void *data, int datasize)
447{
448 ASSERT32FLAT();
449 if (! CONFIG_USB_EHCI)
450 return -1;
451 dprintf(5, "ehci_control %p\n", p);
452 if (datasize > 4*4096 || cmdsize > 4*4096) {
453 // XXX - should support larger sizes.
454 warn_noalloc();
455 return -1;
456 }
457 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
458 struct usb_ehci_s *cntl = container_of(
459 pipe->pipe.cntl, struct usb_ehci_s, usb);
460
461 u16 maxpacket = pipe->pipe.maxpacket;
462 int speed = pipe->pipe.speed;
463
464 // Setup fields in qh
465 pipe->qh.info1 = (
466 (1 << QH_MULT_SHIFT) | (speed != USB_HIGHSPEED ? QH_CONTROL : 0)
467 | (maxpacket << QH_MAXPACKET_SHIFT)
468 | QH_TOGGLECONTROL
469 | (speed << QH_SPEED_SHIFT)
470 | (pipe->pipe.ep << QH_EP_SHIFT)
471 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
472 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
473 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
474 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT));
475
476 // Setup transfer descriptors
477 struct ehci_qtd *tds = memalign_tmphigh(EHCI_QTD_ALIGN, sizeof(*tds) * 3);
478 if (!tds) {
479 warn_noalloc();
480 return -1;
481 }
482 memset(tds, 0, sizeof(*tds) * 3);
483 struct ehci_qtd *td = tds;
484
485 td->qtd_next = (u32)&td[1];
486 td->alt_next = EHCI_PTR_TERM;
487 td->token = (ehci_explen(cmdsize) | QTD_STS_ACTIVE
488 | QTD_PID_SETUP | ehci_maxerr(3));
489 fillTDbuffer(td, maxpacket, cmd, cmdsize);
490 td++;
491
492 if (datasize) {
493 td->qtd_next = (u32)&td[1];
494 td->alt_next = EHCI_PTR_TERM;
495 td->token = (QTD_TOGGLE | ehci_explen(datasize) | QTD_STS_ACTIVE
496 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
497 fillTDbuffer(td, maxpacket, data, datasize);
498 td++;
499 }
500
501 td->qtd_next = EHCI_PTR_TERM;
502 td->alt_next = EHCI_PTR_TERM;
503 td->token = (QTD_TOGGLE | QTD_STS_ACTIVE
504 | (dir ? QTD_PID_OUT : QTD_PID_IN) | ehci_maxerr(3));
505
506 // Transfer data
507 barrier();
508 pipe->qh.qtd_next = (u32)tds;
509 barrier();
510 pipe->qh.token = 0;
511 int ret = ehci_wait_qh(cntl, &pipe->qh);
512 pipe->qh.token = QTD_STS_HALT;
513 if (ret) {
514 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
515 // XXX - halt qh?
516 ehci_waittick(cntl);
517 }
518 free(tds);
519 return ret;
520}
521
522struct usb_pipe *
523ehci_alloc_bulk_pipe(struct usb_pipe *dummy)
524{
525 // XXX - this func is same as alloc_control except for malloc_low
526 if (! CONFIG_USB_EHCI)
527 return NULL;
528 struct usb_ehci_s *cntl = container_of(
529 dummy->cntl, struct usb_ehci_s, usb);
530 dprintf(7, "ehci_alloc_bulk_pipe %p\n", &cntl->usb);
531
532 // Allocate a queue head.
533 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
534 if (!pipe) {
535 warn_noalloc();
536 return NULL;
537 }
538 memset(pipe, 0, sizeof(*pipe));
539 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
540 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
541 pipe->qh.token = QTD_STS_HALT;
542
543 // Add queue head to controller list.
544 struct ehci_qh *async_qh = cntl->async_qh;
545 pipe->qh.next = async_qh->next;
546 barrier();
547 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
548 return &pipe->pipe;
549}
550
551static int
552ehci_wait_td(struct ehci_qtd *td)
553{
554 u64 end = calc_future_tsc(5000); // XXX - lookup real time.
555 u32 status;
556 for (;;) {
557 status = td->token;
558 if (!(status & QTD_STS_ACTIVE))
559 break;
560 if (check_time(end)) {
561 warn_timeout();
562 return -1;
563 }
564 yield();
565 }
566 if (status & QTD_STS_HALT) {
567 dprintf(1, "ehci_wait_td error - status=%x\n", status);
568 return -2;
569 }
570 return 0;
571}
572
573#define STACKQTDS 4
574
575int
576ehci_send_bulk(struct usb_pipe *p, int dir, void *data, int datasize)
577{
578 if (! CONFIG_USB_EHCI)
579 return -1;
580 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
581 dprintf(7, "ehci_send_bulk qh=%p dir=%d data=%p size=%d\n"
582 , &pipe->qh, dir, data, datasize);
583
584 // Allocate 4 tds on stack (16byte aligned)
585 u8 tdsbuf[sizeof(struct ehci_qtd) * STACKQTDS + EHCI_QTD_ALIGN - 1];
586 struct ehci_qtd *tds = (void*)ALIGN((u32)tdsbuf, EHCI_QTD_ALIGN);
587 memset(tds, 0, sizeof(*tds) * STACKQTDS);
588
589 // Setup fields in qh
590 u16 maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
591 SET_FLATPTR(pipe->qh.info1
592 , ((1 << QH_MULT_SHIFT)
593 | (maxpacket << QH_MAXPACKET_SHIFT)
594 | (GET_FLATPTR(pipe->pipe.speed) << QH_SPEED_SHIFT)
595 | (GET_FLATPTR(pipe->pipe.ep) << QH_EP_SHIFT)
596 | (GET_FLATPTR(pipe->pipe.devaddr) << QH_DEVADDR_SHIFT)));
597 SET_FLATPTR(pipe->qh.info2
598 , ((1 << QH_MULT_SHIFT)
599 | (GET_FLATPTR(pipe->pipe.tt_port) << QH_HUBPORT_SHIFT)
600 | (GET_FLATPTR(pipe->pipe.tt_devaddr) << QH_HUBADDR_SHIFT)));
601 barrier();
602 SET_FLATPTR(pipe->qh.qtd_next, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
603 barrier();
604 SET_FLATPTR(pipe->qh.token, GET_FLATPTR(pipe->qh.token) & QTD_TOGGLE);
605
606 int tdpos = 0;
607 while (datasize) {
608 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
609 int ret = ehci_wait_td(td);
610 if (ret)
611 goto fail;
612
613 struct ehci_qtd *nexttd_fl = MAKE_FLATPTR(GET_SEG(SS)
614 , &tds[tdpos % STACKQTDS]);
615
616 int transfer = fillTDbuffer(td, maxpacket, data, datasize);
617 td->qtd_next = (transfer==datasize ? EHCI_PTR_TERM : (u32)nexttd_fl);
618 td->alt_next = EHCI_PTR_TERM;
619 barrier();
620 td->token = (ehci_explen(transfer) | QTD_STS_ACTIVE
621 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
622
623 data += transfer;
624 datasize -= transfer;
625 }
626 int i;
627 for (i=0; i<STACKQTDS; i++) {
628 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
629 int ret = ehci_wait_td(td);
630 if (ret)
631 goto fail;
632 }
633
634 return 0;
635fail:
636 dprintf(1, "ehci_send_bulk failed\n");
637 SET_FLATPTR(pipe->qh.qtd_next, EHCI_PTR_TERM);
638 SET_FLATPTR(pipe->qh.alt_next, EHCI_PTR_TERM);
639 // XXX - halt qh?
640 struct usb_ehci_s *cntl = container_of(
641 GET_FLATPTR(pipe->pipe.cntl), struct usb_ehci_s, usb);
642 ehci_waittick(cntl);
643 return -1;
644}
645
646struct usb_pipe *
647ehci_alloc_intr_pipe(struct usb_pipe *dummy, int frameexp)
648{
649 if (! CONFIG_USB_EHCI)
650 return NULL;
651 struct usb_ehci_s *cntl = container_of(
652 dummy->cntl, struct usb_ehci_s, usb);
653 dprintf(7, "ehci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
654
655 if (frameexp > 10)
656 frameexp = 10;
657 int maxpacket = dummy->maxpacket;
658 // Determine number of entries needed for 2 timer ticks.
659 int ms = 1<<frameexp;
660 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
661 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
662 struct ehci_qtd *tds = memalign_low(EHCI_QTD_ALIGN, sizeof(*tds) * count);
663 void *data = malloc_low(maxpacket * count);
664 if (!pipe || !tds || !data) {
665 warn_noalloc();
666 goto fail;
667 }
668 memset(pipe, 0, sizeof(*pipe));
669 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
670 pipe->next_td = pipe->tds = tds;
671 pipe->data = data;
672
673 pipe->qh.info1 = (
674 (1 << QH_MULT_SHIFT)
675 | (maxpacket << QH_MAXPACKET_SHIFT)
676 | (pipe->pipe.speed << QH_SPEED_SHIFT)
677 | (pipe->pipe.ep << QH_EP_SHIFT)
678 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
679 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
680 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
681 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT)
682 | (0x01 << QH_SMASK_SHIFT)
683 | (0x1c << QH_CMASK_SHIFT));
684 pipe->qh.qtd_next = (u32)tds;
685
686 int i;
687 for (i=0; i<count; i++) {
688 struct ehci_qtd *td = &tds[i];
689 td->qtd_next = (i==count-1 ? (u32)tds : (u32)&td[1]);
690 td->alt_next = EHCI_PTR_TERM;
691 td->token = (ehci_explen(maxpacket) | QTD_STS_ACTIVE
692 | QTD_PID_IN | ehci_maxerr(3));
693 td->buf[0] = (u32)data + maxpacket * i;
694 }
695
696 // Add to interrupt schedule.
697 struct ehci_framelist *fl = (void*)readl(&cntl->regs->periodiclistbase);
698 if (frameexp == 0) {
699 // Add to existing interrupt entry.
700 struct ehci_qh *intr_qh = (void*)(fl->links[0] & ~EHCI_PTR_BITS);
701 pipe->qh.next = intr_qh->next;
702 barrier();
703 intr_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
704 } else {
705 int startpos = 1<<(frameexp-1);
706 pipe->qh.next = fl->links[startpos];
707 barrier();
708 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
709 fl->links[i] = (u32)&pipe->qh | EHCI_PTR_QH;
710 }
711
712 return &pipe->pipe;
713fail:
714 free(pipe);
715 free(tds);
716 free(data);
717 return NULL;
718}
719
720int
721ehci_poll_intr(struct usb_pipe *p, void *data)
722{
723 ASSERT16();
724 if (! CONFIG_USB_EHCI)
725 return -1;
726 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
727 struct ehci_qtd *td = GET_FLATPTR(pipe->next_td);
728 u32 token = GET_FLATPTR(td->token);
729 if (token & QTD_STS_ACTIVE)
730 // No intrs found.
731 return -1;
732 // XXX - check for errors.
733
734 // Copy data.
735 int maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
736 int pos = td - GET_FLATPTR(pipe->tds);
737 void *tddata = GET_FLATPTR(pipe->data) + maxpacket * pos;
738 memcpy_far(GET_SEG(SS), data
739 , FLATPTR_TO_SEG(tddata), (void*)FLATPTR_TO_OFFSET(tddata)
740 , maxpacket);
741
742 // Reenable this td.
743 struct ehci_qtd *next = (void*)(GET_FLATPTR(td->qtd_next) & ~EHCI_PTR_BITS);
744 SET_FLATPTR(pipe->next_td, next);
745 SET_FLATPTR(td->buf[0], (u32)tddata);
746 barrier();
747 SET_FLATPTR(td->token, (ehci_explen(maxpacket) | QTD_STS_ACTIVE
748 | QTD_PID_IN | ehci_maxerr(3)));
749
750 return 0;
751}