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Paolo Bonzini7a39e722012-08-06 13:15:06 +02001// AMD PCscsi boot support.
2//
3// Copyright (C) 2012 Red Hat Inc.
4//
5// Authors:
6// Paolo Bonzini <pbonzini@redhat.com>
7//
8// based on lsi-scsi.c which is written by:
9// Gerd Hoffman <kraxel@redhat.com>
10//
11// This file may be distributed under the terms of the GNU LGPLv3 license.
12
Kevin O'Connor1902c942013-10-26 11:48:06 -040013#include "biosvar.h" // GET_GLOBALFLAT
Kevin O'Connor135f3f62013-09-14 23:57:26 -040014#include "block.h" // struct drive_s
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040015#include "blockcmd.h" // scsi_drive_setup
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040016#include "config.h" // CONFIG_*
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040017#include "fw/paravirt.h" // runningOnQEMU
18#include "malloc.h" // free
19#include "output.h" // dprintf
20#include "pci.h" // foreachpci
Paolo Bonzini7a39e722012-08-06 13:15:06 +020021#include "pci_ids.h" // PCI_DEVICE_ID
22#include "pci_regs.h" // PCI_VENDOR_ID
Kevin O'Connor135f3f62013-09-14 23:57:26 -040023#include "std/disk.h" // DISK_RET_SUCCESS
Kevin O'Connorfa9c66a2013-09-14 19:10:40 -040024#include "string.h" // memset
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040025#include "util.h" // usleep
Paolo Bonzini7a39e722012-08-06 13:15:06 +020026
27#define ESP_TCLO 0x00
28#define ESP_TCMID 0x04
29#define ESP_FIFO 0x08
30#define ESP_CMD 0x0c
31#define ESP_WBUSID 0x10
32#define ESP_TCHI 0x38
33
34#define ESP_RSTAT 0x10
35#define ESP_RINTR 0x14
36#define ESP_RFLAGS 0x1c
37
38#define ESP_DMA_CMD 0x40
39#define ESP_DMA_STC 0x44
40#define ESP_DMA_SPA 0x48
41#define ESP_DMA_WBC 0x4c
42#define ESP_DMA_WAC 0x50
43#define ESP_DMA_STAT 0x54
44#define ESP_DMA_SMDLA 0x58
45#define ESP_DMA_WMAC 0x58c
46
47#define ESP_CMD_DMA 0x80
48#define ESP_CMD_RESET 0x02
49#define ESP_CMD_TI 0x10
50#define ESP_CMD_ICCS 0x11
51#define ESP_CMD_SELATN 0x42
52
53#define ESP_STAT_DI 0x01
54#define ESP_STAT_CD 0x02
55#define ESP_STAT_MSG 0x04
56#define ESP_STAT_TC 0x10
57
58#define ESP_INTR_DC 0x20
59
60struct esp_lun_s {
61 struct drive_s drive;
62 struct pci_device *pci;
63 u32 iobase;
64 u8 target;
65 u8 lun;
66};
67
68static void
69esp_scsi_dma(u32 iobase, u32 buf, u32 len, int read)
70{
71 outb(len & 0xff, iobase + ESP_TCLO);
72 outb((len >> 8) & 0xff, iobase + ESP_TCMID);
73 outb((len >> 16) & 0xff, iobase + ESP_TCHI);
74 outl(buf, iobase + ESP_DMA_SPA);
75 outl(len, iobase + ESP_DMA_STC);
76 outb(read ? 0x83 : 0x03, iobase + ESP_DMA_CMD);
77}
78
79static int
Kevin O'Connor1902c942013-10-26 11:48:06 -040080esp_scsi_cmd(struct esp_lun_s *llun_gf, struct disk_op_s *op,
Paolo Bonzini7a39e722012-08-06 13:15:06 +020081 u8 *cdbcmd, u16 target, u16 lun, u16 blocksize)
82{
Kevin O'Connor1902c942013-10-26 11:48:06 -040083 u32 iobase = GET_GLOBALFLAT(llun_gf->iobase);
Paolo Bonzini7a39e722012-08-06 13:15:06 +020084 int i, state;
85 u8 status;
86
87 outb(target, iobase + ESP_WBUSID);
88
89 /*
90 * We need to pass the LUN at the beginning of the command, and the FIFO
91 * is only 16 bytes, so we cannot support 16-byte CDBs. The alternative
92 * would be to use DMA for the 17-byte command too, which is quite
93 * overkill.
94 */
95 outb(lun, iobase + ESP_FIFO);
96 cdbcmd[1] &= 0x1f;
97 cdbcmd[1] |= lun << 5;
98 for (i = 0; i < 12; i++)
99 outb(cdbcmd[i], iobase + ESP_FIFO);
100 outb(ESP_CMD_SELATN, iobase + ESP_CMD);
101
102 for (state = 0;;) {
103 u8 stat = inb(iobase + ESP_RSTAT);
104
105 /* Detect disconnected device. */
106 if (state == 0 && (inb(iobase + ESP_RINTR) & ESP_INTR_DC)) {
107 return DISK_RET_ENOTREADY;
108 }
109
110 /* HBA reads command, clears CD, sets TC -> do DMA if needed. */
111 if (state == 0 && (stat & ESP_STAT_TC)) {
112 state++;
113 if (op->count && blocksize) {
114 /* Data phase. */
115 u32 count = (u32)op->count * blocksize;
116 esp_scsi_dma(iobase, (u32)op->buf_fl, count,
117 cdb_is_read(cdbcmd, blocksize));
118 outb(ESP_CMD_TI | ESP_CMD_DMA, iobase + ESP_CMD);
119 continue;
120 }
121 }
122
123 /* At end of DMA TC is set again -> complete command. */
124 if (state == 1 && (stat & ESP_STAT_TC)) {
125 state++;
126 outb(ESP_CMD_ICCS, iobase + ESP_CMD);
127 continue;
128 }
129
130 /* Finally read data from the message in phase. */
131 if (state == 2 && (stat & ESP_STAT_MSG)) {
132 state++;
133 status = inb(iobase + ESP_FIFO);
134 inb(iobase + ESP_FIFO);
135 break;
136 }
137 usleep(5);
138 }
139
140 if (status == 0) {
141 return DISK_RET_SUCCESS;
142 }
143
144 return DISK_RET_EBADTRACK;
145}
146
147int
148esp_scsi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
149{
150 if (!CONFIG_ESP_SCSI)
151 return DISK_RET_EBADTRACK;
152
Kevin O'Connor1902c942013-10-26 11:48:06 -0400153 struct esp_lun_s *llun_gf =
154 container_of(op->drive_gf, struct esp_lun_s, drive);
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200155
Kevin O'Connor1902c942013-10-26 11:48:06 -0400156 return esp_scsi_cmd(llun_gf, op, cdbcmd,
157 GET_GLOBALFLAT(llun_gf->target),
158 GET_GLOBALFLAT(llun_gf->lun),
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200159 blocksize);
160}
161
162static int
163esp_scsi_add_lun(struct pci_device *pci, u32 iobase, u8 target, u8 lun)
164{
165 struct esp_lun_s *llun = malloc_fseg(sizeof(*llun));
166 if (!llun) {
167 warn_noalloc();
168 return -1;
169 }
170 memset(llun, 0, sizeof(*llun));
171 llun->drive.type = DTYPE_ESP_SCSI;
172 llun->drive.cntl_id = pci->bdf;
173 llun->pci = pci;
174 llun->target = target;
175 llun->lun = lun;
176 llun->iobase = iobase;
177
178 char *name = znprintf(16, "esp %02x:%02x.%x %d:%d",
179 pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf),
180 pci_bdf_to_fn(pci->bdf), target, lun);
181 int prio = bootprio_find_scsi_device(pci, target, lun);
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500182 int ret = scsi_drive_setup(&llun->drive, name, prio);
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200183 free(name);
184 if (ret)
185 goto fail;
186 return 0;
187
188fail:
189 free(llun);
190 return -1;
191}
192
193static void
194esp_scsi_scan_target(struct pci_device *pci, u32 iobase, u8 target)
195{
196 esp_scsi_add_lun(pci, iobase, target, 0);
197}
198
199static void
200init_esp_scsi(struct pci_device *pci)
201{
202 u16 bdf = pci->bdf;
203 u32 iobase = pci_config_readl(pci->bdf, PCI_BASE_ADDRESS_0)
204 & PCI_BASE_ADDRESS_IO_MASK;
205
206 dprintf(1, "found esp at %02x:%02x.%x, io @ %x\n",
207 pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf),
208 pci_bdf_to_fn(bdf), iobase);
209
Paolo Bonzini68513ab2012-11-20 18:33:41 +0100210 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
211
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200212 // reset
213 outb(ESP_CMD_RESET, iobase + ESP_CMD);
214
215 int i;
216 for (i = 0; i <= 7; i++)
217 esp_scsi_scan_target(pci, iobase, i);
218
219 return;
220}
221
222void
223esp_scsi_setup(void)
224{
225 ASSERT32FLAT();
Kevin O'Connor897fb112013-02-07 23:32:48 -0500226 if (!CONFIG_ESP_SCSI || !runningOnQEMU())
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200227 return;
228
229 dprintf(3, "init esp\n");
230
231 struct pci_device *pci;
232 foreachpci(pci) {
233 if (pci->vendor != PCI_VENDOR_ID_AMD
234 || pci->device != PCI_DEVICE_ID_AMD_SCSI)
235 continue;
236 init_esp_scsi(pci);
237 }
238}