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Gerd Hoffmannd52fdf62010-11-29 09:42:13 +01001// Low level AHCI disk access
2//
3// Copyright (C) 2010 Gerd Hoffmann <kraxel@redhat.com>
4//
5// This file may be distributed under the terms of the GNU LGPLv3 license.
6
Kevin O'Connor2d2fa312013-09-14 21:55:26 -04007#include "ahci.h" // CDB_CMD_READ_10
8#include "ata.h" // ATA_CB_STAT
Kevin O'Connor4bc49972012-05-13 22:58:08 -04009#include "biosvar.h" // GET_GLOBAL
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040010#include "blockcmd.h" // CDB_CMD_READ_10
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040011#include "malloc.h" // free
12#include "output.h" // dprintf
Kevin O'Connor9cb49922011-06-20 22:22:42 -040013#include "pci.h" // foreachpci
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010014#include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER
15#include "pci_regs.h" // PCI_INTERRUPT_LINE
Kevin O'Connor3df600b2013-09-14 19:28:55 -040016#include "stacks.h" // yield
Kevin O'Connor135f3f62013-09-14 23:57:26 -040017#include "std/disk.h" // DISK_RET_SUCCESS
Kevin O'Connorfa9c66a2013-09-14 19:10:40 -040018#include "string.h" // memset
Kevin O'Connor2d2fa312013-09-14 21:55:26 -040019#include "util.h" // timer_calc
Kevin O'Connor4ade5232013-09-18 21:41:48 -040020#include "x86.h" // inb
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010021
Gerd Hoffmanne1041192011-07-14 16:24:04 +020022#define AHCI_REQUEST_TIMEOUT 32000 // 32 seconds max for IDE ops
23#define AHCI_RESET_TIMEOUT 500 // 500 miliseconds
24#define AHCI_LINK_TIMEOUT 10 // 10 miliseconds
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010025
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010026// prepare sata command fis
27static void sata_prep_simple(struct sata_cmd_fis *fis, u8 command)
28{
29 memset_fl(fis, 0, sizeof(*fis));
Kevin O'Connor890c0852012-05-24 23:55:00 -040030 SET_LOWFLAT(fis->command, command);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010031}
32
33static void sata_prep_readwrite(struct sata_cmd_fis *fis,
34 struct disk_op_s *op, int iswrite)
35{
36 u64 lba = op->lba;
37 u8 command;
38
39 memset_fl(fis, 0, sizeof(*fis));
40
41 if (op->count >= (1<<8) || lba + op->count >= (1<<28)) {
Kevin O'Connor890c0852012-05-24 23:55:00 -040042 SET_LOWFLAT(fis->sector_count2, op->count >> 8);
43 SET_LOWFLAT(fis->lba_low2, lba >> 24);
44 SET_LOWFLAT(fis->lba_mid2, lba >> 32);
45 SET_LOWFLAT(fis->lba_high2, lba >> 40);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010046 lba &= 0xffffff;
47 command = (iswrite ? ATA_CMD_WRITE_DMA_EXT
48 : ATA_CMD_READ_DMA_EXT);
49 } else {
50 command = (iswrite ? ATA_CMD_WRITE_DMA
51 : ATA_CMD_READ_DMA);
52 }
Kevin O'Connor890c0852012-05-24 23:55:00 -040053 SET_LOWFLAT(fis->feature, 1); /* dma */
54 SET_LOWFLAT(fis->command, command);
55 SET_LOWFLAT(fis->sector_count, op->count);
56 SET_LOWFLAT(fis->lba_low, lba);
57 SET_LOWFLAT(fis->lba_mid, lba >> 8);
58 SET_LOWFLAT(fis->lba_high, lba >> 16);
59 SET_LOWFLAT(fis->device, ((lba >> 24) & 0xf) | ATA_CB_DH_LBA);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010060}
61
62static void sata_prep_atapi(struct sata_cmd_fis *fis, u16 blocksize)
63{
64 memset_fl(fis, 0, sizeof(*fis));
Kevin O'Connor890c0852012-05-24 23:55:00 -040065 SET_LOWFLAT(fis->command, ATA_CMD_PACKET);
66 SET_LOWFLAT(fis->feature, 1); /* dma */
67 SET_LOWFLAT(fis->lba_mid, blocksize);
68 SET_LOWFLAT(fis->lba_high, blocksize >> 8);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010069}
70
71// ahci register access helpers
72static u32 ahci_ctrl_readl(struct ahci_ctrl_s *ctrl, u32 reg)
73{
74 u32 addr = GET_GLOBALFLAT(ctrl->iobase) + reg;
Kevin O'Connor7c80bb82013-10-02 21:28:08 -040075 return readl((void*)addr);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010076}
77
78static void ahci_ctrl_writel(struct ahci_ctrl_s *ctrl, u32 reg, u32 val)
79{
80 u32 addr = GET_GLOBALFLAT(ctrl->iobase) + reg;
Kevin O'Connor7c80bb82013-10-02 21:28:08 -040081 writel((void*)addr, val);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +010082}
83
84static u32 ahci_port_to_ctrl(u32 pnr, u32 port_reg)
85{
86 u32 ctrl_reg = 0x100;
87 ctrl_reg += pnr * 0x80;
88 ctrl_reg += port_reg;
89 return ctrl_reg;
90}
91
92static u32 ahci_port_readl(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg)
93{
94 u32 ctrl_reg = ahci_port_to_ctrl(pnr, reg);
95 return ahci_ctrl_readl(ctrl, ctrl_reg);
96}
97
98static void ahci_port_writel(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg, u32 val)
99{
100 u32 ctrl_reg = ahci_port_to_ctrl(pnr, reg);
101 ahci_ctrl_writel(ctrl, ctrl_reg, val);
102}
103
104// submit ahci command + wait for result
Kevin O'Connor1902c942013-10-26 11:48:06 -0400105static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi,
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100106 void *buffer, u32 bsize)
107{
Gerd Hoffmann6f850492011-07-14 16:24:01 +0200108 u32 val, status, success, flags, intbits, error;
Kevin O'Connor1902c942013-10-26 11:48:06 -0400109 struct ahci_ctrl_s *ctrl = GET_GLOBALFLAT(port_gf->ctrl);
110 struct ahci_cmd_s *cmd = GET_GLOBALFLAT(port_gf->cmd);
111 struct ahci_fis_s *fis = GET_GLOBALFLAT(port_gf->fis);
112 struct ahci_list_s *list = GET_GLOBALFLAT(port_gf->list);
113 u32 pnr = GET_GLOBALFLAT(port_gf->pnr);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100114
Kevin O'Connor890c0852012-05-24 23:55:00 -0400115 SET_LOWFLAT(cmd->fis.reg, 0x27);
116 SET_LOWFLAT(cmd->fis.pmp_type, (1 << 7)); /* cmd fis */
117 SET_LOWFLAT(cmd->prdt[0].base, ((u32)buffer));
118 SET_LOWFLAT(cmd->prdt[0].baseu, 0);
119 SET_LOWFLAT(cmd->prdt[0].flags, bsize-1);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100120
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100121 flags = ((1 << 16) | /* one prd entry */
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100122 (iswrite ? (1 << 6) : 0) |
123 (isatapi ? (1 << 5) : 0) |
Gerd Hoffmanna8c6a4e2011-07-14 16:23:59 +0200124 (5 << 0)); /* fis length (dwords) */
Kevin O'Connor890c0852012-05-24 23:55:00 -0400125 SET_LOWFLAT(list[0].flags, flags);
126 SET_LOWFLAT(list[0].bytes, 0);
127 SET_LOWFLAT(list[0].base, ((u32)(cmd)));
128 SET_LOWFLAT(list[0].baseu, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100129
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400130 dprintf(8, "AHCI/%d: send cmd ...\n", pnr);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200131 intbits = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
132 if (intbits)
133 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, intbits);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100134 ahci_port_writel(ctrl, pnr, PORT_SCR_ACT, 1);
135 ahci_port_writel(ctrl, pnr, PORT_CMD_ISSUE, 1);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200136
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400137 u32 end = timer_calc(AHCI_REQUEST_TIMEOUT);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200138 do {
139 for (;;) {
140 intbits = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
141 if (intbits) {
142 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, intbits);
143 if (intbits & 0x02) {
Kevin O'Connor890c0852012-05-24 23:55:00 -0400144 status = GET_LOWFLAT(fis->psfis[2]);
145 error = GET_LOWFLAT(fis->psfis[3]);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200146 break;
147 }
148 if (intbits & 0x01) {
Kevin O'Connor890c0852012-05-24 23:55:00 -0400149 status = GET_LOWFLAT(fis->rfis[2]);
150 error = GET_LOWFLAT(fis->rfis[3]);
Gerd Hoffmann07532972011-07-14 16:24:00 +0200151 break;
152 }
153 }
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400154 if (timer_check(end)) {
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200155 warn_timeout();
156 return -1;
157 }
Gerd Hoffmann07532972011-07-14 16:24:00 +0200158 yield();
159 }
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400160 dprintf(8, "AHCI/%d: ... intbits 0x%x, status 0x%x ...\n",
Gerd Hoffmann07532972011-07-14 16:24:00 +0200161 pnr, intbits, status);
162 } while (status & ATA_CB_STAT_BSY);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100163
164 success = (0x00 == (status & (ATA_CB_STAT_BSY | ATA_CB_STAT_DF |
Gerd Hoffmanncbda7952011-07-14 16:24:03 +0200165 ATA_CB_STAT_ERR)) &&
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100166 ATA_CB_STAT_RDY == (status & (ATA_CB_STAT_RDY)));
Gerd Hoffmann6f850492011-07-14 16:24:01 +0200167 if (success) {
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400168 dprintf(8, "AHCI/%d: ... finished, status 0x%x, OK\n", pnr,
Gerd Hoffmann6f850492011-07-14 16:24:01 +0200169 status);
170 } else {
171 dprintf(2, "AHCI/%d: ... finished, status 0x%x, ERROR 0x%x\n", pnr,
172 status, error);
173
174 // non-queued error recovery (AHCI 1.3 section 6.2.2.1)
175 // Clears PxCMD.ST to 0 to reset the PxCI register
176 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
177 ahci_port_writel(ctrl, pnr, PORT_CMD, val & ~PORT_CMD_START);
178
179 // waits for PxCMD.CR to clear to 0
180 while (1) {
181 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
182 if ((val & PORT_CMD_LIST_ON) == 0)
183 break;
184 yield();
185 }
186
187 // Clears any error bits in PxSERR to enable capturing new errors
188 val = ahci_port_readl(ctrl, pnr, PORT_SCR_ERR);
189 ahci_port_writel(ctrl, pnr, PORT_SCR_ERR, val);
190
191 // Clears status bits in PxIS as appropriate
192 val = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
193 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, val);
194
195 // If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to 1, issue
196 // a COMRESET to the device to put it in an idle state
197 val = ahci_port_readl(ctrl, pnr, PORT_TFDATA);
198 if (val & (ATA_CB_STAT_BSY | ATA_CB_STAT_DRQ)) {
199 dprintf(2, "AHCI/%d: issue comreset\n", pnr);
200 val = ahci_port_readl(ctrl, pnr, PORT_SCR_CTL);
201 // set Device Detection Initialization (DET) to 1 for 1 ms for comreset
202 ahci_port_writel(ctrl, pnr, PORT_SCR_CTL, val | 1);
203 mdelay (1);
204 ahci_port_writel(ctrl, pnr, PORT_SCR_CTL, val);
205 }
206
207 // Sets PxCMD.ST to 1 to enable issuing new commands
208 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
209 ahci_port_writel(ctrl, pnr, PORT_CMD, val | PORT_CMD_START);
210 }
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100211 return success ? 0 : -1;
212}
213
214#define CDROM_CDB_SIZE 12
215
216int ahci_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
217{
Kevin O'Connor80c2b6e2010-12-05 12:52:02 -0500218 if (! CONFIG_AHCI)
219 return 0;
220
Kevin O'Connor1902c942013-10-26 11:48:06 -0400221 struct ahci_port_s *port_gf = container_of(
222 op->drive_gf, struct ahci_port_s, drive);
223 struct ahci_cmd_s *cmd = GET_GLOBALFLAT(port_gf->cmd);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100224 u8 *atapi = cdbcmd;
225 int i, rc;
226
227 sata_prep_atapi(&cmd->fis, blocksize);
228 for (i = 0; i < CDROM_CDB_SIZE; i++) {
Kevin O'Connor890c0852012-05-24 23:55:00 -0400229 SET_LOWFLAT(cmd->atapi[i], atapi[i]);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100230 }
Kevin O'Connor1902c942013-10-26 11:48:06 -0400231 rc = ahci_command(port_gf, 0, 1, op->buf_fl,
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100232 op->count * blocksize);
233 if (rc < 0)
234 return DISK_RET_EBADTRACK;
235 return DISK_RET_SUCCESS;
236}
237
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200238// read/write count blocks from a harddrive, op->buf_fl must be word aligned
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100239static int
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200240ahci_disk_readwrite_aligned(struct disk_op_s *op, int iswrite)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100241{
Kevin O'Connor1902c942013-10-26 11:48:06 -0400242 struct ahci_port_s *port_gf = container_of(
243 op->drive_gf, struct ahci_port_s, drive);
244 struct ahci_cmd_s *cmd = GET_GLOBALFLAT(port_gf->cmd);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100245 int rc;
246
247 sata_prep_readwrite(&cmd->fis, op, iswrite);
Kevin O'Connor1902c942013-10-26 11:48:06 -0400248 rc = ahci_command(port_gf, iswrite, 0, op->buf_fl,
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100249 op->count * DISK_SECTOR_SIZE);
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400250 dprintf(8, "ahci disk %s, lba %6x, count %3x, buf %p, rc %d\n",
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100251 iswrite ? "write" : "read", (u32)op->lba, op->count, op->buf_fl, rc);
252 if (rc < 0)
253 return DISK_RET_EBADTRACK;
254 return DISK_RET_SUCCESS;
255}
256
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200257// read/write count blocks from a harddrive.
258static int
259ahci_disk_readwrite(struct disk_op_s *op, int iswrite)
260{
261 // if caller's buffer is word aligned, use it directly
262 if (((u32) op->buf_fl & 1) == 0)
263 return ahci_disk_readwrite_aligned(op, iswrite);
264
265 // Use a word aligned buffer for AHCI I/O
266 int rc;
267 struct disk_op_s localop = *op;
Gerd Hoffmannd7a7cf32011-08-04 19:36:27 +0200268 u8 *alignedbuf_fl = GET_GLOBAL(bounce_buf_fl);
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200269 u8 *position = op->buf_fl;
270
271 localop.buf_fl = alignedbuf_fl;
272 localop.count = 1;
273
274 if (iswrite) {
275 u16 block;
276 for (block = 0; block < op->count; block++) {
277 memcpy_fl (alignedbuf_fl, position, DISK_SECTOR_SIZE);
278 rc = ahci_disk_readwrite_aligned (&localop, 1);
279 if (rc)
280 return rc;
281 position += DISK_SECTOR_SIZE;
282 localop.lba++;
283 }
284 } else { // read
285 u16 block;
286 for (block = 0; block < op->count; block++) {
287 rc = ahci_disk_readwrite_aligned (&localop, 0);
288 if (rc)
289 return rc;
290 memcpy_fl (position, alignedbuf_fl, DISK_SECTOR_SIZE);
291 position += DISK_SECTOR_SIZE;
292 localop.lba++;
293 }
294 }
295 return DISK_RET_SUCCESS;
296}
297
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100298// command demuxer
Kevin O'Connor7c80bb82013-10-02 21:28:08 -0400299int VISIBLE32FLAT
300process_ahci_op(struct disk_op_s *op)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100301{
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100302 if (!CONFIG_AHCI)
303 return 0;
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400304 switch (op->command) {
305 case CMD_READ:
306 return ahci_disk_readwrite(op, 0);
307 case CMD_WRITE:
308 return ahci_disk_readwrite(op, 1);
309 case CMD_FORMAT:
310 case CMD_RESET:
311 case CMD_ISREADY:
312 case CMD_VERIFY:
313 case CMD_SEEK:
314 return DISK_RET_SUCCESS;
315 default:
316 dprintf(1, "AHCI: unknown disk command %d\n", op->command);
317 op->count = 0;
318 return DISK_RET_EPARAM;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100319 }
320}
321
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100322static void
323ahci_port_reset(struct ahci_ctrl_s *ctrl, u32 pnr)
324{
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200325 u32 val;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100326
327 /* disable FIS + CMD */
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400328 u32 end = timer_calc(AHCI_RESET_TIMEOUT);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200329 for (;;) {
330 val = ahci_port_readl(ctrl, pnr, PORT_CMD);
331 if (!(val & (PORT_CMD_FIS_RX | PORT_CMD_START |
332 PORT_CMD_FIS_ON | PORT_CMD_LIST_ON)))
333 break;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100334 val &= ~(PORT_CMD_FIS_RX | PORT_CMD_START);
335 ahci_port_writel(ctrl, pnr, PORT_CMD, val);
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400336 if (timer_check(end)) {
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200337 warn_timeout();
338 break;
339 }
340 yield();
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100341 }
342
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100343 /* disable + clear IRQs */
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200344 ahci_port_writel(ctrl, pnr, PORT_IRQ_MASK, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100345 val = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT);
346 if (val)
347 ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, val);
348}
349
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100350static struct ahci_port_s*
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200351ahci_port_alloc(struct ahci_ctrl_s *ctrl, u32 pnr)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100352{
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200353 struct ahci_port_s *port = malloc_tmp(sizeof(*port));
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100354
355 if (!port) {
356 warn_noalloc();
357 return NULL;
358 }
359 port->pnr = pnr;
360 port->ctrl = ctrl;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200361 port->list = memalign_tmp(1024, 1024);
362 port->fis = memalign_tmp(256, 256);
363 port->cmd = memalign_tmp(256, 256);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100364 if (port->list == NULL || port->fis == NULL || port->cmd == NULL) {
365 warn_noalloc();
366 return NULL;
367 }
368 memset(port->list, 0, 1024);
369 memset(port->fis, 0, 256);
370 memset(port->cmd, 0, 256);
371
372 ahci_port_writel(ctrl, pnr, PORT_LST_ADDR, (u32)port->list);
373 ahci_port_writel(ctrl, pnr, PORT_FIS_ADDR, (u32)port->fis);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200374 return port;
375}
376
Gerd Hoffmannce12eaf2013-09-09 16:33:06 +0200377static void ahci_port_release(struct ahci_port_s *port)
378{
379 ahci_port_reset(port->ctrl, port->pnr);
380 free(port->list);
381 free(port->fis);
382 free(port->cmd);
383 free(port);
384}
385
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200386static struct ahci_port_s* ahci_port_realloc(struct ahci_port_s *port)
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200387{
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200388 struct ahci_port_s *tmp;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200389 u32 cmd;
390
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200391 tmp = malloc_fseg(sizeof(*port));
Gerd Hoffmannce12eaf2013-09-09 16:33:06 +0200392 if (!tmp) {
393 warn_noalloc();
394 ahci_port_release(port);
395 return NULL;
396 }
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200397 *tmp = *port;
398 free(port);
399 port = tmp;
400
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200401 ahci_port_reset(port->ctrl, port->pnr);
402
403 free(port->list);
404 free(port->fis);
405 free(port->cmd);
406 port->list = memalign_low(1024, 1024);
407 port->fis = memalign_low(256, 256);
408 port->cmd = memalign_low(256, 256);
409
410 ahci_port_writel(port->ctrl, port->pnr, PORT_LST_ADDR, (u32)port->list);
411 ahci_port_writel(port->ctrl, port->pnr, PORT_FIS_ADDR, (u32)port->fis);
412
413 cmd = ahci_port_readl(port->ctrl, port->pnr, PORT_CMD);
414 cmd |= (PORT_CMD_FIS_RX|PORT_CMD_START);
415 ahci_port_writel(port->ctrl, port->pnr, PORT_CMD, cmd);
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200416
417 return port;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200418}
419
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200420#define MAXMODEL 40
421
422/* See ahci spec chapter 10.1 "Software Initialization of HBA" */
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500423static int ahci_port_setup(struct ahci_port_s *port)
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200424{
425 struct ahci_ctrl_s *ctrl = port->ctrl;
426 u32 pnr = port->pnr;
427 char model[MAXMODEL+1];
428 u16 buffer[256];
429 u32 cmd, stat, err, tf;
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200430 int rc;
431
432 /* enable FIS recv */
433 cmd = ahci_port_readl(ctrl, pnr, PORT_CMD);
434 cmd |= PORT_CMD_FIS_RX;
435 ahci_port_writel(ctrl, pnr, PORT_CMD, cmd);
436
437 /* spin up */
438 cmd |= PORT_CMD_SPIN_UP;
439 ahci_port_writel(ctrl, pnr, PORT_CMD, cmd);
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400440 u32 end = timer_calc(AHCI_LINK_TIMEOUT);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200441 for (;;) {
442 stat = ahci_port_readl(ctrl, pnr, PORT_SCR_STAT);
443 if ((stat & 0x07) == 0x03) {
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400444 dprintf(2, "AHCI/%d: link up\n", port->pnr);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200445 break;
446 }
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400447 if (timer_check(end)) {
Kevin O'Connorbf079e12012-03-11 11:19:52 -0400448 dprintf(2, "AHCI/%d: link down\n", port->pnr);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200449 return -1;
450 }
451 yield();
452 }
453
454 /* clear error status */
455 err = ahci_port_readl(ctrl, pnr, PORT_SCR_ERR);
456 if (err)
457 ahci_port_writel(ctrl, pnr, PORT_SCR_ERR, err);
458
459 /* wait for device becoming ready */
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400460 end = timer_calc(AHCI_REQUEST_TIMEOUT);
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200461 for (;;) {
462 tf = ahci_port_readl(ctrl, pnr, PORT_TFDATA);
463 if (!(tf & (ATA_CB_STAT_BSY |
464 ATA_CB_STAT_DRQ)))
465 break;
Kevin O'Connor018bdd72013-07-20 18:22:57 -0400466 if (timer_check(end)) {
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200467 warn_timeout();
468 dprintf(1, "AHCI/%d: device not ready (tf 0x%x)\n", port->pnr, tf);
469 return -1;
470 }
471 yield();
472 }
473
474 /* start device */
475 cmd |= PORT_CMD_START;
476 ahci_port_writel(ctrl, pnr, PORT_CMD, cmd);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100477
478 sata_prep_simple(&port->cmd->fis, ATA_CMD_IDENTIFY_PACKET_DEVICE);
479 rc = ahci_command(port, 0, 0, buffer, sizeof(buffer));
480 if (rc == 0) {
481 port->atapi = 1;
482 } else {
483 port->atapi = 0;
484 sata_prep_simple(&port->cmd->fis, ATA_CMD_IDENTIFY_DEVICE);
485 rc = ahci_command(port, 0, 0, buffer, sizeof(buffer));
486 if (rc < 0)
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200487 return -1;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100488 }
489
Gerd Hoffmann0e6f6362010-12-09 08:39:48 +0100490 port->drive.cntl_id = pnr;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100491 port->drive.removable = (buffer[0] & 0x80) ? 1 : 0;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100492
493 if (!port->atapi) {
494 // found disk (ata)
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400495 port->drive.type = DTYPE_AHCI;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100496 port->drive.blksize = DISK_SECTOR_SIZE;
Kevin O'Connor8ab9a342013-09-28 23:34:49 -0400497 port->drive.pchs.cylinder = buffer[1];
498 port->drive.pchs.head = buffer[3];
499 port->drive.pchs.sector = buffer[6];
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100500
501 u64 sectors;
502 if (buffer[83] & (1 << 10)) // word 83 - lba48 support
503 sectors = *(u64*)&buffer[100]; // word 100-103
504 else
505 sectors = *(u32*)&buffer[60]; // word 60 and word 61
506 port->drive.sectors = sectors;
507 u64 adjsize = sectors >> 11;
508 char adjprefix = 'M';
509 if (adjsize >= (1 << 16)) {
510 adjsize >>= 10;
511 adjprefix = 'G';
512 }
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200513 port->desc = znprintf(MAXDESCSIZE
Kevin O'Connorca2bc1c2010-12-29 21:41:19 -0500514 , "AHCI/%d: %s ATA-%d Hard-Disk (%u %ciBytes)"
515 , port->pnr
516 , ata_extract_model(model, MAXMODEL, buffer)
517 , ata_extract_version(buffer)
518 , (u32)adjsize, adjprefix);
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200519 port->prio = bootprio_find_ata_device(ctrl->pci_tmp, pnr, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100520 } else {
521 // found cdrom (atapi)
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400522 port->drive.type = DTYPE_AHCI_ATAPI;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100523 port->drive.blksize = CDROM_SECTOR_SIZE;
524 port->drive.sectors = (u64)-1;
525 u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05;
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200526 if (!iscd) {
Kevin O'Connorbd6afe52012-07-21 12:01:12 -0400527 dprintf(1, "AHCI/%d: atapi device isn't a cdrom\n", port->pnr);
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200528 return -1;
529 }
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200530 port->desc = znprintf(MAXDESCSIZE
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200531 , "DVD/CD [AHCI/%d: %s ATAPI-%d DVD/CD]"
Kevin O'Connorca2bc1c2010-12-29 21:41:19 -0500532 , port->pnr
533 , ata_extract_model(model, MAXMODEL, buffer)
Gerd Hoffmann263ea2f2011-08-04 19:36:29 +0200534 , ata_extract_version(buffer));
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200535 port->prio = bootprio_find_ata_device(ctrl->pci_tmp, pnr, 0);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100536 }
Gerd Hoffmanne1041192011-07-14 16:24:04 +0200537 return 0;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100538}
539
540// Detect any drives attached to a given controller.
541static void
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200542ahci_port_detect(void *data)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100543{
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200544 struct ahci_port_s *port = data;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100545 int rc;
546
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200547 dprintf(2, "AHCI/%d: probing\n", port->pnr);
548 ahci_port_reset(port->ctrl, port->pnr);
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500549 rc = ahci_port_setup(port);
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200550 if (rc < 0)
551 ahci_port_release(port);
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200552 else {
Gerd Hoffmannef8adc02011-08-04 19:36:31 +0200553 port = ahci_port_realloc(port);
Gerd Hoffmannce12eaf2013-09-09 16:33:06 +0200554 if (port == NULL)
555 return;
Gerd Hoffmann2dcbf7f2011-08-04 19:36:30 +0200556 dprintf(1, "AHCI/%d: registering: \"%s\"\n", port->pnr, port->desc);
557 if (!port->atapi) {
558 // Register with bcv system.
559 boot_add_hd(&port->drive, port->desc, port->prio);
560 } else {
561 // fill cdidmap
562 boot_add_cd(&port->drive, port->desc, port->prio);
563 }
564 }
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100565}
566
567// Initialize an ata controller and detect its drives.
568static void
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500569ahci_controller_setup(struct pci_device *pci)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100570{
571 struct ahci_ctrl_s *ctrl = malloc_fseg(sizeof(*ctrl));
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200572 struct ahci_port_s *port;
Gerd Hoffmann9c869922011-07-14 16:24:05 +0200573 u16 bdf = pci->bdf;
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200574 u32 val, pnr, max;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100575
576 if (!ctrl) {
577 warn_noalloc();
578 return;
579 }
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200580
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500581 if (create_bounce_buf() < 0) {
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200582 warn_noalloc();
Gerd Hoffmannd7a7cf32011-08-04 19:36:27 +0200583 free(ctrl);
Scott Duplichan9c48aab2011-07-14 16:24:02 +0200584 return;
585 }
586
Gerd Hoffmann9c869922011-07-14 16:24:05 +0200587 ctrl->pci_tmp = pci;
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100588 ctrl->pci_bdf = bdf;
589 ctrl->iobase = pci_config_readl(bdf, PCI_BASE_ADDRESS_5);
590 ctrl->irq = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
591 dprintf(1, "AHCI controller at %02x.%x, iobase %x, irq %d\n",
592 bdf >> 3, bdf & 7, ctrl->iobase, ctrl->irq);
593
Kevin O'Connor7eb02222010-12-12 14:01:47 -0500594 pci_config_maskw(bdf, PCI_COMMAND, 0,
595 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
596
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100597 val = ahci_ctrl_readl(ctrl, HOST_CTL);
598 ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
599
600 ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
601 ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
602 dprintf(2, "AHCI: cap 0x%x, ports_impl 0x%x\n",
603 ctrl->caps, ctrl->ports);
604
Gerd Hoffmann9713f242011-08-04 19:36:28 +0200605 max = ctrl->caps & 0x1f;
606 for (pnr = 0; pnr <= max; pnr++) {
607 if (!(ctrl->ports & (1 << pnr)))
608 continue;
609 port = ahci_port_alloc(ctrl, pnr);
610 if (port == NULL)
611 continue;
612 run_thread(ahci_port_detect, port);
613 }
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100614}
615
616// Locate and init ahci controllers.
617static void
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500618ahci_scan(void)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100619{
620 // Scan PCI bus for ATA adapters
Kevin O'Connor9cb49922011-06-20 22:22:42 -0400621 struct pci_device *pci;
622 foreachpci(pci) {
623 if (pci->class != PCI_CLASS_STORAGE_SATA)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100624 continue;
Kevin O'Connor9cb49922011-06-20 22:22:42 -0400625 if (pci->prog_if != 1 /* AHCI rev 1 */)
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100626 continue;
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500627 ahci_controller_setup(pci);
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100628 }
629}
630
631void
632ahci_setup(void)
633{
634 ASSERT32FLAT();
635 if (!CONFIG_AHCI)
636 return;
637
638 dprintf(3, "init ahci\n");
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500639 ahci_scan();
Gerd Hoffmannd52fdf62010-11-29 09:42:13 +0100640}