blob: 126081cead810235c6f3b0c67e2086ff4ad89ef1 [file] [log] [blame]
Isaku Yamahataecbe3fd2012-11-28 10:17:36 +01001/*
2 * Bochs/QEMU ACPI DSDT ASL definition
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
9 *
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19/*
20 * Copyright (c) 2010 Isaku Yamahata
21 * yamahata at valinux co jp
22 * Based on acpi-dsdt.dsl, but heavily modified for q35 chipset.
23 */
24
25DefinitionBlock (
26 "q35-acpi-dsdt.aml",// Output Filename
27 "DSDT", // Signature
28 0x01, // DSDT Compliance Revision
29 "BXPC", // OEMID
30 "BXDSDT", // TABLE ID
31 0x2 // OEM Revision
32 )
33{
34 Scope (\)
35 {
36 /* Debug Output */
37 OperationRegion (DBG, SystemIO, 0x0402, 0x01)
38 Field (DBG, ByteAcc, NoLock, Preserve)
39 {
40 DBGB, 8,
41 }
42
43 /* Debug method - use this method to send output to the QEMU
44 * BIOS debug port. This method handles strings, integers,
45 * and buffers. For example: DBUG("abc") DBUG(0x123) */
46 Method(DBUG, 1) {
47 ToHexString(Arg0, Local0)
48 ToBuffer(Local0, Local0)
49 Subtract(SizeOf(Local0), 1, Local1)
50 Store(Zero, Local2)
51 While (LLess(Local2, Local1)) {
52 Store(DerefOf(Index(Local0, Local2)), DBGB)
53 Increment(Local2)
54 }
55 Store(0x0A, DBGB)
56 }
57 }
58
59
60 Scope (\_SB)
61 {
62 OperationRegion(PCST, SystemIO, 0xae00, 0x0c)
63 OperationRegion(PCSB, SystemIO, 0xae0c, 0x01)
64 Field (PCSB, AnyAcc, NoLock, WriteAsZeros)
65 {
66 PCIB, 8,
67 }
68 }
69
70 /* Zero => PIC mode, One => APIC Mode */
71 Name (\PICF, Zero)
72 Method (\_PIC, 1, NotSerialized)
73 {
74 Store (Arg0, \PICF)
75 }
76
77 /* PCI Bus definition */
78 Scope(\_SB) {
79
80 Device(PCI0) {
81 Name (_HID, EisaId ("PNP0A08"))
82 Name (_CID, EisaId ("PNP0A03"))
83 Name (_ADR, 0x00)
84 Name (_UID, 1)
85
86 // _OSC: based on sample of ACPI3.0b spec
87 Name(SUPP,0) // PCI _OSC Support Field value
88 Name(CTRL,0) // PCI _OSC Control Field value
89 Method(_OSC,4)
90 {
91 // Create DWORD-addressable fields from the Capabilities Buffer
92 CreateDWordField(Arg3,0,CDW1)
93
94 // Check for proper UUID
95 If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
96 {
97 // Create DWORD-addressable fields from the Capabilities Buffer
98 CreateDWordField(Arg3,4,CDW2)
99 CreateDWordField(Arg3,8,CDW3)
100
101 // Save Capabilities DWORD2 & 3
102 Store(CDW2,SUPP)
103 Store(CDW3,CTRL)
104
105 // Always allow native PME, AER (no dependencies)
106 // Never allow SHPC (no SHPC controller in this system)
107 And(CTRL,0x1D,CTRL)
108
109#if 0 // For now, nothing to do
110 If(Not(And(CDW1,1))) // Query flag clear?
111 { // Disable GPEs for features granted native control.
112 If(And(CTRL,0x01)) // Hot plug control granted?
113 {
114 Store(0,HPCE) // clear the hot plug SCI enable bit
115 Store(1,HPCS) // clear the hot plug SCI status bit
116 }
117 If(And(CTRL,0x04)) // PME control granted?
118 {
119 Store(0,PMCE) // clear the PME SCI enable bit
120 Store(1,PMCS) // clear the PME SCI status bit
121 }
122 If(And(CTRL,0x10)) // OS restoring PCI Express cap structure?
123 {
124 // Set status to not restore PCI Express cap structure
125 // upon resume from S3
126 Store(1,S3CR)
127 }
128
129 }
130#endif
131 If(LNotEqual(Arg1,One))
132 { // Unknown revision
133 Or(CDW1,0x08,CDW1)
134 }
135 If(LNotEqual(CDW3,CTRL))
136 { // Capabilities bits were masked
137 Or(CDW1,0x10,CDW1)
138 }
139 // Update DWORD3 in the buffer
140 Store(CTRL,CDW3)
141 } Else {
142 Or(CDW1,4,CDW1) // Unrecognized UUID
143 }
144 Return(Arg3)
145 }
146
147#define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3) \
148 Package() { nr##ffff, 0, lnk0, 0 }, \
149 Package() { nr##ffff, 1, lnk1, 0 }, \
150 Package() { nr##ffff, 2, lnk2, 0 }, \
151 Package() { nr##ffff, 3, lnk3, 0 }
152
153#define prt_slot_lnkA(nr) prt_slot_lnk(nr, LNKA, LNKB, LNKC, LNKD)
154#define prt_slot_lnkB(nr) prt_slot_lnk(nr, LNKB, LNKC, LNKD, LNKA)
155#define prt_slot_lnkC(nr) prt_slot_lnk(nr, LNKC, LNKD, LNKA, LNKB)
156#define prt_slot_lnkD(nr) prt_slot_lnk(nr, LNKD, LNKA, LNKB, LNKC)
157
158#define prt_slot_lnkE(nr) prt_slot_lnk(nr, LNKE, LNKF, LNKG, LNKH)
159#define prt_slot_lnkF(nr) prt_slot_lnk(nr, LNKF, LNKG, LNKH, LNKE)
160#define prt_slot_lnkG(nr) prt_slot_lnk(nr, LNKG, LNKH, LNKE, LNKF)
161#define prt_slot_lnkH(nr) prt_slot_lnk(nr, LNKH, LNKE, LNKF, LNKG)
162
163#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \
Jan Kiszka2114f502012-11-28 10:17:37 +0100164 Package() { nr##ffff, 0, gsi0, 0 }, \
165 Package() { nr##ffff, 1, gsi1, 0 }, \
166 Package() { nr##ffff, 2, gsi2, 0 }, \
167 Package() { nr##ffff, 3, gsi3, 0 }
Isaku Yamahataecbe3fd2012-11-28 10:17:36 +0100168
169#define prt_slot_gsiA(nr) prt_slot_gsi(nr, GSIA, GSIB, GSIC, GSID)
170#define prt_slot_gsiB(nr) prt_slot_gsi(nr, GSIB, GSIC, GSID, GSIA)
171#define prt_slot_gsiC(nr) prt_slot_gsi(nr, GSIC, GSID, GSIA, GSIB)
172#define prt_slot_gsiD(nr) prt_slot_gsi(nr, GSID, GSIA, GSIB, GSIC)
173
174#define prt_slot_gsiE(nr) prt_slot_gsi(nr, GSIE, GSIF, GSIG, GSIH)
175#define prt_slot_gsiF(nr) prt_slot_gsi(nr, GSIF, GSIG, GSIH, GSIE)
176#define prt_slot_gsiG(nr) prt_slot_gsi(nr, GSIG, GSIH, GSIE, GSIF)
177#define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG)
178
179 NAME(PRTP, package()
180 {
181 prt_slot_lnkE(0x0000),
182 prt_slot_lnkF(0x0001),
183 prt_slot_lnkG(0x0002),
184 prt_slot_lnkH(0x0003),
185 prt_slot_lnkE(0x0004),
186 prt_slot_lnkF(0x0005),
187 prt_slot_lnkG(0x0006),
188 prt_slot_lnkH(0x0007),
189 prt_slot_lnkE(0x0008),
190 prt_slot_lnkF(0x0009),
191 prt_slot_lnkG(0x000a),
192 prt_slot_lnkH(0x000b),
193 prt_slot_lnkE(0x000c),
194 prt_slot_lnkF(0x000d),
195 prt_slot_lnkG(0x000e),
196 prt_slot_lnkH(0x000f),
197 prt_slot_lnkE(0x0010),
198 prt_slot_lnkF(0x0011),
199 prt_slot_lnkG(0x0012),
200 prt_slot_lnkH(0x0013),
201 prt_slot_lnkE(0x0014),
202 prt_slot_lnkF(0x0015),
203 prt_slot_lnkG(0x0016),
204 prt_slot_lnkH(0x0017),
205 prt_slot_lnkE(0x0018),
206
207 /* INTA -> PIRQA for slot 25 - 31
208 see the default value of D<N>IR */
209 prt_slot_lnkA(0x0019),
210 prt_slot_lnkA(0x001a),
211 prt_slot_lnkA(0x001b),
212 prt_slot_lnkA(0x001c),
213 prt_slot_lnkA(0x001d),
214
215 /* PCIe->PCI bridge. use PIRQ[E-H] */
216 prt_slot_lnkE(0x001e),
217
218 prt_slot_lnkA(0x001f)
219 })
220
221 NAME(PRTA, package()
222 {
223 prt_slot_gsiE(0x0000),
224 prt_slot_gsiF(0x0001),
225 prt_slot_gsiG(0x0002),
226 prt_slot_gsiH(0x0003),
227 prt_slot_gsiE(0x0004),
228 prt_slot_gsiF(0x0005),
229 prt_slot_gsiG(0x0006),
230 prt_slot_gsiH(0x0007),
231 prt_slot_gsiE(0x0008),
232 prt_slot_gsiF(0x0009),
233 prt_slot_gsiG(0x000a),
234 prt_slot_gsiH(0x000b),
235 prt_slot_gsiE(0x000c),
236 prt_slot_gsiF(0x000d),
237 prt_slot_gsiG(0x000e),
238 prt_slot_gsiH(0x000f),
239 prt_slot_gsiE(0x0010),
240 prt_slot_gsiF(0x0011),
241 prt_slot_gsiG(0x0012),
242 prt_slot_gsiH(0x0013),
243 prt_slot_gsiE(0x0014),
244 prt_slot_gsiF(0x0015),
245 prt_slot_gsiG(0x0016),
246 prt_slot_gsiH(0x0017),
247 prt_slot_gsiE(0x0018),
248
249 /* INTA -> PIRQA for slot 25 - 31, but 30
250 see the default value of D<N>IR */
251 prt_slot_gsiA(0x0019),
252 prt_slot_gsiA(0x001a),
253 prt_slot_gsiA(0x001b),
254 prt_slot_gsiA(0x001c),
255 prt_slot_gsiA(0x001d),
256
257 /* PCIe->PCI bridge. use PIRQ[E-H] */
258 prt_slot_gsiE(0x001e),
259
260 prt_slot_gsiA(0x001f)
261 })
262
263 Method(_PRT, 0, NotSerialized)
264 {
265 /* PCI IRQ routing table, example from ACPI 2.0a specification,
266 section 6.2.8.1 */
267 /* Note: we provide the same info as the PCI routing
268 table of the Bochs BIOS */
269 If (LEqual (\PICF, Zero))
270 {
271 Return (PRTP)
272 }
273 Else
274 {
275 Return (PRTA)
276 }
277 }
278
279 Name (CRES, ResourceTemplate ()
280 {
281 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
282 0x0000, // Address Space Granularity
283 0x0000, // Address Range Minimum
284 0x00FF, // Address Range Maximum
285 0x0000, // Address Translation Offset
286 0x0100, // Address Length
287 ,, )
288 IO (Decode16,
289 0x0CF8, // Address Range Minimum
290 0x0CF8, // Address Range Maximum
291 0x01, // Address Alignment
292 0x08, // Address Length
293 )
294 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
295 0x0000, // Address Space Granularity
296 0x0000, // Address Range Minimum
297 0x0CF7, // Address Range Maximum
298 0x0000, // Address Translation Offset
299 0x0CF8, // Address Length
300 ,, , TypeStatic)
301 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
302 0x0000, // Address Space Granularity
303 0x0D00, // Address Range Minimum
304 0xFFFF, // Address Range Maximum
305 0x0000, // Address Translation Offset
306 0xF300, // Address Length
307 ,, , TypeStatic)
308 DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
309 0x00000000, // Address Space Granularity
310 0x000A0000, // Address Range Minimum
311 0x000BFFFF, // Address Range Maximum
312 0x00000000, // Address Translation Offset
313 0x00020000, // Address Length
314 ,, , AddressRangeMemory, TypeStatic)
315 DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
316 0x00000000, // Address Space Granularity
317 0xC0000000, // Address Range Minimum
318 0xFEBFFFFF, // Address Range Maximum
319 0x00000000, // Address Translation Offset
320 0x3EC00000, // Address Length
321 ,, PW32, AddressRangeMemory, TypeStatic)
322 })
323 Name (CR64, ResourceTemplate ()
324 {
325 QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
326 0x00000000, // Address Space Granularity
327 0x8000000000, // Address Range Minimum
328 0xFFFFFFFFFF, // Address Range Maximum
329 0x00000000, // Address Translation Offset
330 0x8000000000, // Address Length
331 ,, PW64, AddressRangeMemory, TypeStatic)
332 })
333 Method (_CRS, 0)
334 {
335 /* see see acpi.h, struct bfld */
336 External (BDAT, OpRegionObj)
337 Field(BDAT, QWordAcc, NoLock, Preserve) {
338 P0S, 64,
339 P0E, 64,
340 P0L, 64,
341 P1S, 64,
342 P1E, 64,
343 P1L, 64,
344 }
345 Field(BDAT, DWordAcc, NoLock, Preserve) {
346 P0SL, 32,
347 P0SH, 32,
348 P0EL, 32,
349 P0EH, 32,
350 P0LL, 32,
351 P0LH, 32,
352 P1SL, 32,
353 P1SH, 32,
354 P1EL, 32,
355 P1EH, 32,
356 P1LL, 32,
357 P1LH, 32,
358 }
359
360 /* fixup 32bit pci io window */
361 CreateDWordField (CRES,\_SB.PCI0.PW32._MIN, PS32)
362 CreateDWordField (CRES,\_SB.PCI0.PW32._MAX, PE32)
363 CreateDWordField (CRES,\_SB.PCI0.PW32._LEN, PL32)
364 Store (P0SL, PS32)
365 Store (P0EL, PE32)
366 Store (P0LL, PL32)
367
368 If (LAnd(LEqual(P1SL, 0x00), LEqual(P1SH, 0x00))) {
369 Return (CRES)
370 } Else {
371 /* fixup 64bit pci io window */
372 CreateQWordField (CR64,\_SB.PCI0.PW64._MIN, PS64)
373 CreateQWordField (CR64,\_SB.PCI0.PW64._MAX, PE64)
374 CreateQWordField (CR64,\_SB.PCI0.PW64._LEN, PL64)
375 Store (P1S, PS64)
376 Store (P1E, PE64)
377 Store (P1L, PL64)
378 /* add window and return result */
379 ConcatenateResTemplate (CRES, CR64, Local0)
380 Return (Local0)
381 }
382 }
383 }
384 }
385
386 Scope(\_SB.PCI0) {
387 Device (VGA) {
388 Name (_ADR, 0x00020000)
389 Method (_S1D, 0, NotSerialized)
390 {
391 Return (0x00)
392 }
393 Method (_S2D, 0, NotSerialized)
394 {
395 Return (0x00)
396 }
397 Method (_S3D, 0, NotSerialized)
398 {
399 Return (0x00)
400 }
401 }
402
403
404 /* PCI D31:f0 LPC ISA bridge */
405 Device (LPC) {
406 /* PCI D31:f0 */
407 Name (_ADR, 0x001f0000)
408
409 /* ICH9 PCI to ISA irq remapping */
410 OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
411 Field (PIRQ, ByteAcc, NoLock, Preserve)
412 {
413 PRQA, 8,
414 PRQB, 8,
415 PRQC, 8,
416 PRQD, 8,
417
418 Offset (0x08),
419 PRQE, 8,
420 PRQF, 8,
421 PRQG, 8,
422 PRQH, 8
423 }
424
425 OperationRegion (LPCD, PCI_Config, 0x80, 0x2)
426 Field (LPCD, AnyAcc, NoLock, Preserve)
427 {
428 COMA, 3,
429 , 1,
430 COMB, 3,
431
432 Offset(0x01),
433 LPTD, 2,
434 , 2,
435 FDCD, 2
436 }
437 OperationRegion (LPCE, PCI_Config, 0x82, 0x2)
438 Field (LPCE, AnyAcc, NoLock, Preserve)
439 {
440 CAEN, 1,
441 CBEN, 1,
442 LPEN, 1,
443 FDEN, 1
444 }
445
446 /* High Precision Event Timer */
447 Device(HPET) {
448 Name(_HID, EISAID("PNP0103"))
449 Name(_UID, 0)
450 Method (_STA, 0, NotSerialized) {
451 Return(0x0F)
452 }
453 Name(_CRS, ResourceTemplate() {
454 DWordMemory(
455 ResourceConsumer, PosDecode, MinFixed, MaxFixed,
456 NonCacheable, ReadWrite,
457 0x00000000,
458 0xFED00000,
459 0xFED003FF,
460 0x00000000,
461 0x00000400 /* 1K memory: FED00000 - FED003FF */
462 )
463 })
464 }
465 /* Real-time clock */
466 Device (RTC)
467 {
468 Name (_HID, EisaId ("PNP0B00"))
469 Name (_CRS, ResourceTemplate ()
470 {
471 IO (Decode16, 0x0070, 0x0070, 0x10, 0x02)
472 IRQNoFlags () {8}
473 IO (Decode16, 0x0072, 0x0072, 0x02, 0x06)
474 })
475 }
476
477 /* Keyboard seems to be important for WinXP install */
478 Device (KBD)
479 {
480 Name (_HID, EisaId ("PNP0303"))
481 Method (_STA, 0, NotSerialized)
482 {
483 Return (0x0f)
484 }
485
486 Method (_CRS, 0, NotSerialized)
487 {
488 Name (TMP, ResourceTemplate ()
489 {
490 IO (Decode16,
491 0x0060, // Address Range Minimum
492 0x0060, // Address Range Maximum
493 0x01, // Address Alignment
494 0x01, // Address Length
495 )
496 IO (Decode16,
497 0x0064, // Address Range Minimum
498 0x0064, // Address Range Maximum
499 0x01, // Address Alignment
500 0x01, // Address Length
501 )
502 IRQNoFlags ()
503 {1}
504 })
505 Return (TMP)
506 }
507 }
508
509 /* PS/2 mouse */
510 Device (MOU)
511 {
512 Name (_HID, EisaId ("PNP0F13"))
513 Method (_STA, 0, NotSerialized)
514 {
515 Return (0x0f)
516 }
517
518 Method (_CRS, 0, NotSerialized)
519 {
520 Name (TMP, ResourceTemplate ()
521 {
522 IRQNoFlags () {12}
523 })
524 Return (TMP)
525 }
526 }
527
528 /* PS/2 floppy controller */
529 Device (FDC0)
530 {
531 Name (_HID, EisaId ("PNP0700"))
532 Method (_STA, 0, NotSerialized)
533 {
534 Store (\_SB.PCI0.LPC.FDEN, Local0)
535 If (LEqual (Local0, 0))
536 {
537 Return (0x00)
538 }
539 Else
540 {
541 Return (0x0F)
542 }
543 }
544 Method (_CRS, 0, NotSerialized)
545 {
546 Name (BUF0, ResourceTemplate ()
547 {
548 IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
549 IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
550 IRQNoFlags () {6}
551 DMA (Compatibility, NotBusMaster, Transfer8) {2}
552 })
553 Return (BUF0)
554 }
555 }
556
557 /* Parallel port */
558 Device (LPT)
559 {
560 Name (_HID, EisaId ("PNP0400"))
561 Method (_STA, 0, NotSerialized)
562 {
563 Store (\_SB.PCI0.LPC.LPEN, Local0)
564 If (LEqual (Local0, 0))
565 {
566 Return (0x00)
567 }
568 Else
569 {
570 Return (0x0F)
571 }
572 }
573 Method (_CRS, 0, NotSerialized)
574 {
575 Name (BUF0, ResourceTemplate ()
576 {
577 IO (Decode16, 0x0378, 0x0378, 0x08, 0x08)
578 IRQNoFlags () {7}
579 })
580 Return (BUF0)
581 }
582 }
583
584 /* Serial Ports */
585 Device (COM1)
586 {
587 Name (_HID, EisaId ("PNP0501"))
588 Name (_UID, 0x01)
589 Method (_STA, 0, NotSerialized)
590 {
591 Store (\_SB.PCI0.LPC.CAEN, Local0)
592 If (LEqual (Local0, 0))
593 {
594 Return (0x00)
595 }
596 Else
597 {
598 Return (0x0F)
599 }
600 }
601 Method (_CRS, 0, NotSerialized)
602 {
603 Name (BUF0, ResourceTemplate ()
604 {
605 IO (Decode16, 0x03F8, 0x03F8, 0x00, 0x08)
606 IRQNoFlags () {4}
607 })
608 Return (BUF0)
609 }
610 }
611
612 Device (COM2)
613 {
614 Name (_HID, EisaId ("PNP0501"))
615 Name (_UID, 0x02)
616 Method (_STA, 0, NotSerialized)
617 {
618 Store (\_SB.PCI0.LPC.CBEN, Local0)
619 If (LEqual (Local0, 0))
620 {
621 Return (0x00)
622 }
623 Else
624 {
625 Return (0x0F)
626 }
627 }
628 Method (_CRS, 0, NotSerialized)
629 {
630 Name (BUF0, ResourceTemplate ()
631 {
632 IO (Decode16, 0x02F8, 0x02F8, 0x00, 0x08)
633 IRQNoFlags () {3}
634 })
635 Return (BUF0)
636 }
637 }
638 }
639 }
640
641 /* PCI IRQs */
642 Scope(\_SB) {
643#define define_link(link, uid, reg) \
644 Device(link){ \
645 Name(_HID, EISAID("PNP0C0F")) \
646 Name(_UID, uid) \
647 Name(_PRS, ResourceTemplate(){ \
648 Interrupt (, Level, ActiveHigh, \
649 Shared) \
650 { 5, 10, 11 } \
651 }) \
652 Method (_STA, 0, NotSerialized) \
653 { \
654 Store (0x0B, Local0) \
655 If (And (0x80, reg, Local1)) \
656 { \
657 Store (0x09, Local0) \
658 } \
659 Return (Local0) \
660 } \
661 Method (_DIS, 0, NotSerialized) \
662 { \
663 Or (reg, 0x80, reg) \
664 } \
665 Method (_CRS, 0, NotSerialized) \
666 { \
667 Name (PRR0, ResourceTemplate () \
668 { \
669 Interrupt (, Level, ActiveHigh, \
670 Shared) \
671 {1} \
672 }) \
673 CreateDWordField (PRR0, 0x05, TMP) \
674 And (reg, 0x0F, Local0) \
675 Store (Local0, TMP) \
676 Return (PRR0) \
677 } \
678 Method (_SRS, 1, NotSerialized) \
679 { \
680 CreateDWordField (Arg0, 0x05, TMP) \
681 Store (TMP, reg) \
682 } \
683 }
684
685 define_link(LNKA, 0, \_SB.PCI0.LPC.PRQA)
686 define_link(LNKB, 1, \_SB.PCI0.LPC.PRQB)
687 define_link(LNKC, 2, \_SB.PCI0.LPC.PRQC)
688 define_link(LNKD, 3, \_SB.PCI0.LPC.PRQD)
689 define_link(LNKE, 4, \_SB.PCI0.LPC.PRQE)
690 define_link(LNKF, 5, \_SB.PCI0.LPC.PRQF)
691 define_link(LNKG, 6, \_SB.PCI0.LPC.PRQG)
692 define_link(LNKH, 7, \_SB.PCI0.LPC.PRQH)
Jan Kiszka2114f502012-11-28 10:17:37 +0100693
694#define define_gsi_link(link, uid, gsi) \
695 Device(link){ \
696 Name(_HID, EISAID("PNP0C0F")) \
697 Name(_UID, uid) \
698 Name(_PRS, ResourceTemplate() { \
699 Interrupt (, Level, ActiveHigh, \
700 Shared) \
701 { gsi } \
702 }) \
703 Method (_CRS, 0, NotSerialized) \
704 { \
705 Return (ResourceTemplate () { \
706 Interrupt (, Level, ActiveHigh, \
707 Shared) \
708 { gsi } \
709 }) \
710 } \
711 Method (_SRS, 1, NotSerialized) { } \
712 } \
713
714 define_gsi_link(GSIA, 0, 0x10)
715 define_gsi_link(GSIB, 0, 0x11)
716 define_gsi_link(GSIC, 0, 0x12)
717 define_gsi_link(GSID, 0, 0x13)
718 define_gsi_link(GSIE, 0, 0x14)
719 define_gsi_link(GSIF, 0, 0x15)
720 define_gsi_link(GSIG, 0, 0x16)
721 define_gsi_link(GSIH, 0, 0x17)
Isaku Yamahataecbe3fd2012-11-28 10:17:36 +0100722 }
723
724 /* CPU hotplug */
725 Scope(\_SB) {
726 /* Objects filled in by run-time generated SSDT */
727 External(NTFY, MethodObj)
728 External(CPON, PkgObj)
729
730 /* Methods called by run-time generated SSDT Processor objects */
731 Method (CPMA, 1, NotSerialized) {
732 // _MAT method - create an madt apic buffer
733 // Local0 = CPON flag for this cpu
734 Store(DerefOf(Index(CPON, Arg0)), Local0)
735 // Local1 = Buffer (in madt apic form) to return
736 Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
737 // Update the processor id, lapic id, and enable/disable status
738 Store(Arg0, Index(Local1, 2))
739 Store(Arg0, Index(Local1, 3))
740 Store(Local0, Index(Local1, 4))
741 Return (Local1)
742 }
743 Method (CPST, 1, NotSerialized) {
744 // _STA method - return ON status of cpu
745 // Local0 = CPON flag for this cpu
746 Store(DerefOf(Index(CPON, Arg0)), Local0)
747 If (Local0) { Return(0xF) } Else { Return(0x0) }
748 }
749 Method (CPEJ, 2, NotSerialized) {
750 // _EJ0 method - eject callback
751 Sleep(200)
752 }
753
754 /* CPU hotplug notify method */
755 OperationRegion(PRST, SystemIO, 0xaf00, 32)
756 Field (PRST, ByteAcc, NoLock, Preserve)
757 {
758 PRS, 256
759 }
760 Method(PRSC, 0) {
761 // Local5 = active cpu bitmap
762 Store (PRS, Local5)
763 // Local2 = last read byte from bitmap
764 Store (Zero, Local2)
765 // Local0 = cpuid iterator
766 Store (Zero, Local0)
767 While (LLess(Local0, SizeOf(CPON))) {
768 // Local1 = CPON flag for this cpu
769 Store(DerefOf(Index(CPON, Local0)), Local1)
770 If (And(Local0, 0x07)) {
771 // Shift down previously read bitmap byte
772 ShiftRight(Local2, 1, Local2)
773 } Else {
774 // Read next byte from cpu bitmap
775 Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
776 }
777 // Local3 = active state for this cpu
778 Store(And(Local2, 1), Local3)
779
780 If (LNotEqual(Local1, Local3)) {
781 // State change - update CPON with new state
782 Store(Local3, Index(CPON, Local0))
783 // Do CPU notify
784 If (LEqual(Local3, 1)) {
785 NTFY(Local0, 1)
786 } Else {
787 NTFY(Local0, 3)
788 }
789 }
790 Increment(Local0)
791 }
792 Return(One)
793 }
794 }
795
796 Scope (\_GPE)
797 {
798 Name(_HID, "ACPI0006")
799
800 Method(_L00) {
801 Return(0x01)
802 }
803 Method(_L01) {
804 // CPU hotplug event
805 Return(\_SB.PRSC())
806 }
807 Method(_L02) {
808 Return(0x01)
809 }
810 Method(_L03) {
811 Return(0x01)
812 }
813 Method(_L04) {
814 Return(0x01)
815 }
816 Method(_L05) {
817 Return(0x01)
818 }
819 Method(_L06) {
820 Return(0x01)
821 }
822 Method(_L07) {
823 Return(0x01)
824 }
825 Method(_L08) {
826 Return(0x01)
827 }
828 Method(_L09) {
829 Return(0x01)
830 }
831 Method(_L0A) {
832 Return(0x01)
833 }
834 Method(_L0B) {
835 Return(0x01)
836 }
837 Method(_L0C) {
838 Return(0x01)
839 }
840 Method(_L0D) {
841 Return(0x01)
842 }
843 Method(_L0E) {
844 Return(0x01)
845 }
846 Method(_L0F) {
847 Return(0x01)
848 }
849 }
850}