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Stefan Bergerdfbc8852015-03-23 14:22:15 -04001#ifndef TPM_DRIVERS_H
2#define TPM_DRIVERS_H
3
4#include "types.h" // u32
5
6
7enum tpmDurationType {
8 TPM_DURATION_TYPE_SHORT = 0,
9 TPM_DURATION_TYPE_MEDIUM,
10 TPM_DURATION_TYPE_LONG,
11};
12
Stefan Bergerefc49cf2016-02-02 13:09:09 -050013typedef u8 TPMVersion;
14
15#define TPM_VERSION_NONE 0
16#define TPM_VERSION_1_2 1
17#define TPM_VERSION_2 2
18
19TPMVersion tpmhw_probe(void);
Kevin O'Connor2df70282015-11-28 13:43:22 -050020int tpmhw_is_present(void);
21struct tpm_req_header;
Kevin O'Connorb8631ea2015-12-30 12:51:27 -050022int tpmhw_transmit(u8 locty, struct tpm_req_header *req,
Kevin O'Connor2df70282015-11-28 13:43:22 -050023 void *respbuffer, u32 *respbufferlen,
24 enum tpmDurationType to_t);
25void tpmhw_set_timeouts(u32 timeouts[4], u32 durations[3]);
Stefan Bergerdfbc8852015-03-23 14:22:15 -040026
27/* TIS driver */
28/* address of locality 0 (TIS) */
29#define TPM_TIS_BASE_ADDRESS 0xfed40000
30
31#define TIS_REG(LOCTY, REG) \
32 (void *)(TPM_TIS_BASE_ADDRESS + (LOCTY << 12) + REG)
33
34/* hardware registers */
35#define TIS_REG_ACCESS 0x0
36#define TIS_REG_INT_ENABLE 0x8
37#define TIS_REG_INT_VECTOR 0xc
38#define TIS_REG_INT_STATUS 0x10
39#define TIS_REG_INTF_CAPABILITY 0x14
40#define TIS_REG_STS 0x18
41#define TIS_REG_DATA_FIFO 0x24
Stefan Bergerefc49cf2016-02-02 13:09:09 -050042#define TIS_REG_IFACE_ID 0x30
Stefan Bergerdfbc8852015-03-23 14:22:15 -040043#define TIS_REG_DID_VID 0xf00
44#define TIS_REG_RID 0xf04
45
46#define TIS_STS_VALID (1 << 7) /* 0x80 */
47#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
48#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
49#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
50#define TIS_STS_EXPECT (1 << 3) /* 0x08 */
51#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
52
53#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
54#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
55#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
56#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
57#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
58#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
59#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
60
Stefan Bergerec42c8d2015-11-21 14:54:41 -050061/*
62 * Default TIS timeouts used before getting them from the TPM itself
63 */
64#define TIS_DEFAULT_TIMEOUT_A 750000 /* us */
65#define TIS_DEFAULT_TIMEOUT_B 2000000 /* us */
66#define TIS_DEFAULT_TIMEOUT_C 750000 /* us */
67#define TIS_DEFAULT_TIMEOUT_D 750000 /* us */
Stefan Bergerdfbc8852015-03-23 14:22:15 -040068
Stefan Berger0c4ad1e2016-02-02 13:09:13 -050069/*
70 * Default TIS 2 timeouts given in TPM Profile (TPT) Spec
71 */
72#define TIS2_DEFAULT_TIMEOUT_A 750000 /* us */
73#define TIS2_DEFAULT_TIMEOUT_B 2000000 /* us */
74#define TIS2_DEFAULT_TIMEOUT_C 200000 /* us */
75#define TIS2_DEFAULT_TIMEOUT_D 30000 /* us */
76
Stefan Bergerdfbc8852015-03-23 14:22:15 -040077enum tisTimeoutType {
78 TIS_TIMEOUT_TYPE_A = 0,
79 TIS_TIMEOUT_TYPE_B,
80 TIS_TIMEOUT_TYPE_C,
81 TIS_TIMEOUT_TYPE_D,
82};
83
Stefan Bergerec42c8d2015-11-21 14:54:41 -050084/*
85 * Default command durations used before getting them from the
86 * TPM itself
87 */
88#define TPM_DEFAULT_DURATION_SHORT 2000000 /* us */
89#define TPM_DEFAULT_DURATION_MEDIUM 20000000 /* us */
90#define TPM_DEFAULT_DURATION_LONG 60000000 /* us */
Stefan Bergerdfbc8852015-03-23 14:22:15 -040091
Stefan Berger0c4ad1e2016-02-02 13:09:13 -050092/*
93 * TPM 2 command durations; we set them to the timeout values
94 * given in TPM Profile (PTP) Specification; exceeding those
95 * timeout values indicates a faulty TPM.
96 */
97#define TPM2_DEFAULT_DURATION_SHORT 750000 /* us */
98#define TPM2_DEFAULT_DURATION_MEDIUM 2000000 /* us */
99#define TPM2_DEFAULT_DURATION_LONG 2000000 /* us */
100
Stefan Bergerdfbc8852015-03-23 14:22:15 -0400101#endif /* TPM_DRIVERS_H */