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Kevin O'Connor114592f2009-09-28 21:32:08 -04001#ifndef __USB_UHCI_H
2#define __USB_UHCI_H
3
Kevin O'Connor59f02832009-10-12 10:09:15 -04004#include "usb.h" // struct usb_pipe
5
Kevin O'Connor114592f2009-09-28 21:32:08 -04006// usb-uhci.c
7struct usb_s;
Kevin O'Connora5826b52009-10-24 17:57:29 -04008void uhci_init(void *data);
Kevin O'Connor114592f2009-09-28 21:32:08 -04009int uhci_control(u32 endp, int dir, const void *cmd, int cmdsize
10 , void *data, int datasize);
Kevin O'Connor7149fc82010-02-17 23:24:42 -050011struct usb_pipe *uhci_alloc_bulk_pipe(u32 endp);
12int uhci_send_bulk(struct usb_pipe *pipe, int dir, void *data, int datasize);
Kevin O'Connor991eaff2010-02-13 21:51:47 -050013struct usb_pipe *uhci_alloc_intr_pipe(u32 endp, int frameexp);
Kevin O'Connor59f02832009-10-12 10:09:15 -040014int uhci_poll_intr(struct usb_pipe *pipe, void *data);
Kevin O'Connor114592f2009-09-28 21:32:08 -040015
16
17/****************************************************************
18 * uhci structs and flags
19 ****************************************************************/
20
21/* USB port status and control registers */
22#define USBPORTSC1 16
23#define USBPORTSC2 18
24#define USBPORTSC_CCS 0x0001 /* Current Connect Status
25 * ("device present") */
26#define USBPORTSC_CSC 0x0002 /* Connect Status Change */
27#define USBPORTSC_PE 0x0004 /* Port Enable */
28#define USBPORTSC_PEC 0x0008 /* Port Enable Change */
29#define USBPORTSC_DPLUS 0x0010 /* D+ high (line status) */
30#define USBPORTSC_DMINUS 0x0020 /* D- high (line status) */
31#define USBPORTSC_RD 0x0040 /* Resume Detect */
32#define USBPORTSC_RES1 0x0080 /* reserved, always 1 */
33#define USBPORTSC_LSDA 0x0100 /* Low Speed Device Attached */
34#define USBPORTSC_PR 0x0200 /* Port Reset */
35
36/* Legacy support register */
37#define USBLEGSUP 0xc0
38#define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */
39
40/* Command register */
41#define USBCMD 0
42#define USBCMD_RS 0x0001 /* Run/Stop */
43#define USBCMD_HCRESET 0x0002 /* Host reset */
44#define USBCMD_GRESET 0x0004 /* Global reset */
45#define USBCMD_EGSM 0x0008 /* Global Suspend Mode */
46#define USBCMD_FGR 0x0010 /* Force Global Resume */
47#define USBCMD_SWDBG 0x0020 /* SW Debug mode */
48#define USBCMD_CF 0x0040 /* Config Flag (sw only) */
49#define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */
50
51/* Status register */
52#define USBSTS 2
53#define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */
54#define USBSTS_ERROR 0x0002 /* Interrupt due to error */
55#define USBSTS_RD 0x0004 /* Resume Detect */
56#define USBSTS_HSE 0x0008 /* Host System Error: PCI problems */
57#define USBSTS_HCPE 0x0010 /* Host Controller Process Error:
58 * the schedule is buggy */
59#define USBSTS_HCH 0x0020 /* HC Halted */
60
61/* Interrupt enable register */
62#define USBINTR 4
63#define USBINTR_TIMEOUT 0x0001 /* Timeout/CRC error enable */
64#define USBINTR_RESUME 0x0002 /* Resume interrupt enable */
65#define USBINTR_IOC 0x0004 /* Interrupt On Complete enable */
66#define USBINTR_SP 0x0008 /* Short packet interrupt enable */
67
68#define USBFRNUM 6
69#define USBFLBASEADD 8
70#define USBSOF 12
71#define USBSOF_DEFAULT 64 /* Frame length is exactly 1 ms */
72
73struct uhci_framelist {
74 u32 links[1024];
75} PACKED;
76
77#define TD_CTRL_SPD (1 << 29) /* Short Packet Detect */
78#define TD_CTRL_C_ERR_MASK (3 << 27) /* Error Counter bits */
79#define TD_CTRL_C_ERR_SHIFT 27
80#define TD_CTRL_LS (1 << 26) /* Low Speed Device */
81#define TD_CTRL_IOS (1 << 25) /* Isochronous Select */
82#define TD_CTRL_IOC (1 << 24) /* Interrupt on Complete */
83#define TD_CTRL_ACTIVE (1 << 23) /* TD Active */
84#define TD_CTRL_STALLED (1 << 22) /* TD Stalled */
85#define TD_CTRL_DBUFERR (1 << 21) /* Data Buffer Error */
86#define TD_CTRL_BABBLE (1 << 20) /* Babble Detected */
87#define TD_CTRL_NAK (1 << 19) /* NAK Received */
88#define TD_CTRL_CRCTIMEO (1 << 18) /* CRC/Time Out Error */
89#define TD_CTRL_BITSTUFF (1 << 17) /* Bit Stuff Error */
90#define TD_CTRL_ACTLEN_MASK 0x7FF /* actual length, encoded as n - 1 */
91
92#define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
Kevin O'Connor95714392010-02-17 22:59:53 -050093 TD_CTRL_BABBLE | TD_CTRL_CRCTIMEO | \
Kevin O'Connor114592f2009-09-28 21:32:08 -040094 TD_CTRL_BITSTUFF)
95#define uhci_maxerr(err) ((err) << TD_CTRL_C_ERR_SHIFT)
96
97#define TD_TOKEN_DEVADDR_SHIFT 8
98#define TD_TOKEN_TOGGLE_SHIFT 19
99#define TD_TOKEN_TOGGLE (1 << 19)
100#define TD_TOKEN_EXPLEN_SHIFT 21
101#define TD_TOKEN_EXPLEN_MASK 0x7FF /* expected length, encoded as n-1 */
102#define TD_TOKEN_PID_MASK 0xFF
103
104#define uhci_explen(len) ((((len) - 1) & TD_TOKEN_EXPLEN_MASK) << \
105 TD_TOKEN_EXPLEN_SHIFT)
106
107#define uhci_expected_length(token) ((((token) >> TD_TOKEN_EXPLEN_SHIFT) + \
108 1) & TD_TOKEN_EXPLEN_MASK)
109
110struct uhci_td {
111 u32 link;
112 u32 status;
113 u32 token;
114 void *buffer;
115
116 // Software fields
117 u32 data[4];
118} PACKED;
119
120struct uhci_qh {
121 u32 link;
122 u32 element;
123
124 // Software fields
125 struct uhci_td *next_td;
Kevin O'Connor59f02832009-10-12 10:09:15 -0400126 struct usb_pipe pipe;
Kevin O'Connor114592f2009-09-28 21:32:08 -0400127} PACKED;
128
129#define UHCI_PTR_BITS 0x000F
130#define UHCI_PTR_TERM 0x0001
131#define UHCI_PTR_QH 0x0002
132#define UHCI_PTR_DEPTH 0x0004
133#define UHCI_PTR_BREADTH 0x0000
134
135#endif // usb-uhci.h