diff --git a/vgasrc/vga.c b/vgasrc/vga.c
index 903c04c..e7b96ff 100644
--- a/vgasrc/vga.c
+++ b/vgasrc/vga.c
@@ -175,8 +175,7 @@
         // Start address
         address = SCREEN_IO_START(nbcols, nbrows, page);
     } else {
-        struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
-        address = page * GET_GLOBAL(vparam_g->slength);
+        address = page * GET_GLOBAL(vmode_g->slength);
     }
 
     vgahw_set_active_page(address);
@@ -394,8 +393,7 @@
             perform_gray_scale_summing(0x00, 0x100);
     }
 
-    struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
-    vgahw_set_mode(vparam_g);
+    vgahw_set_mode(vmode_g);
 
     if (noclearmem == 0x00)
         clear_screen(vmode_g);
@@ -406,12 +404,12 @@
         crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
 
     // Set the BIOS mem
-    u16 cheight = GET_GLOBAL(vparam_g->cheight);
+    u16 cheight = GET_GLOBAL(vmode_g->cheight);
     SET_BDA(video_mode, mode);
-    SET_BDA(video_cols, GET_GLOBAL(vparam_g->twidth));
-    SET_BDA(video_pagesize, GET_GLOBAL(vparam_g->slength));
+    SET_BDA(video_cols, GET_GLOBAL(vmode_g->twidth));
+    SET_BDA(video_pagesize, GET_GLOBAL(vmode_g->slength));
     SET_BDA(crtc_address, crtc_addr);
-    SET_BDA(video_rows, GET_GLOBAL(vparam_g->theightm1));
+    SET_BDA(video_rows, GET_GLOBAL(vmode_g->theight)-1);
     SET_BDA(char_height, cheight);
     SET_BDA(video_ctl, (0x60 | noclearmem));
     SET_BDA(video_switches, 0xF9);
diff --git a/vgasrc/vgafb.c b/vgasrc/vgafb.c
index 866f7f8..1e1943d 100644
--- a/vgasrc/vgafb.c
+++ b/vgasrc/vgafb.c
@@ -40,8 +40,7 @@
 scroll_pl4(struct vgamode_s *vmode_g, int nblines, int attr
            , struct cursorpos ul, struct cursorpos lr)
 {
-    struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
-    u8 cheight = GET_GLOBAL(vparam_g->cheight);
+    u8 cheight = GET_GLOBAL(vmode_g->cheight);
     int stride = GET_BDA(video_cols);
     void *src_far, *dest_far;
     if (nblines >= 0) {
@@ -72,8 +71,7 @@
 scroll_cga(struct vgamode_s *vmode_g, int nblines, int attr
             , struct cursorpos ul, struct cursorpos lr)
 {
-    struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
-    u8 cheight = GET_GLOBAL(vparam_g->cheight);
+    u8 cheight = GET_GLOBAL(vmode_g->cheight);
     u8 bpp = GET_GLOBAL(vmode_g->pixbits);
     int stride = GET_BDA(video_cols) * bpp;
     void *src_far, *dest_far;
@@ -190,8 +188,7 @@
     if (cp.x >= nbcols)
         return;
 
-    struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
-    u8 cheight = GET_GLOBAL(vparam_g->cheight);
+    u8 cheight = GET_GLOBAL(vmode_g->cheight);
     u8 *fdata_g;
     switch (cheight) {
     case 14:
diff --git a/vgasrc/vgaio.c b/vgasrc/vgaio.c
index ffded34..6154076 100644
--- a/vgasrc/vgaio.c
+++ b/vgasrc/vgaio.c
@@ -481,16 +481,17 @@
 }
 
 void
-vgahw_set_mode(struct VideoParam_s *vparam_g)
+vgahw_set_mode(struct vgamode_s *vmode_g)
 {
     // Reset Attribute Ctl flip-flop
     inb(VGAREG_ACTL_RESET);
 
     // Set Attribute Ctl
+    u8 *regs = GET_GLOBAL(vmode_g->actl_regs);
     u16 i;
     for (i = 0; i <= 0x13; i++) {
         outb(i, VGAREG_ACTL_ADDRESS);
-        outb(GET_GLOBAL(vparam_g->actl_regs[i]), VGAREG_ACTL_WRITE_DATA);
+        outb(GET_GLOBAL(regs[i]), VGAREG_ACTL_WRITE_DATA);
     }
     outb(0x14, VGAREG_ACTL_ADDRESS);
     outb(0x00, VGAREG_ACTL_WRITE_DATA);
@@ -498,19 +499,21 @@
     // Set Sequencer Ctl
     outb(0, VGAREG_SEQU_ADDRESS);
     outb(0x03, VGAREG_SEQU_DATA);
+    regs = GET_GLOBAL(vmode_g->sequ_regs);
     for (i = 1; i <= 4; i++) {
         outb(i, VGAREG_SEQU_ADDRESS);
-        outb(GET_GLOBAL(vparam_g->sequ_regs[i - 1]), VGAREG_SEQU_DATA);
+        outb(GET_GLOBAL(regs[i - 1]), VGAREG_SEQU_DATA);
     }
 
     // Set Grafx Ctl
+    regs = GET_GLOBAL(vmode_g->grdc_regs);
     for (i = 0; i <= 8; i++) {
         outb(i, VGAREG_GRDC_ADDRESS);
-        outb(GET_GLOBAL(vparam_g->grdc_regs[i]), VGAREG_GRDC_DATA);
+        outb(GET_GLOBAL(regs[i]), VGAREG_GRDC_DATA);
     }
 
     // Set CRTC address VGA or MDA
-    u8 miscreg = GET_GLOBAL(vparam_g->miscreg);
+    u8 miscreg = GET_GLOBAL(vmode_g->miscreg);
     u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
     if (!(miscreg & 1))
         crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
@@ -518,9 +521,10 @@
     // Disable CRTC write protection
     outw(0x0011, crtc_addr);
     // Set CRTC regs
+    regs = GET_GLOBAL(vmode_g->crtc_regs);
     for (i = 0; i <= 0x18; i++) {
         outb(i, crtc_addr);
-        outb(GET_GLOBAL(vparam_g->crtc_regs[i]), crtc_addr + 1);
+        outb(GET_GLOBAL(regs[i]), crtc_addr + 1);
     }
 
     // Set the misc register
diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c
index 9fac4cd..10bcbcd 100644
--- a/vgasrc/vgatables.c
+++ b/vgasrc/vgatables.c
@@ -496,39 +496,39 @@
 #define VPARAM(x) &video_param_table[x]
 
 static struct vgamode_s vga_modes[] VAR16 = {
-    //mode model     tx  ty  ch bits sstart    slength vparam
+    //mode model     tx  ty  ch bits sstart    slength
     // pelm  dac            sequ     misc  crtc     actl     grdc
-    {0x00, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17)
+    {0x00, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800
      , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 },
-    {0x01, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17)
+    {0x01, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800
      , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 },
-    {0x02, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18)
+    {0x02, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000
      , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 },
-    {0x03, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18)
+    {0x03, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000
      , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 },
-    {0x04, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800, VPARAM(0x04)
+    {0x04, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800
      , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
-    {0x05, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800, VPARAM(0x05)
+    {0x05, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800
      , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
-    {0x06, CGA,      80, 25,  8, 1, SEG_CTEXT, 0x1000, VPARAM(0x06)
+    {0x06, CGA,      80, 25,  8, 1, SEG_CTEXT, 0x1000
      , 0xFF, PAL(palette1), sequ_06, 0x63, crtc_06, actl_06, grdc_06},
-    {0x07, MTEXT,    80, 25, 16, 4, SEG_MTEXT, 0x1000, VPARAM(0x07)
+    {0x07, MTEXT,    80, 25, 16, 4, SEG_MTEXT, 0x1000
      , 0xFF, PAL(palette0), sequ_03, 0x66, crtc_07, actl_07, grdc_07},
-    {0x0D, PLANAR4,  40, 25,  8, 4, SEG_GRAPH, 0x2000, VPARAM(0x0d)
+    {0x0D, PLANAR4,  40, 25,  8, 4, SEG_GRAPH, 0x2000
      , 0xFF, PAL(palette1), sequ_0d, 0x63, crtc_0d, actl_0d, grdc_0d},
-    {0x0E, PLANAR4,  80, 25,  8, 4, SEG_GRAPH, 0x4000, VPARAM(0x0e)
+    {0x0E, PLANAR4,  80, 25,  8, 4, SEG_GRAPH, 0x4000
      , 0xFF, PAL(palette1), sequ_0e, 0x63, crtc_0e, actl_0d, grdc_0d},
-    {0x0F, PLANAR1,  80, 25, 14, 1, SEG_GRAPH, 0x8000, VPARAM(0x11)
+    {0x0F, PLANAR1,  80, 25, 14, 1, SEG_GRAPH, 0x8000
      , 0xFF, PAL(palette0), sequ_0e, 0xa3, crtc_0f, actl_0f, grdc_0d},
-    {0x10, PLANAR4,  80, 25, 14, 4, SEG_GRAPH, 0x8000, VPARAM(0x12)
+    {0x10, PLANAR4,  80, 25, 14, 4, SEG_GRAPH, 0x8000
      , 0xFF, PAL(palette2), sequ_0e, 0xa3, crtc_0f, actl_10, grdc_0d},
-    {0x11, PLANAR1,  80, 30, 16, 1, SEG_GRAPH, 0x0000, VPARAM(0x1a)
+    {0x11, PLANAR1,  80, 30, 16, 1, SEG_GRAPH, 0x0000
      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_11, grdc_0d},
-    {0x12, PLANAR4,  80, 30, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1b)
+    {0x12, PLANAR4,  80, 30, 16, 4, SEG_GRAPH, 0x0000
      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_10, grdc_0d},
-    {0x13, LINEAR8,  40, 25,  8, 8, SEG_GRAPH, 0x0000, VPARAM(0x1c)
+    {0x13, LINEAR8,  40, 25,  8, 8, SEG_GRAPH, 0x0000
      , 0xFF, PAL(palette3), sequ_13, 0x63, crtc_13, actl_13, grdc_13},
-    {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1d)
+    {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000
      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_6A, actl_10, grdc_0d},
 };
 
diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h
index 9976745..f31595e 100644
--- a/vgasrc/vgatables.h
+++ b/vgasrc/vgatables.h
@@ -102,7 +102,6 @@
     u8 pixbits;
     u16 sstart;
     u16 slength;
-    struct VideoParam_s *vparam;
 
     u8 pelmask;
     u8 *dac;
@@ -221,7 +220,7 @@
 u16 vgahw_get_vde(void);
 void vgahw_save_state(u16 seg, struct saveVideoHardware *info);
 void vgahw_restore_state(u16 seg, struct saveVideoHardware *info);
-void vgahw_set_mode(struct VideoParam_s *vparam_g);
+void vgahw_set_mode(struct vgamode_s *vmode_g);
 void vgahw_enable_video_addressing(u8 disable);
 void vgahw_init(void);