vgabios: Add wrapper functions for accessing standard VGA registers.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
diff --git a/Makefile b/Makefile
index c97ed8f..31eb2f9 100644
--- a/Makefile
+++ b/Makefile
@@ -169,9 +169,10 @@
 ################ VGA build rules
 
 # VGA src files
-SRCVGA=src/output.c src/util.c src/pci.c vgasrc/vgabios.c vgasrc/vgafb.c \
-    vgasrc/vgatables.c vgasrc/vgafonts.c vgasrc/vbe.c \
-    vgasrc/stdvga.c vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c
+SRCVGA=src/output.c src/util.c src/pci.c \
+    vgasrc/vgabios.c vgasrc/vgafb.c vgasrc/vgafonts.c vgasrc/vbe.c \
+    vgasrc/vgatables.c vgasrc/stdvga.c vgasrc/stdvgaio.c \
+    vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c
 
 CFLAGS16VGA = $(CFLAGS16INC) -g -Isrc
 
diff --git a/vgasrc/clext.c b/vgasrc/clext.c
index 413add5..d6fa7a2 100644
--- a/vgasrc/clext.c
+++ b/vgasrc/clext.c
@@ -374,12 +374,12 @@
     outb(0xff, VGAREG_PEL_MASK);
 
     u8 memmodel = GET_GLOBAL(table->info.memmodel);
-    u8 v = stdvga_get_single_palette_reg(0x10) & 0xfe;
+    u8 on = 0;
     if (memmodel == MM_PLANAR)
-        v |= 0x41;
+        on = 0x41;
     else if (memmodel != MM_TEXT)
-        v |= 0x01;
-    stdvga_set_single_palette_reg(0x10, v);
+        on = 0x01;
+    stdvga_attr_mask(0x10, 0x01, on);
 }
 
 static u8
diff --git a/vgasrc/stdvga.c b/vgasrc/stdvga.c
index 6998cd0..0345a81 100644
--- a/vgasrc/stdvga.c
+++ b/vgasrc/stdvga.c
@@ -1,4 +1,4 @@
-// VGA io port access
+// Standard VGA driver code
 //
 // Copyright (C) 2009  Kevin O'Connor <kevin@koconnor.net>
 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
@@ -95,26 +95,6 @@
 }
 
 void
-stdvga_set_single_palette_reg(u8 reg, u8 val)
-{
-    inb(VGAREG_ACTL_RESET);
-    outb(reg, VGAREG_ACTL_ADDRESS);
-    outb(val, VGAREG_ACTL_WRITE_DATA);
-    outb(0x20, VGAREG_ACTL_ADDRESS);
-}
-
-u8
-stdvga_get_single_palette_reg(u8 reg)
-{
-    inb(VGAREG_ACTL_RESET);
-    outb(reg, VGAREG_ACTL_ADDRESS);
-    u8 v = inb(VGAREG_ACTL_READ_DATA);
-    inb(VGAREG_ACTL_RESET);
-    outb(0x20, VGAREG_ACTL_ADDRESS);
-    return v;
-}
-
-void
 stdvga_set_all_palette_reg(u16 seg, u8 *data_far)
 {
     inb(VGAREG_ACTL_RESET);
@@ -206,55 +186,13 @@
  ****************************************************************/
 
 void
-stdvga_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
-{
-    outb(start, VGAREG_DAC_WRITE_ADDRESS);
-    while (count) {
-        outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA);
-        data_far++;
-        outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA);
-        data_far++;
-        outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA);
-        data_far++;
-        count--;
-    }
-}
-
-void
-stdvga_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
-{
-    outb(start, VGAREG_DAC_READ_ADDRESS);
-    while (count) {
-        SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA));
-        data_far++;
-        SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA));
-        data_far++;
-        SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA));
-        data_far++;
-        count--;
-    }
-}
-
-void
-stdvga_set_pel_mask(u8 val)
-{
-    outb(val, VGAREG_PEL_MASK);
-}
-
-u8
-stdvga_get_pel_mask(void)
-{
-    return inb(VGAREG_PEL_MASK);
-}
-
-void
 stdvga_save_dac_state(u16 seg, struct saveDACcolors *info)
 {
     /* XXX: check this */
     SET_FARVAR(seg, info->rwmode, inb(VGAREG_DAC_STATE));
     SET_FARVAR(seg, info->peladdr, inb(VGAREG_DAC_WRITE_ADDRESS));
     SET_FARVAR(seg, info->pelmask, inb(VGAREG_PEL_MASK));
-    stdvga_get_dac_regs(seg, info->dac, 0, 256);
+    stdvga_dac_read(seg, info->dac, 0, 256);
     SET_FARVAR(seg, info->color_select, 0);
 }
 
@@ -262,7 +200,7 @@
 stdvga_restore_dac_state(u16 seg, struct saveDACcolors *info)
 {
     outb(GET_FARVAR(seg, info->pelmask), VGAREG_PEL_MASK);
-    stdvga_set_dac_regs(seg, info->dac, 0, 256);
+    stdvga_dac_write(seg, info->dac, 0, 256);
     outb(GET_FARVAR(seg, info->peladdr), VGAREG_DAC_WRITE_ADDRESS);
 }
 
@@ -273,14 +211,14 @@
     int i;
     for (i = start; i < start+count; i++) {
         u8 rgb[3];
-        stdvga_get_dac_regs(GET_SEG(SS), rgb, i, 1);
+        stdvga_dac_read(GET_SEG(SS), rgb, i, 1);
 
         // intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
         u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
         if (intensity > 0x3f)
             intensity = 0x3f;
 
-        stdvga_set_dac_regs(GET_SEG(SS), rgb, i, 1);
+        stdvga_dac_write(GET_SEG(SS), rgb, i, 1);
     }
     stdvga_screen_enable();
 }
@@ -291,18 +229,6 @@
  ****************************************************************/
 
 void
-stdvga_sequ_write(u8 index, u8 value)
-{
-    outw((value<<8) | index, VGAREG_SEQU_ADDRESS);
-}
-
-void
-stdvga_grdc_write(u8 index, u8 value)
-{
-    outw((value<<8) | index, VGAREG_GRDC_ADDRESS);
-}
-
-void
 stdvga_set_text_block_specifier(u8 spec)
 {
     outw((spec << 8) | 0x03, VGAREG_SEQU_ADDRESS);
@@ -360,7 +286,7 @@
 u16
 stdvga_get_crtc(void)
 {
-    if (inb(VGAREG_READ_MISC_OUTPUT) & 1)
+    if (stdvga_misc_read() & 1)
         return VGAREG_VGA_CRTC_ADDRESS;
     return VGAREG_MDA_CRTC_ADDRESS;
 }
@@ -552,18 +478,18 @@
 
     // if palette loading (bit 3 of modeset ctl = 0)
     if (!(flags & MF_NOPALETTE)) {    // Set the PEL mask
-        stdvga_set_pel_mask(GET_GLOBAL(stdmode_g->pelmask));
+        stdvga_pelmask_write(GET_GLOBAL(stdmode_g->pelmask));
 
         // From which palette
         u8 *palette_g = GET_GLOBAL(stdmode_g->dac);
         u16 palsize = GET_GLOBAL(stdmode_g->dacsize) / 3;
 
         // Always 256*3 values
-        stdvga_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
+        stdvga_dac_write(get_global_seg(), palette_g, 0, palsize);
         u16 i;
         for (i = palsize; i < 0x0100; i++) {
             static u8 rgb[3] VAR16;
-            stdvga_set_dac_regs(get_global_seg(), rgb, i, 1);
+            stdvga_dac_write(get_global_seg(), rgb, i, 1);
         }
 
         if (flags & MF_GRAYSUM)
diff --git a/vgasrc/stdvga.h b/vgasrc/stdvga.h
index 033a711..abda606 100644
--- a/vgasrc/stdvga.h
+++ b/vgasrc/stdvga.h
@@ -85,27 +85,42 @@
 // vgatables.c
 struct vgamode_s *stdvga_find_mode(int mode);
 
+// stdvgaio.c
+u8 stdvga_pelmask_read(void);
+void stdvga_pelmask_write(u8 val);
+u8 stdvga_misc_read(void);
+void stdvga_misc_write(u8 value);
+void stdvga_misc_mask(u8 off, u8 on);
+u8 stdvga_sequ_read(u8 index);
+void stdvga_sequ_write(u8 index, u8 value);
+void stdvga_sequ_mask(u8 index, u8 off, u8 on);
+u8 stdvga_grdc_read(u8 index);
+void stdvga_grdc_write(u8 index, u8 value);
+void stdvga_grdc_mask(u8 index, u8 off, u8 on);
+u8 stdvga_crtc_read(u16 crtc_addr, u8 index);
+void stdvga_crtc_write(u16 crtc_addr, u8 index, u8 value);
+void stdvga_crtc_mask(u16 crtc_addr, u8 index, u8 off, u8 on);
+u8 stdvga_attr_read(u8 index);
+void stdvga_attr_write(u8 index, u8 value);
+void stdvga_attr_mask(u8 index, u8 off, u8 on);
+u8 stdvga_attrindex_read(void);
+void stdvga_attrindex_write(u8 value);
+void stdvga_dac_read(u16 seg, u8 *data_far, u8 start, int count);
+void stdvga_dac_write(u16 seg, u8 *data_far, u8 start, int count);
+
 // stdvga.c
 void stdvga_set_border_color(u8 color);
 void stdvga_set_overscan_border_color(u8 color);
 u8 stdvga_get_overscan_border_color(void);
 void stdvga_set_palette(u8 palid);
-void stdvga_set_single_palette_reg(u8 reg, u8 val);
-u8 stdvga_get_single_palette_reg(u8 reg);
 void stdvga_set_all_palette_reg(u16 seg, u8 *data_far);
 void stdvga_get_all_palette_reg(u16 seg, u8 *data_far);
 void stdvga_toggle_intensity(u8 flag);
 void stdvga_select_video_dac_color_page(u8 flag, u8 data);
 void stdvga_read_video_dac_state(u8 *pmode, u8 *curpage);
-void stdvga_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
-void stdvga_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
-void stdvga_set_pel_mask(u8 val);
-u8 stdvga_get_pel_mask(void);
 void stdvga_save_dac_state(u16 seg, struct saveDACcolors *info);
 void stdvga_restore_dac_state(u16 seg, struct saveDACcolors *info);
 void stdvga_perform_gray_scale_summing(u16 start, u16 count);
-void stdvga_sequ_write(u8 index, u8 value);
-void stdvga_grdc_write(u8 index, u8 value);
 void stdvga_set_text_block_specifier(u8 spec);
 void stdvga_load_font(u16 seg, void *src_far, u16 count
                       , u16 start, u8 destflags, u8 fontsize);
diff --git a/vgasrc/stdvgaio.c b/vgasrc/stdvgaio.c
new file mode 100644
index 0000000..5591ad2
--- /dev/null
+++ b/vgasrc/stdvgaio.c
@@ -0,0 +1,184 @@
+// Standard VGA IO port access
+//
+// Copyright (C) 2012  Kevin O'Connor <kevin@koconnor.net>
+//
+// This file may be distributed under the terms of the GNU LGPLv3 license.
+
+#include "stdvga.h" // stdvga_pelmask_read
+#include "ioport.h" // inb
+
+u8
+stdvga_pelmask_read(void)
+{
+    return inb(VGAREG_PEL_MASK);
+}
+
+void
+stdvga_pelmask_write(u8 value)
+{
+    outb(value, VGAREG_PEL_MASK);
+}
+
+
+u8
+stdvga_misc_read(void)
+{
+    return inb(VGAREG_READ_MISC_OUTPUT);
+}
+
+void
+stdvga_misc_write(u8 value)
+{
+    outb(value, VGAREG_WRITE_MISC_OUTPUT);
+}
+
+void
+stdvga_misc_mask(u8 off, u8 on)
+{
+    stdvga_misc_write((stdvga_misc_read() & ~off) | on);
+}
+
+
+u8
+stdvga_sequ_read(u8 index)
+{
+    outb(index, VGAREG_SEQU_ADDRESS);
+    return inb(VGAREG_SEQU_DATA);
+}
+
+void
+stdvga_sequ_write(u8 index, u8 value)
+{
+    outw((value<<8) | index, VGAREG_SEQU_ADDRESS);
+}
+
+void
+stdvga_sequ_mask(u8 index, u8 off, u8 on)
+{
+    outb(index, VGAREG_SEQU_ADDRESS);
+    u8 v = inb(VGAREG_SEQU_DATA);
+    outb((v & ~off) | on, VGAREG_SEQU_DATA);
+}
+
+
+u8
+stdvga_grdc_read(u8 index)
+{
+    outb(index, VGAREG_GRDC_ADDRESS);
+    return inb(VGAREG_GRDC_DATA);
+}
+
+void
+stdvga_grdc_write(u8 index, u8 value)
+{
+    outw((value<<8) | index, VGAREG_GRDC_ADDRESS);
+}
+
+void
+stdvga_grdc_mask(u8 index, u8 off, u8 on)
+{
+    outb(index, VGAREG_GRDC_ADDRESS);
+    u8 v = inb(VGAREG_GRDC_DATA);
+    outb((v & ~off) | on, VGAREG_GRDC_DATA);
+}
+
+
+u8
+stdvga_crtc_read(u16 crtc_addr, u8 index)
+{
+    outb(index, crtc_addr);
+    return inb(crtc_addr + 1);
+}
+
+void
+stdvga_crtc_write(u16 crtc_addr, u8 index, u8 value)
+{
+    outw((value<<8) | index, crtc_addr);
+}
+
+void
+stdvga_crtc_mask(u16 crtc_addr, u8 index, u8 off, u8 on)
+{
+    outb(index, crtc_addr);
+    u8 v = inb(crtc_addr + 1);
+    outb((v & ~off) | on, crtc_addr + 1);
+}
+
+
+u8
+stdvga_attr_read(u8 index)
+{
+    inb(VGAREG_ACTL_RESET);
+    u8 orig = inb(VGAREG_ACTL_ADDRESS);
+    outb(index, VGAREG_ACTL_ADDRESS);
+    u8 v = inb(VGAREG_ACTL_READ_DATA);
+    inb(VGAREG_ACTL_RESET);
+    outb(orig, VGAREG_ACTL_ADDRESS);
+    return v;
+}
+
+void
+stdvga_attr_write(u8 index, u8 value)
+{
+    inb(VGAREG_ACTL_RESET);
+    u8 orig = inb(VGAREG_ACTL_ADDRESS);
+    outb(index, VGAREG_ACTL_ADDRESS);
+    outb(value, VGAREG_ACTL_WRITE_DATA);
+    outb(orig, VGAREG_ACTL_ADDRESS);
+}
+
+void
+stdvga_attr_mask(u8 index, u8 off, u8 on)
+{
+    inb(VGAREG_ACTL_RESET);
+    u8 orig = inb(VGAREG_ACTL_ADDRESS);
+    outb(index, VGAREG_ACTL_ADDRESS);
+    u8 v = inb(VGAREG_ACTL_READ_DATA);
+    outb((v & ~off) | on, VGAREG_ACTL_WRITE_DATA);
+    outb(orig, VGAREG_ACTL_ADDRESS);
+}
+
+u8
+stdvga_attrindex_read(void)
+{
+    inb(VGAREG_ACTL_RESET);
+    return inb(VGAREG_ACTL_ADDRESS);
+}
+
+void
+stdvga_attrindex_write(u8 value)
+{
+    inb(VGAREG_ACTL_RESET);
+    outb(value, VGAREG_ACTL_ADDRESS);
+}
+
+
+void
+stdvga_dac_read(u16 seg, u8 *data_far, u8 start, int count)
+{
+    outb(start, VGAREG_DAC_READ_ADDRESS);
+    while (count) {
+        SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA));
+        data_far++;
+        SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA));
+        data_far++;
+        SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA));
+        data_far++;
+        count--;
+    }
+}
+
+void
+stdvga_dac_write(u16 seg, u8 *data_far, u8 start, int count)
+{
+    outb(start, VGAREG_DAC_WRITE_ADDRESS);
+    while (count) {
+        outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA);
+        data_far++;
+        outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA);
+        data_far++;
+        outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA);
+        data_far++;
+        count--;
+    }
+}
diff --git a/vgasrc/vgabios.c b/vgasrc/vgabios.c
index 8ab5baa..84b112c 100644
--- a/vgasrc/vgabios.c
+++ b/vgasrc/vgabios.c
@@ -575,7 +575,7 @@
 {
     if (regs->bl > 0x14)
         return;
-    stdvga_set_single_palette_reg(regs->bl, regs->bh);
+    stdvga_attr_write(regs->bl, regs->bh);
 }
 
 static void
@@ -601,7 +601,7 @@
 {
     if (regs->bl > 0x14)
         return;
-    regs->bh = stdvga_get_single_palette_reg(regs->bl);
+    regs->bh = stdvga_attr_read(regs->bl);
 }
 
 static void
@@ -620,13 +620,13 @@
 handle_101010(struct bregs *regs)
 {
     u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
-    stdvga_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+    stdvga_dac_write(GET_SEG(SS), rgb, regs->bx, 1);
 }
 
 static void
 handle_101012(struct bregs *regs)
 {
-    stdvga_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+    stdvga_dac_write(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
 }
 
 static void
@@ -639,7 +639,7 @@
 handle_101015(struct bregs *regs)
 {
     u8 rgb[3];
-    stdvga_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+    stdvga_dac_read(GET_SEG(SS), rgb, regs->bx, 1);
     regs->dh = rgb[0];
     regs->ch = rgb[1];
     regs->cl = rgb[2];
@@ -648,19 +648,19 @@
 static void
 handle_101017(struct bregs *regs)
 {
-    stdvga_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+    stdvga_dac_read(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
 }
 
 static void
 handle_101018(struct bregs *regs)
 {
-    stdvga_set_pel_mask(regs->bl);
+    stdvga_pelmask_write(regs->bl);
 }
 
 static void
 handle_101019(struct bregs *regs)
 {
-    regs->bl = stdvga_get_pel_mask();
+    regs->bl = stdvga_pelmask_read();
 }
 
 static void