pci: enable SERR# for error forwarding in bridge control register

For PCIe device support AER(Advanced Error Reporting), from the
pcie spec 3.0 chapter 6.2.5, ERR_COR, ERR_NONFATAL, and ERR_FATAL
can be forwarded from the secondary interface to the primary interface,
only require the SERR# Enable bit in the Bridge Control register is set.

and at the kernel side, we found only _HPP() method can enable
SERR#, So here we want to turn on this bit.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
1 file changed
tree: 8992a21121f559ba762c29658adb7e834d01e552
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