Fix potential build failure due to text16 section being too large.

A relative PC jump can't exceed 32K, but .text16 can be bigger than 32K.
Separate out .text16 into data sections (.data16) and code (.text16).
Place text and fixed sections together at end of f-segment.
This reduces 16bit text size to ~28K which fixes build errors for now.
diff --git a/src/rombios.lds.S b/src/rombios.lds.S
index 8400732..6f6040b 100644
--- a/src/rombios.lds.S
+++ b/src/rombios.lds.S
@@ -14,9 +14,11 @@
         .text code32_start : {
                 *(.text32)
 
-                . = code16_start + BUILD_BIOS_ADDR - code32_start ;
+                . = data16_start + BUILD_BIOS_ADDR - code32_start ;
+                *(.data16)
+                . = text16_start + BUILD_BIOS_ADDR - code32_start ;
                 *(.text16)
-                final_code16_end = . ;
+                final_text16_end = . ;
                 }
         /DISCARD/ : {
                 *(.text*) *(.data*) *(.bss*) *(.rodata*)
diff --git a/src/rombios16.lds.S b/src/rombios16.lds.S
index 07a6385..d4e7648 100644
--- a/src/rombios16.lds.S
+++ b/src/rombios16.lds.S
@@ -8,7 +8,10 @@
 OUTPUT_ARCH("i386")
 SECTIONS
 {
-        .text16 code16_start : {
+        .data16 data16_start : {
+                *(.data16)
+                }
+        .text16 text16_start : {
                 *(.text16)
                 }
         /DISCARD/ : { *(.discard*) }
diff --git a/tools/checkrom.py b/tools/checkrom.py
index b1d732a..6f7b3ba 100755
--- a/tools/checkrom.py
+++ b/tools/checkrom.py
@@ -29,8 +29,8 @@
         finalsize = 128*1024
 
     # Sanity checks
-    c16e = syms['code16_end'] + 0xf0000
-    f16e = syms['final_code16_end']
+    c16e = syms['text16_end'] + 0xf0000
+    f16e = syms['final_text16_end']
     if c16e != f16e:
         print "Error!  16bit code moved during linking (0x%x vs 0x%x)" % (
             c16e, f16e)
@@ -42,7 +42,7 @@
 
     # Print statistics
     sizefree = syms['freespace_end'] - syms['freespace_start']
-    size16 = syms['code16_end'] - syms['code16_start']
+    size16 = syms['text16_end'] - syms['data16_start']
     size32 = syms['code32_end'] - syms['code32_start']
     totalc = size16+size32
     print "16bit size: %d" % size16
diff --git a/tools/layoutrom.py b/tools/layoutrom.py
index da2940f..85bdc7d 100755
--- a/tools/layoutrom.py
+++ b/tools/layoutrom.py
@@ -142,35 +142,39 @@
             firstfixed, MAXPOS, total, slack,
             (float(slack) / total) * 100.0))
 
-    # Find overall start position
-    start16 = getSectionsStart(
-        textsections + rodatasections + datasections, firstfixed)
+    # Find start positions
+    text16_start = getSectionsStart(textsections, firstfixed)
+    data16_start = getSectionsStart(rodatasections + datasections, text16_start)
 
-    # Write header
+    # Write header and regular sections
     output = open(outname, 'wb')
     output.write(COMMONHEADER + """
-        .text16 0x%x : {
-                code16_start = ABSOLUTE(.) ;
+        data16_start = 0x%x ;
+        .data16 data16_start : {
                 freespace_end = . ;
-""" % start16)
-
-    # Write regular sections
-    outSections(output, textsections)
+""" % data16_start)
+    outSections(output, datasections)
     output.write("code16_rodata = . ;\n")
     outSections(output, rodatasections)
-    outSections(output, datasections)
+    output.write("""
+        }
+
+        text16_start = 0x%x ;
+        .text16 text16_start : {
+""" % text16_start)
+    outSections(output, textsections)
 
     # Write fixed sections
     for addr, section, extrasections in fixedsections:
         name = section[2]
-        output.write(". = ( 0x%x - code16_start ) ;\n" % (addr,))
+        output.write(". = ( 0x%x - text16_start ) ;\n" % (addr,))
         output.write("*(%s)\n" % (name,))
         for extrasection in extrasections:
             output.write("*(%s)\n" % (extrasection[2],))
 
     # Write trailer
     output.write("""
-                code16_end = ABSOLUTE(.) ;
+                text16_end = ABSOLUTE(.) ;
         }
 
         /* Discard regular data sections to force a link error if
@@ -179,7 +183,7 @@
         /DISCARD/ : { *(.text*) *(.rodata*) *(.data*) *(.bss*) *(COMMON) }
 """ + COMMONTRAILER)
 
-    return start16
+    return data16_start
 
 
 ######################################################################