seabios: pciinit: make pci bar assigner preferchable memory aware.
Make pci bar assigner preferchable memory aware.
This is needed for PCI bridge support because memory space and
prefetchable memory space is filtered independently based on
memory base/limit and prefetchable memory base/limit of pci bridge.
On bus 0, such a distinction isn't necessary so keep existing behavior
by checking bus=0.
With this patch, pci mem assignment area has been decreased.
To make seabios behave as before for compatible reason,
Signed-off-by: Isaku Yamahata <firstname.lastname@example.org>
2 files changed