commit 0784d04cb6f6e5c893aaf368091f20326fb847fe
author Marcel Apfelbaum <marcel.a@redhat.com> Thu Apr 10 21:55:22 2014 +0300
committer Kevin O'Connor <kevin@koconnor.net> Wed Apr 16 10:49:20 2014 -0400
tree 642021244690721d12cc65b58fa281492fd7e1b4
parent c6e298e1f12e0f4ca02b6da5e42919ae055f6830

hw/pci: check if pci2pci bridges implement optional limit registers

<I/O Base Register, I/O Limit Register> pair and
<Prefetchable Memory Base Register, Prefetchable Memory Limit Register> pair
are both optional.
Do not reserve ranges if the above registers are not implemented.

Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>

src/fw/pciinit.c

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 9b5d7ad..bbaecd6 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -26,13 +26,6 @@
 #define PCI_BRIDGE_MEM_MIN    (1<<21)  // 2M == hugepage size
 #define PCI_BRIDGE_IO_MIN      0x1000  // mandated by pci bridge spec
 
-enum pci_region_type {
-    PCI_REGION_TYPE_IO,
-    PCI_REGION_TYPE_MEM,
-    PCI_REGION_TYPE_PREFMEM,
-    PCI_REGION_TYPE_COUNT,
-};
-
 static const char *region_type_name[] = {
     [ PCI_REGION_TYPE_IO ]      = "io",
     [ PCI_REGION_TYPE_MEM ]     = "mem",
@@ -681,6 +674,8 @@
         for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
             u64 align = (type == PCI_REGION_TYPE_IO) ?
                 PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
+            if (!pci_bridge_has_region(s->bus_dev, type))
+                continue;
             if (pci_region_align(&s->r[type]) > align)
                  align = pci_region_align(&s->r[type]);
             u64 sum = pci_region_sum(&s->r[type]);

src/hw/pci.c

diff --git a/src/hw/pci.c b/src/hw/pci.c
index 781c1cc..0379b55 100644
--- a/src/hw/pci.c
+++ b/src/hw/pci.c
@@ -240,6 +240,32 @@
     return 0;
 }
 
+/* Test whether bridge support forwarding of transactions
+ * of a specific type.
+ * Note: disables bridge's window registers as a side effect.
+ */
+int pci_bridge_has_region(struct pci_device *pci,
+        enum pci_region_type region_type)
+{
+    u8 base;
+
+    switch (region_type) {
+        case PCI_REGION_TYPE_IO:
+            base = PCI_IO_BASE;
+            break;
+        case PCI_REGION_TYPE_PREFMEM:
+            base = PCI_PREF_MEMORY_BASE;
+            break;
+        default:
+            /* Regular memory support is mandatory */
+            return 1;
+    }
+
+    pci_config_writeb(pci->bdf, base, 0xFF);
+
+    return pci_config_readb(pci->bdf, base) != 0;
+}
+
 void
 pci_reboot(void)
 {

src/hw/pci.h

diff --git a/src/hw/pci.h b/src/hw/pci.h
index e828225..0aaa84c 100644
--- a/src/hw/pci.h
+++ b/src/hw/pci.h
@@ -12,6 +12,13 @@
 #define PCI_NUM_REGIONS 7
 #define PCI_BRIDGE_NUM_REGIONS 2
 
+enum pci_region_type {
+    PCI_REGION_TYPE_IO,
+    PCI_REGION_TYPE_MEM,
+    PCI_REGION_TYPE_PREFMEM,
+    PCI_REGION_TYPE_COUNT,
+};
+
 static inline u8 pci_bdf_to_bus(u16 bdf) {
     return bdf >> 8;
 }
@@ -117,6 +124,8 @@
 struct pci_device *pci_find_init_device(const struct pci_device_id *ids
                                         , void *arg);
 u8 pci_find_capability(struct pci_device *pci, u8 cap_id);
+int pci_bridge_has_region(struct pci_device *pci,
+                          enum pci_region_type region_type);
 void pci_reboot(void);
 
 #endif