blob: 05c7acfdc3d9458a3bd1b48fc0ff2ed69a410f93 [file] [log] [blame]
Stefan Tauner6ee37e22012-12-29 15:03:51 +00001/*
2 * This file is part of the flashrom project.
3 * It handles everything related to status registers of the JEDEC family 25.
4 *
5 * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger
6 * Copyright (C) 2008 coresystems GmbH
7 * Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
8 * Copyright (C) 2012 Stefan Tauner
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include "flash.h"
25#include "chipdrivers.h"
26#include "spi.h"
27
28/* === Generic functions === */
29int spi_write_status_enable(struct flashctx *flash)
30{
31 static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
32 int result;
33
34 /* Send EWSR (Enable Write Status Register). */
35 result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
36
37 if (result)
38 msg_cerr("%s failed\n", __func__);
39
40 return result;
41}
42
43static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode)
44{
45 int result;
46 int i = 0;
47 /*
48 * WRSR requires either EWSR or WREN depending on chip type.
49 * The code below relies on the fact hat EWSR and WREN have the same
50 * INSIZE and OUTSIZE.
51 */
52 struct spi_command cmds[] = {
53 {
54 .writecnt = JEDEC_WREN_OUTSIZE,
55 .writearr = (const unsigned char[]){ enable_opcode },
56 .readcnt = 0,
57 .readarr = NULL,
58 }, {
59 .writecnt = JEDEC_WRSR_OUTSIZE,
60 .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status },
61 .readcnt = 0,
62 .readarr = NULL,
63 }, {
64 .writecnt = 0,
65 .writearr = NULL,
66 .readcnt = 0,
67 .readarr = NULL,
68 }};
69
70 result = spi_send_multicommand(flash, cmds);
71 if (result) {
72 msg_cerr("%s failed during command execution\n", __func__);
73 /* No point in waiting for the command to complete if execution
74 * failed.
75 */
76 return result;
77 }
78 /* WRSR performs a self-timed erase before the changes take effect.
79 * This may take 50-85 ms in most cases, and some chips apparently
80 * allow running RDSR only once. Therefore pick an initial delay of
81 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
82 */
83 programmer_delay(100 * 1000);
84 while (spi_read_status_register(flash) & SPI_SR_WIP) {
85 if (++i > 490) {
86 msg_cerr("Error: WIP bit after WRSR never cleared\n");
87 return TIMEOUT_ERROR;
88 }
89 programmer_delay(10 * 1000);
90 }
91 return 0;
92}
93
94int spi_write_status_register(struct flashctx *flash, int status)
95{
96 int feature_bits = flash->chip->feature_bits;
97 int ret = 1;
98
99 if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
100 msg_cdbg("Missing status register write definition, assuming "
101 "EWSR is needed\n");
102 feature_bits |= FEATURE_WRSR_EWSR;
103 }
104 if (feature_bits & FEATURE_WRSR_WREN)
105 ret = spi_write_status_register_flag(flash, status, JEDEC_WREN);
106 if (ret && (feature_bits & FEATURE_WRSR_EWSR))
107 ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR);
108 return ret;
109}
110
111uint8_t spi_read_status_register(struct flashctx *flash)
112{
113 static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
114 /* FIXME: No workarounds for driver/hardware bugs in generic code. */
115 unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */
116 int ret;
117
118 /* Read Status Register */
119 ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr);
Nico Huberfcbdc0a2017-10-14 15:01:13 +0200120 if (ret) {
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000121 msg_cerr("RDSR failed!\n");
Nico Huberfcbdc0a2017-10-14 15:01:13 +0200122 /* FIXME: We should propagate the error. */
123 return 0;
124 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000125
126 return readarr[0];
127}
128
Stefan Tauner9530a022012-12-29 15:04:05 +0000129/* A generic block protection disable.
130 * Tests if a protection is enabled with the block protection mask (bp_mask) and returns success otherwise.
131 * Tests if the register bits are locked with the lock_mask (lock_mask).
Stefan Taunercecb2c52013-06-20 22:55:41 +0000132 * Tests if a hardware protection is active (i.e. low pin/high bit value) with the write protection mask
133 * (wp_mask) and bails out in that case.
134 * If there are register lock bits set we try to disable them by unsetting those bits of the previous register
135 * contents that are set in the lock_mask. We then check if removing the lock bits has worked and continue as if
136 * they never had been engaged:
137 * If the lock bits are out of the way try to disable engaged protections.
138 * To support uncommon global unprotects (e.g. on most AT2[56]xx1(A)) unprotect_mask can be used to force
139 * bits to 0 additionally to those set in bp_mask and lock_mask. Only bits set in unprotect_mask are potentially
140 * preserved when doing the final unprotect.
141 *
142 * To sum up:
143 * bp_mask: set those bits that correspond to the bits in the status register that indicate an active protection
144 * (which should be unset after this function returns).
145 * lock_mask: set the bits that correspond to the bits that lock changing the bits above.
146 * wp_mask: set the bits that correspond to bits indicating non-software revocable protections.
147 * unprotect_mask: set the bits that should be preserved if possible when unprotecting.
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000148 */
Stefan Taunercecb2c52013-06-20 22:55:41 +0000149static int spi_disable_blockprotect_generic(struct flashctx *flash, uint8_t bp_mask, uint8_t lock_mask, uint8_t wp_mask, uint8_t unprotect_mask)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000150{
151 uint8_t status;
152 int result;
153
154 status = spi_read_status_register(flash);
Stefan Tauner9530a022012-12-29 15:04:05 +0000155 if ((status & bp_mask) == 0) {
156 msg_cdbg2("Block protection is disabled.\n");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000157 return 0;
Stefan Tauner9530a022012-12-29 15:04:05 +0000158 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000159
160 msg_cdbg("Some block protection in effect, disabling... ");
Stefan Tauner9530a022012-12-29 15:04:05 +0000161 if ((status & lock_mask) != 0) {
162 msg_cdbg("\n\tNeed to disable the register lock first... ");
163 if (wp_mask != 0 && (status & wp_mask) == 0) {
164 msg_cerr("Hardware protection is active, disabling write protection is impossible.\n");
165 return 1;
166 }
167 /* All bits except the register lock bit (often called SPRL, SRWD, WPEN) are readonly. */
168 result = spi_write_status_register(flash, status & ~lock_mask);
169 if (result) {
170 msg_cerr("spi_write_status_register failed.\n");
171 return result;
172 }
Stefan Taunercecb2c52013-06-20 22:55:41 +0000173 status = spi_read_status_register(flash);
174 if ((status & lock_mask) != 0) {
175 msg_cerr("Unsetting lock bit(s) failed.\n");
176 return 1;
177 }
Stefan Tauner9530a022012-12-29 15:04:05 +0000178 msg_cdbg("done.\n");
179 }
180 /* Global unprotect. Make sure to mask the register lock bit as well. */
Stefan Taunercecb2c52013-06-20 22:55:41 +0000181 result = spi_write_status_register(flash, status & ~(bp_mask | lock_mask) & unprotect_mask);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000182 if (result) {
183 msg_cerr("spi_write_status_register failed.\n");
184 return result;
185 }
186 status = spi_read_status_register(flash);
Stefan Tauner9530a022012-12-29 15:04:05 +0000187 if ((status & bp_mask) != 0) {
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000188 msg_cerr("Block protection could not be disabled!\n");
Stefan Taunercecb2c52013-06-20 22:55:41 +0000189 flash->chip->printlock(flash);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000190 return 1;
191 }
Stefan Tauner9530a022012-12-29 15:04:05 +0000192 msg_cdbg("disabled.\n");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000193 return 0;
194}
195
Stefan Tauner9530a022012-12-29 15:04:05 +0000196/* A common block protection disable that tries to unset the status register bits masked by 0x3C. */
197int spi_disable_blockprotect(struct flashctx *flash)
198{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000199 return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
Stefan Tauner9530a022012-12-29 15:04:05 +0000200}
201
Stefan Taunera60d4082014-06-04 16:17:03 +0000202/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and
203 * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */
204int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash)
205{
206 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF);
207}
208
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000209/* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and
210 * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly
211 * non-0). */
212int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash)
213{
214 return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF);
215}
216
217/* A common block protection disable that tries to unset the status register bits masked by 0x3C (BP0-3) and
218 * protected/locked by bit #7. */
219int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash)
220{
221 return spi_disable_blockprotect_generic(flash, 0x3C, 1 << 7, 0, 0xFF);
222}
223
224/* A common block protection disable that tries to unset the status register bits masked by 0x7C (BP0-4) and
225 * protected/locked by bit #7. */
226int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash)
227{
228 return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
229}
Stefan Tauner9530a022012-12-29 15:04:05 +0000230
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000231static void spi_prettyprint_status_register_hex(uint8_t status)
232{
233 msg_cdbg("Chip status register is 0x%02x.\n", status);
234}
235
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000236/* Common highest bit: Status Register Write Disable (SRWD) or Status Register Protect (SRP). */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000237static void spi_prettyprint_status_register_srwd(uint8_t status)
238{
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000239 msg_cdbg("Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset\n",
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000240 (status & (1 << 7)) ? "" : "not ");
241}
242
243/* Common highest bit: Block Protect Write Disable (BPL). */
244static void spi_prettyprint_status_register_bpl(uint8_t status)
245{
246 msg_cdbg("Chip status register: Block Protect Write Disable (BPL) is %sset\n",
247 (status & (1 << 7)) ? "" : "not ");
248}
249
250/* Common lowest 2 bits: WEL and WIP. */
251static void spi_prettyprint_status_register_welwip(uint8_t status)
252{
253 msg_cdbg("Chip status register: Write Enable Latch (WEL) is %sset\n",
254 (status & (1 << 1)) ? "" : "not ");
255 msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is %sset\n",
256 (status & (1 << 0)) ? "" : "not ");
257}
258
259/* Common block protection (BP) bits. */
260static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
261{
262 switch (bp) {
263 /* Fall through. */
264 case 4:
265 msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
Stefan Tauner5c316f92015-02-08 21:57:52 +0000266 (status & (1 << 6)) ? "" : "not ");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000267 case 3:
268 msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
269 (status & (1 << 5)) ? "" : "not ");
270 case 2:
271 msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
272 (status & (1 << 4)) ? "" : "not ");
273 case 1:
274 msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
275 (status & (1 << 3)) ? "" : "not ");
276 case 0:
277 msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
278 (status & (1 << 2)) ? "" : "not ");
279 }
280}
281
282/* Unnamed bits. */
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000283void spi_prettyprint_status_register_bit(uint8_t status, int bit)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000284{
285 msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not ");
286}
287
288int spi_prettyprint_status_register_plain(struct flashctx *flash)
289{
290 uint8_t status = spi_read_status_register(flash);
291 spi_prettyprint_status_register_hex(status);
292 return 0;
293}
294
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000295/* Print the plain hex value and the welwip bits only. */
296int spi_prettyprint_status_register_default_welwip(struct flashctx *flash)
297{
298 uint8_t status = spi_read_status_register(flash);
299 spi_prettyprint_status_register_hex(status);
300
301 spi_prettyprint_status_register_welwip(status);
302 return 0;
303}
304
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000305/* Works for many chips of the
306 * AMIC A25L series
307 * and MX MX25L512
308 */
Stefan Tauner12f3d512014-05-27 21:27:27 +0000309int spi_prettyprint_status_register_bp1_srwd(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000310{
311 uint8_t status = spi_read_status_register(flash);
312 spi_prettyprint_status_register_hex(status);
313
314 spi_prettyprint_status_register_srwd(status);
315 spi_prettyprint_status_register_bit(status, 6);
316 spi_prettyprint_status_register_bit(status, 5);
317 spi_prettyprint_status_register_bit(status, 4);
318 spi_prettyprint_status_register_bp(status, 1);
319 spi_prettyprint_status_register_welwip(status);
320 return 0;
321}
322
323/* Works for many chips of the
324 * AMIC A25L series
Stefan Taunerf4451612013-04-19 01:59:15 +0000325 * PMC Pm25LD series
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000326 */
Stefan Tauner12f3d512014-05-27 21:27:27 +0000327int spi_prettyprint_status_register_bp2_srwd(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000328{
329 uint8_t status = spi_read_status_register(flash);
330 spi_prettyprint_status_register_hex(status);
331
332 spi_prettyprint_status_register_srwd(status);
333 spi_prettyprint_status_register_bit(status, 6);
334 spi_prettyprint_status_register_bit(status, 5);
335 spi_prettyprint_status_register_bp(status, 2);
336 spi_prettyprint_status_register_welwip(status);
337 return 0;
338}
339
340/* Works for many chips of the
341 * ST M25P series
342 * MX MX25L series
343 */
Stefan Tauner12f3d512014-05-27 21:27:27 +0000344int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000345{
346 uint8_t status = spi_read_status_register(flash);
347 spi_prettyprint_status_register_hex(status);
348
349 spi_prettyprint_status_register_srwd(status);
350 spi_prettyprint_status_register_bit(status, 6);
351 spi_prettyprint_status_register_bp(status, 3);
352 spi_prettyprint_status_register_welwip(status);
353 return 0;
354}
355
Stefan Tauner12f3d512014-05-27 21:27:27 +0000356int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash)
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000357{
358 uint8_t status = spi_read_status_register(flash);
359 spi_prettyprint_status_register_hex(status);
360
361 spi_prettyprint_status_register_srwd(status);
362 spi_prettyprint_status_register_bp(status, 4);
363 spi_prettyprint_status_register_welwip(status);
364 return 0;
365}
366
Stefan Tauner85f09f72014-05-27 21:27:14 +0000367int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash)
368{
369 uint8_t status = spi_read_status_register(flash);
370 spi_prettyprint_status_register_hex(status);
371
372 spi_prettyprint_status_register_bpl(status);
373 spi_prettyprint_status_register_bit(status, 6);
374 spi_prettyprint_status_register_bit(status, 5);
375 spi_prettyprint_status_register_bp(status, 2);
376 spi_prettyprint_status_register_welwip(status);
377 return 0;
378}
379
Ben Gardnerbcf61092015-11-22 02:23:31 +0000380int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash)
381{
382 uint8_t status = spi_read_status_register(flash);
383 spi_prettyprint_status_register_hex(status);
384
385 spi_prettyprint_status_register_bpl(status);
386 spi_prettyprint_status_register_bit(status, 6);
387 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
388 spi_prettyprint_status_register_bp(status, 2);
389 spi_prettyprint_status_register_welwip(status);
390 return 0;
391}
392
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000393/* === Amic ===
394 * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
Stefan Tauner12f3d512014-05-27 21:27:27 +0000395 * spi_prettyprint_status_register_bp1_srwd or
396 * spi_prettyprint_status_register_bp2_srwd.
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000397 * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
398 * spi_prettyprint_status_register_amic_a25l032 if those have locks controlled
399 * by the second status register.
400 */
401
402int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
403{
404 uint8_t status = spi_read_status_register(flash);
405 spi_prettyprint_status_register_hex(status);
406
407 spi_prettyprint_status_register_srwd(status);
408 msg_cdbg("Chip status register: Sector Protect Size (SEC) is %i KB\n", (status & (1 << 6)) ? 4 : 64);
409 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
410 spi_prettyprint_status_register_bp(status, 2);
411 spi_prettyprint_status_register_welwip(status);
412 msg_cdbg("Chip status register 2 is NOT decoded!\n");
413 return 0;
414}
415
416/* === Atmel === */
417
418static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status)
419{
420 msg_cdbg("Chip status register: Write Protect Enable (WPEN) is %sset\n",
421 (status & (1 << 7)) ? "" : "not ");
422}
423
424static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
425{
426 msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) is %sset\n",
427 (status & (1 << 7)) ? "" : "not ");
428}
429
430static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status)
431{
432 msg_cdbg("Chip status register: Erase/Program Error (EPE) is %sset\n",
433 (status & (1 << 5)) ? "" : "not ");
434 msg_cdbg("Chip status register: WP# pin (WPP) is %sasserted\n",
435 (status & (1 << 4)) ? "not " : "");
436}
437
438static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
439{
440 msg_cdbg("Chip status register: Software Protection Status (SWP): ");
441 switch (status & (3 << 2)) {
442 case 0x0 << 2:
443 msg_cdbg("no sectors are protected\n");
444 break;
445 case 0x1 << 2:
446 msg_cdbg("some sectors are protected\n");
447 /* FIXME: Read individual Sector Protection Registers. */
448 break;
449 case 0x3 << 2:
450 msg_cdbg("all sectors are protected\n");
451 break;
452 default:
453 msg_cdbg("reserved for future use\n");
454 break;
455 }
456}
457
458int spi_prettyprint_status_register_at25df(struct flashctx *flash)
459{
460 uint8_t status = spi_read_status_register(flash);
461 spi_prettyprint_status_register_hex(status);
462
463 spi_prettyprint_status_register_atmel_at25_srpl(status);
464 spi_prettyprint_status_register_bit(status, 6);
465 spi_prettyprint_status_register_atmel_at25_epewpp(status);
466 spi_prettyprint_status_register_atmel_at25_swp(status);
467 spi_prettyprint_status_register_welwip(status);
468 return 0;
469}
470
471int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
472{
473 /* FIXME: We should check the security lockdown. */
474 msg_cdbg("Ignoring security lockdown (if present)\n");
475 msg_cdbg("Ignoring status register byte 2\n");
476 return spi_prettyprint_status_register_at25df(flash);
477}
478
Stefan Tauner57794ac2012-12-29 15:04:20 +0000479/* used for AT25F512, AT25F1024(A), AT25F2048 */
480int spi_prettyprint_status_register_at25f(struct flashctx *flash)
481{
482 uint8_t status;
483
484 status = spi_read_status_register(flash);
485 spi_prettyprint_status_register_hex(status);
486
487 spi_prettyprint_status_register_atmel_at25_wpen(status);
488 spi_prettyprint_status_register_bit(status, 6);
489 spi_prettyprint_status_register_bit(status, 5);
490 spi_prettyprint_status_register_bit(status, 4);
491 spi_prettyprint_status_register_bp(status, 1);
492 spi_prettyprint_status_register_welwip(status);
493 return 0;
494}
495
496int spi_prettyprint_status_register_at25f512a(struct flashctx *flash)
497{
498 uint8_t status;
499
500 status = spi_read_status_register(flash);
501 spi_prettyprint_status_register_hex(status);
502
503 spi_prettyprint_status_register_atmel_at25_wpen(status);
504 spi_prettyprint_status_register_bit(status, 6);
505 spi_prettyprint_status_register_bit(status, 5);
506 spi_prettyprint_status_register_bit(status, 4);
507 spi_prettyprint_status_register_bit(status, 3);
508 spi_prettyprint_status_register_bp(status, 0);
509 spi_prettyprint_status_register_welwip(status);
510 return 0;
511}
512
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000513int spi_prettyprint_status_register_at25f512b(struct flashctx *flash)
514{
515 uint8_t status = spi_read_status_register(flash);
516 spi_prettyprint_status_register_hex(status);
517
518 spi_prettyprint_status_register_atmel_at25_srpl(status);
519 spi_prettyprint_status_register_bit(status, 6);
520 spi_prettyprint_status_register_atmel_at25_epewpp(status);
521 spi_prettyprint_status_register_bit(status, 3);
522 spi_prettyprint_status_register_bp(status, 0);
523 spi_prettyprint_status_register_welwip(status);
524 return 0;
525}
526
Stefan Tauner57794ac2012-12-29 15:04:20 +0000527int spi_prettyprint_status_register_at25f4096(struct flashctx *flash)
528{
529 uint8_t status;
530
531 status = spi_read_status_register(flash);
532 spi_prettyprint_status_register_hex(status);
533
534 spi_prettyprint_status_register_atmel_at25_wpen(status);
535 spi_prettyprint_status_register_bit(status, 6);
536 spi_prettyprint_status_register_bit(status, 5);
537 spi_prettyprint_status_register_bp(status, 2);
538 spi_prettyprint_status_register_welwip(status);
539 return 0;
540}
541
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000542int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
543{
544 uint8_t status = spi_read_status_register(flash);
545 spi_prettyprint_status_register_hex(status);
546
547 spi_prettyprint_status_register_atmel_at25_wpen(status);
548 msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
549 "%sset\n", (status & (1 << 6)) ? "" : "not ");
550 msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
551 "%sset\n", (status & (1 << 5)) ? "" : "not ");
552 spi_prettyprint_status_register_bit(status, 4);
553 msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
554 "%sset\n", (status & (1 << 3)) ? "" : "not ");
555 msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
556 "%sset\n", (status & (1 << 2)) ? "" : "not ");
557 /* FIXME: Pretty-print detailed sector protection status. */
558 spi_prettyprint_status_register_welwip(status);
559 return 0;
560}
561
562int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
563{
564 uint8_t status = spi_read_status_register(flash);
565 spi_prettyprint_status_register_hex(status);
566
567 spi_prettyprint_status_register_atmel_at25_wpen(status);
568 spi_prettyprint_status_register_bp(status, 4);
569 /* FIXME: Pretty-print detailed sector protection status. */
570 spi_prettyprint_status_register_welwip(status);
571 return 0;
572}
573
574int spi_prettyprint_status_register_at26df081a(struct flashctx *flash)
575{
576 uint8_t status = spi_read_status_register(flash);
577 spi_prettyprint_status_register_hex(status);
578
579 spi_prettyprint_status_register_atmel_at25_srpl(status);
580 msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) is %sset\n",
581 (status & (1 << 6)) ? "" : "not ");
582 spi_prettyprint_status_register_atmel_at25_epewpp(status);
583 spi_prettyprint_status_register_atmel_at25_swp(status);
584 spi_prettyprint_status_register_welwip(status);
585 return 0;
586}
587
Stefan Taunercecb2c52013-06-20 22:55:41 +0000588/* Some Atmel DataFlash chips support per sector protection bits and the write protection bits in the status
589 * register do indicate if none, some or all sectors are protected. It is possible to globally (un)lock all
590 * sectors at once by writing 0 not only the protection bits (2 and 3) but also completely unrelated bits (4 and
591 * 5) which normally are not touched.
592 * Affected are all known Atmel chips matched by AT2[56]D[FLQ]..1A? but the AT26DF041. */
593int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000594{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000595 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 1 << 4, 0x00);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000596}
597
Stefan Taunercecb2c52013-06-20 22:55:41 +0000598int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000599{
600 /* FIXME: We should check the security lockdown. */
601 msg_cinfo("Ignoring security lockdown (if present)\n");
Stefan Taunercecb2c52013-06-20 22:55:41 +0000602 return spi_disable_blockprotect_at2x_global_unprotect(flash);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000603}
604
Stefan Tauner57794ac2012-12-29 15:04:20 +0000605int spi_disable_blockprotect_at25f(struct flashctx *flash)
606{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000607 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF);
Stefan Tauner57794ac2012-12-29 15:04:20 +0000608}
609
610int spi_disable_blockprotect_at25f512a(struct flashctx *flash)
611{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000612 return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 0, 0xFF);
Stefan Tauner57794ac2012-12-29 15:04:20 +0000613}
614
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000615int spi_disable_blockprotect_at25f512b(struct flashctx *flash)
616{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000617 return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 1 << 4, 0xFF);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000618}
619
620int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
621{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000622 return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0, 0xFF);
Stefan Tauner9530a022012-12-29 15:04:05 +0000623 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000624
625int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
626{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000627 return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000628}
629
Nikolay Nikolaevd0e3ea12013-06-28 21:29:08 +0000630/* === Eon === */
631
632int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash)
633{
634 uint8_t status = spi_read_status_register(flash);
635 spi_prettyprint_status_register_hex(status);
636
637 spi_prettyprint_status_register_srwd(status);
638 msg_cdbg("Chip status register: WP# disable (WPDIS) is %sabled\n", (status & (1 << 6)) ? "en " : "dis");
639 spi_prettyprint_status_register_bp(status, 3);
640 spi_prettyprint_status_register_welwip(status);
641 return 0;
642}
643
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000644/* === Intel/Numonyx/Micron - Spansion === */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000645
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000646int spi_disable_blockprotect_n25q(struct flashctx *flash)
647{
648 return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF);
649}
650
651int spi_prettyprint_status_register_n25q(struct flashctx *flash)
652{
653 uint8_t status = spi_read_status_register(flash);
654 spi_prettyprint_status_register_hex(status);
655
656 spi_prettyprint_status_register_srwd(status);
657 if (flash->chip->total_size <= 32 / 8 * 1024) /* N25Q16 and N25Q32: reserved */
658 spi_prettyprint_status_register_bit(status, 6);
659 else
660 msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
661 (status & (1 << 6)) ? "" : "not ");
662 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
663 spi_prettyprint_status_register_bp(status, 2);
664 spi_prettyprint_status_register_welwip(status);
665 return 0;
666}
667
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000668/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000669/* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000670int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash)
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000671{
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000672 return spi_disable_blockprotect_bp2_srwd(flash);
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000673}
674
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000675/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
676int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash)
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000677{
678 uint8_t status = spi_read_status_register(flash);
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000679 spi_prettyprint_status_register_hex(status);
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000680
681 spi_prettyprint_status_register_srwd(status);
682 msg_cdbg("Chip status register: Program Fail Flag (P_FAIL) is %sset\n",
683 (status & (1 << 6)) ? "" : "not ");
684 msg_cdbg("Chip status register: Erase Fail Flag (E_FAIL) is %sset\n",
685 (status & (1 << 5)) ? "" : "not ");
686 spi_prettyprint_status_register_bp(status, 2);
687 spi_prettyprint_status_register_welwip(status);
688 return 0;
689}
690
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000691/* === SST === */
692
693static void spi_prettyprint_status_register_sst25_common(uint8_t status)
694{
695 spi_prettyprint_status_register_hex(status);
696
697 spi_prettyprint_status_register_bpl(status);
698 msg_cdbg("Chip status register: Auto Address Increment Programming (AAI) is %sset\n",
699 (status & (1 << 6)) ? "" : "not ");
700 spi_prettyprint_status_register_bp(status, 3);
701 spi_prettyprint_status_register_welwip(status);
702}
703
704int spi_prettyprint_status_register_sst25(struct flashctx *flash)
705{
706 uint8_t status = spi_read_status_register(flash);
707 spi_prettyprint_status_register_sst25_common(status);
708 return 0;
709}
710
711int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash)
712{
713 static const char *const bpt[] = {
714 "none",
715 "1F0000H-1FFFFFH",
716 "1E0000H-1FFFFFH",
717 "1C0000H-1FFFFFH",
718 "180000H-1FFFFFH",
719 "100000H-1FFFFFH",
720 "all", "all"
721 };
722 uint8_t status = spi_read_status_register(flash);
723 spi_prettyprint_status_register_sst25_common(status);
724 msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]);
725 return 0;
726}
727
728int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash)
729{
730 static const char *const bpt[] = {
731 "none",
732 "0x70000-0x7ffff",
733 "0x60000-0x7ffff",
734 "0x40000-0x7ffff",
735 "all blocks", "all blocks", "all blocks", "all blocks"
736 };
737 uint8_t status = spi_read_status_register(flash);
738 spi_prettyprint_status_register_sst25_common(status);
739 msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]);
740 return 0;
741}