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Stefan Tauner4c723152016-01-14 22:47:55 +00001.\" Load the www device when using groff; provide a fallback for groff's MTO macro that formats email addresses.
2.ie \n[.g] \
3. mso www.tmac
Stefan Tauner0be072c2016-03-13 15:16:30 +00004.el \{
5. de MTO
6 \\$2 \(la\\$1 \(ra\\$3 \
Stefan Tauner4c723152016-01-14 22:47:55 +00007. .
Stefan Tauner0be072c2016-03-13 15:16:30 +00008.\}
Stefan Tauner4c723152016-01-14 22:47:55 +00009.\" Create wrappers for .MTO and .URL that print only text on systems w/o groff or if not outputting to a HTML
10.\" device. To that end we need to distinguish HTML output on groff from other configurations first.
11.nr groffhtml 0
12.if \n[.g] \
13. if "\*[.T]"html" \
14. nr groffhtml 1
15.\" For code reuse it would be nice to have a single wrapper that gets its target macro as parameter.
16.\" However, this did not work out with NetBSD's and OpenBSD's groff...
17.de URLB
18. ie (\n[groffhtml]==1) \{\
19. URL \\$@
20. \}
21. el \{\
22. ie "\\$2"" \{\
23. BR "\\$1" "\\$3"
24. \}
25. el \{\
26. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
27. \}
28. \}
29..
30.de MTOB
31. ie (\n[groffhtml]==1) \{\
32. MTO \\$@
33. \}
34. el \{\
35. ie "\\$2"" \{\
36. BR "\\$1" "\\$3"
37. \}
38. el \{\
39. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
40. \}
41. \}
42..
Joerg Mayera93d9dc2013-08-29 00:38:19 +000043.TH FLASHROM 8 "" ""
Stefan Reinauer261144c2006-07-27 23:29:02 +000044.SH NAME
Uwe Hermann530cb2d2009-05-14 22:58:21 +000045flashrom \- detect, read, write, verify and erase flash chips
Stefan Reinauer261144c2006-07-27 23:29:02 +000046.SH SYNOPSIS
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +000047.B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|\
48\fB\-p\fR <programmername>[:<parameters>]
49 [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>] \
50[\fB\-c\fR <chipname>]
Nico Huber305f4172013-06-14 11:55:26 +020051 [(\fB\-l\fR <file>|\fB\-\-ifd\fR) [\fB\-i\fR <image>]] \
52[\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR]]
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +000053 [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>]
Stefan Reinauer261144c2006-07-27 23:29:02 +000054.SH DESCRIPTION
55.B flashrom
Uwe Hermanne8ba5382009-05-22 11:37:27 +000056is a utility for detecting, reading, writing, verifying and erasing flash
Uwe Hermann530cb2d2009-05-14 22:58:21 +000057chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
Uwe Hermann941a2732011-07-25 21:12:57 +000058using a supported mainboard. However, it also supports various external
59PCI/USB/parallel-port/serial-port based devices which can program flash chips,
60including some network cards (NICs), SATA/IDE controller cards, graphics cards,
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +000061the Bus Pirate device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more.
Uwe Hermanne74b9f82009-04-10 14:41:29 +000062.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000063It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
Uwe Hermann941a2732011-07-25 21:12:57 +000064TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
65parallel flash, or SPI.
Stefan Reinauer261144c2006-07-27 23:29:02 +000066.SH OPTIONS
Uwe Hermann9ff514d2010-06-07 19:41:25 +000067.B IMPORTANT:
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000068Please note that the command line interface for flashrom will change before
69flashrom 1.0. Do not use flashrom in scripts or other automated tools without
Uwe Hermanne8ba5382009-05-22 11:37:27 +000070checking that your flashrom version won't interpret options in a different way.
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000071.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000072You can specify one of
73.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
74or no operation.
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000075If no operation is specified, flashrom will only probe for flash chips. It is
Michael Karcher31fd8252010-03-12 06:41:39 +000076recommended that if you try flashrom the first time on a system, you run it
Uwe Hermann941a2732011-07-25 21:12:57 +000077in probe-only mode and check the output. Also you are advised to make a
Uwe Hermann9ff514d2010-06-07 19:41:25 +000078backup of your current ROM contents with
79.B \-r
Stefan Taunere34e3e82013-01-01 00:06:51 +000080before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the
81.B -p/--programmer
82option to be used (please see below).
Stefan Reinauerde063bf2006-09-21 13:09:22 +000083.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000084.B "\-r, \-\-read <file>"
85Read flash ROM contents and save them into the given
86.BR <file> .
Uwe Hermann941a2732011-07-25 21:12:57 +000087If the file already exists, it will be overwritten.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000088.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000089.B "\-w, \-\-write <file>"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000090Write
91.B <file>
Uwe Hermann9ff514d2010-06-07 19:41:25 +000092into flash ROM. This will first automatically
93.B erase
94the chip, then write to it.
Stefan Taunerac54fbe2011-07-21 19:52:00 +000095.sp
96In the process the chip is also read several times. First an in-memory backup
97is made for disaster recovery and to be able to skip regions that are
98already equal to the image file. This copy is updated along with the write
99operation. In case of erase errors it is even re-read completely. After
100writing has finished and if verification is enabled, the whole flash chip is
101read out and compared with the input image.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000102.TP
Uwe Hermannea07f622009-06-24 17:31:08 +0000103.B "\-n, \-\-noverify"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000104Skip the automatic verification of flash ROM contents after writing. Using this
Uwe Hermannea07f622009-06-24 17:31:08 +0000105option is
106.B not
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000107recommended, you should only use it if you know what you are doing and if you
Uwe Hermannea07f622009-06-24 17:31:08 +0000108feel that the time for verification takes too long.
109.sp
110Typical usage is:
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000111.B "flashrom \-p prog \-n \-w <file>"
Uwe Hermannea07f622009-06-24 17:31:08 +0000112.sp
113This option is only useful in combination with
114.BR \-\-write .
115.TP
Nico Huber99d15952016-05-02 16:54:24 +0200116.B "\-N, \-\-noverify-all"
117Skip not included regions during automatic verification after writing (cf.
118.BR "\-l " "and " "\-i" ).
119You should only use this option if you are sure that communication with
120the flash chip is reliable (e.g. when using the
121.BR internal
122programmer). Even if flashrom is instructed not to touch parts of the
123flash chip, their contents could be damaged (e.g. due to misunderstood
124erase commands).
125.sp
126This option is required to flash an Intel system with locked ME flash
127region using the
128.BR internal
129programmer. It may be enabled by default in this case in the future.
130.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000131.B "\-v, \-\-verify <file>"
132Verify the flash ROM contents against the given
133.BR <file> .
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000134.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000135.B "\-E, \-\-erase"
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000136Erase the flash ROM chip.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000137.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000138.B "\-V, \-\-verbose"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000139More verbose output. This option can be supplied multiple times
Stefan Taunereebeb532011-08-04 17:40:25 +0000140(max. 3 times, i.e.
141.BR \-VVV )
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000142for even more debug output.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000143.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000144.B "\-c, \-\-chip" <chipname>
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000145Probe only for the specified flash ROM chip. This option takes the chip name as
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000146printed by
147.B "flashrom \-L"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000148without the vendor name as parameter. Please note that the chip name is
149case sensitive.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000150.TP
Joerg Mayer645c6df2010-03-13 14:47:48 +0000151.B "\-f, \-\-force"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000152Force one or more of the following actions:
Joerg Mayer645c6df2010-03-13 14:47:48 +0000153.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000154* Force chip read and pretend the chip is there.
155.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000156* Force chip access even if the chip is bigger than the maximum supported \
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000157size for the flash bus.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000158.sp
159* Force erase even if erase is known bad.
160.sp
161* Force write even if write is known bad.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000162.TP
163.B "\-l, \-\-layout <file>"
164Read ROM layout from
165.BR <file> .
Uwe Hermann87c07932009-05-05 16:15:46 +0000166.sp
167flashrom supports ROM layouts. This allows you to flash certain parts of
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000168the flash chip only. A ROM layout file contains multiple lines with the
169following syntax:
170.sp
171.B " startaddr:endaddr imagename"
172.sp
173.BR "startaddr " "and " "endaddr "
174are hexadecimal addresses within the ROM file and do not refer to any
175physical address. Please note that using a 0x prefix for those hexadecimal
176numbers is not necessary, but you can't specify decimal/octal numbers.
177.BR "imagename " "is an arbitrary name for the region/image from"
178.BR " startaddr " "to " "endaddr " "(both addresses included)."
179.sp
180Example:
Uwe Hermann87c07932009-05-05 16:15:46 +0000181.sp
182 00000000:00008fff gfxrom
183 00009000:0003ffff normal
184 00040000:0007ffff fallback
185.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000186If you only want to update the image named
187.BR "normal " "in a ROM based on the layout above, run"
Uwe Hermann87c07932009-05-05 16:15:46 +0000188.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000189.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000190.sp
Stefan Taunere34e3e82013-01-01 00:06:51 +0000191To update only the images named
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000192.BR "normal " "and " "fallback" ", run:"
Uwe Hermann87c07932009-05-05 16:15:46 +0000193.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000194.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000195.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000196Overlapping sections are not supported.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000197.TP
Nico Huber305f4172013-06-14 11:55:26 +0200198.B "\-\-ifd"
199Read ROM layout from Intel Firmware Descriptor.
200.sp
201flashrom supports ROM layouts given by an Intel Firmware Descriptor
202(IFD). The on-chip descriptor will be read and used to generate the
203layout. If you need to change the layout, you have to update the IFD
204only first.
205.sp
206The following ROM images may be present in an IFD:
207.sp
208 fd the IFD itself
209 bios the host firmware aka. BIOS
210 me Intel Management Engine firmware
211 gbe gigabit ethernet firmware
212 pd platform specific data
213.TP
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000214.B "\-i, \-\-image <imagename>"
215Only flash region/image
216.B <imagename>
Uwe Hermann67808fe2007-10-18 00:29:05 +0000217from flash layout.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000218.TP
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000219.B "\-L, \-\-list\-supported"
Uwe Hermann941a2732011-07-25 21:12:57 +0000220List the flash chips, chipsets, mainboards, and external programmers
221(including PCI, USB, parallel port, and serial port based devices)
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000222supported by flashrom.
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000223.sp
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000224There are many unlisted boards which will work out of the box, without
225special support in flashrom. Please let us know if you can verify that
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000226other boards work or do not work out of the box.
227.sp
228.B IMPORTANT:
229For verification you have
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000230to test an ERASE and/or WRITE operation, so make sure you only do that
231if you have proper means to recover from failure!
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000232.TP
Uwe Hermann20a293f2009-06-19 10:42:43 +0000233.B "\-z, \-\-list\-supported-wiki"
234Same as
235.BR \-\-list\-supported ,
236but outputs the supported hardware in MediaWiki syntax, so that it can be
Stefan Tauner4c723152016-01-14 22:47:55 +0000237easily pasted into the
238.URLB https://flashrom.org/Supported_hardware "supported hardware wiki page" .
Uwe Hermann941a2732011-07-25 21:12:57 +0000239Please note that MediaWiki output is not compiled in by default.
Uwe Hermann20a293f2009-06-19 10:42:43 +0000240.TP
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000241.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000242Specify the programmer device. This is mandatory for all operations
243involving any chip access (probe/read/write/...). Currently supported are:
Carl-Daniel Hailfingerce986772009-05-09 00:27:07 +0000244.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000245.BR "* internal" " (for in-system flashing in the mainboard)"
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000246.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000247.BR "* dummy" " (virtual programmer for testing flashrom)"
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000248.sp
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000249.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
250.sp
Sergey Lichack98f47102012-08-27 01:24:15 +0000251.BR "* nicrealtek" " (for flash ROMs on Realtek and SMC 1211 network cards)"
Uwe Hermann829ed842010-05-24 17:39:14 +0000252.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000253.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
254cards)"
255.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000256.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000257.sp
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000258.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
259.sp
TURBO Jb0912c02009-09-02 23:00:46 +0000260.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
261.sp
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000262.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
263.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000264.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
265.sp
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000266.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
267.sp
Stefan Tauner4f094752014-06-01 22:36:30 +0000268.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)"
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000269.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000270.BR "* atapromise" " (for flash ROMs on Promise PDC2026x ATA/RAID controllers)"
271.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000272.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)"
273.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000274.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer).
Paul Fox05dfbe62009-06-16 21:08:06 +0000275.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000276.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog, \
Stefan Tauner0be072c2016-03-13 15:16:30 +0000277including some Arduino-based devices)."
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000278.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000279.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000280.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000281.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
282.sp
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000283.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000284.sp
Michael Karchere5449392012-05-05 20:53:59 +0000285.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
286bitbanging adapter)
287.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000288.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
Idwer Vollering004f4b72010-09-03 18:21:21 +0000289.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000290.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
Mark Marshall90021f22010-12-03 14:48:11 +0000291.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000292.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
293.sp
James Lairdc60de0e2013-03-27 13:00:23 +0000294.BR "* usbblaster_spi" " (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)"
295.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000296.BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)"
297.sp
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000298.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)"
299.sp
Justin Chevrier66e554b2015-02-08 21:58:10 +0000300.BR "* pickit2_spi" " (for SPI flash ROMs accessible via Microchip PICkit2)"
301.sp
Urja Rannikko0870b022016-01-31 22:10:29 +0000302.BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)"
303.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000304Some programmers have optional or mandatory parameters which are described
305in detail in the
Stefan Tauner6697f712014-08-06 15:09:15 +0000306.B PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000307section. Support for some programmers can be disabled at compile time.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000308.B "flashrom \-h"
Michael Karchere5eafb22010-03-07 12:11:08 +0000309lists all supported programmers.
310.TP
311.B "\-h, \-\-help"
312Show a help text and exit.
313.TP
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000314.B "\-o, \-\-output <logfile>"
315Save the full debug log to
316.BR <logfile> .
317If the file already exists, it will be overwritten. This is the recommended
318way to gather logs from flashrom because they will be verbose even if the
Stefan Tauner6697f712014-08-06 15:09:15 +0000319on-screen messages are not verbose and don't require output redirection.
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000320.TP
Michael Karchere5eafb22010-03-07 12:11:08 +0000321.B "\-R, \-\-version"
322Show version information and exit.
Stefan Tauner6697f712014-08-06 15:09:15 +0000323.SH PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000324Some programmer drivers accept further parameters to set programmer-specific
Uwe Hermann4e3d0b32010-03-25 23:18:41 +0000325parameters. These parameters are separated from the programmer name by a
Michael Karchere5eafb22010-03-07 12:11:08 +0000326colon. While some programmers take arguments at fixed positions, other
327programmers use a key/value interface in which the key and value is separated
328by an equal sign and different pairs are separated by a comma or a colon.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000329.SS
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000330.BR "internal " programmer
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000331.TP
332.B Board Enables
333.sp
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000334Some mainboards require to run mainboard specific code to enable flash erase
335and write support (and probe support on old systems with parallel flash).
336The mainboard brand and model (if it requires specific code) is usually
337autodetected using one of the following mechanisms: If your system is
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000338running coreboot, the mainboard type is determined from the coreboot table.
339Otherwise, the mainboard is detected by examining the onboard PCI devices
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000340and possibly DMI info. If PCI and DMI do not contain information to uniquely
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000341identify the mainboard (which is the exception), or if you want to override
342the detected mainboard model, you can specify the mainboard using the
343.sp
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000344.B " flashrom \-p internal:mainboard=<vendor>:<board>"
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000345syntax.
346.sp
347See the 'Known boards' or 'Known laptops' section in the output
348of 'flashrom \-L' for a list of boards which require the specification of
349the board name, if no coreboot table is found.
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000350.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000351Some of these board-specific flash enabling functions (called
352.BR "board enables" )
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000353in flashrom have not yet been tested. If your mainboard is detected needing
354an untested board enable function, a warning message is printed and the
355board enable is not executed, because a wrong board enable function might
356cause the system to behave erratically, as board enable functions touch the
357low-level internals of a mainboard. Not executing a board enable function
358(if one is needed) might cause detection or erasing failure. If your board
359protects only part of the flash (commonly the top end, called boot block),
360flashrom might encounter an error only after erasing the unprotected part,
361so running without the board-enable function might be dangerous for erase
362and write (which includes erase).
363.sp
364The suggested procedure for a mainboard with untested board specific code is
365to first try to probe the ROM (just invoke flashrom and check that it
366detects your flash chip type) without running the board enable code (i.e.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000367without any parameters). If it finds your chip, fine. Otherwise, retry
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000368probing your chip with the board-enable code running, using
369.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000370.B " flashrom \-p internal:boardenable=force"
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000371.sp
372If your chip is still not detected, the board enable code seems to be broken
373or the flash chip unsupported. Otherwise, make a backup of your current ROM
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000374contents (using
375.BR \-r )
376and store it to a medium outside of your computer, like
377a USB drive or a network share. If you needed to run the board enable code
Stefan Taunereb582572012-09-21 12:52:50 +0000378already for probing, use it for reading too.
379If reading succeeds and the contens of the read file look legit you can try to write the new image.
380You should enable the board enable code in any case now, as it
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000381has been written because it is known that writing/erasing without the board
382enable is going to fail. In any case (success or failure), please report to
383the flashrom mailing list, see below.
384.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000385.TP
386.B Coreboot
387.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000388On systems running coreboot, flashrom checks whether the desired image matches
389your mainboard. This needs some special board ID to be present in the image.
390If flashrom detects that the image you want to write and the current board
391do not match, it will refuse to write the image unless you specify
392.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000393.B " flashrom \-p internal:boardmismatch=force"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000394.TP
395.B ITE IT87 Super I/O
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000396.sp
Vadim Girlin4dd0f902013-08-24 12:18:17 +0000397If your mainboard is manufactured by GIGABYTE and supports DualBIOS it is very likely that it uses an
398ITE IT87 series Super I/O to switch between the two flash chips. Only one of them can be accessed at a time
399and you can manually select which one to use with the
400.sp
401.B " flashrom \-p internal:dualbiosindex=chip"
402.sp
403syntax where
404.B chip
405is the index of the chip to use (0 = main, 1 = backup). You can check which one is currently selected by
406leaving out the
407.B chip
408parameter.
409.sp
Carl-Daniel Hailfinger01f3ef42010-03-25 02:50:40 +0000410If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000411translation, flashrom should autodetect that configuration. If you want to
412set the I/O base port of the IT87 series SPI controller manually instead of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000413using the value provided by the BIOS, use the
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000414.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000415.B " flashrom \-p internal:it87spiport=portnum"
416.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000417syntax where
418.B portnum
419is the I/O port number (must be a multiple of 8). In the unlikely case
420flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
421report so we can diagnose the problem.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000422.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000423.TP
Rudolf Marek70e14592013-07-25 22:58:56 +0000424.B AMD chipsets
425.sp
426Beginning with the SB700 chipset there is an integrated microcontroller (IMC) based on the 8051 embedded in
427every AMD southbridge. Its firmware resides in the same flash chip as the host's which makes writing to the
428flash risky if the IMC is active. Flashrom tries to temporarily disable the IMC but even then changing the
429contents of the flash can have unwanted effects: when the IMC continues (at the latest after a reboot) it will
430continue executing code from the flash. If the code was removed or changed in an unfortunate way it is
431unpredictable what the IMC will do. Therefore, if flashrom detects an active IMC it will disable write support
432unless the user forces it with the
433.sp
434.B " flashrom \-p internal:amd_imc_force=yes"
435.sp
436syntax. The user is responsible for supplying a suitable image or leaving out the IMC region with the help of
437a layout file. This limitation might be removed in the future when we understand the details better and have
438received enough feedback from users. Please report the outcome if you had to use this option to write a chip.
439.sp
Stefan Tauner21071b02014-05-16 21:39:48 +0000440An optional
441.B spispeed
442parameter specifies the frequency of the SPI bus where applicable (i.e.\& SB600 or later with an SPI flash chip
443directly attached to the chipset).
444Syntax is
445.sp
446.B " flashrom \-p internal:spispeed=frequency"
447.sp
448where
449.B frequency
450can be
451.BR "'16.5\ MHz'" ", " "'22\ MHz'" ", " "'33\ MHz'" ", " "'66\ MHz'" ", " "'100\ MHZ'" ", or " "'800\ kHz'" "."
452Support of individual frequencies depends on the generation of the chipset:
453.sp
454* SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
455.sp
456* SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
457.sp
458* Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them
459.sp
460The default is to use 16.5 MHz and disable Fast Reads.
Rudolf Marek70e14592013-07-25 22:58:56 +0000461.TP
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000462.B Intel chipsets
463.sp
Stefan Tauner50e7c602011-11-08 10:55:54 +0000464If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
Stefan Taunereb582572012-09-21 12:52:50 +0000465attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the
Stefan Tauner50e7c602011-11-08 10:55:54 +0000466chipset provides an alternative way to access the flash chip(s) named
467.BR "Hardware Sequencing" .
468It is much simpler than the normal access method (called
469.BR "Software Sequencing" "),"
470but does not allow the software to choose the SPI commands to be sent.
471You can use the
472.sp
473.B " flashrom \-p internal:ich_spi_mode=value"
474.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000475syntax where
476.BR "value " "can be"
Stefan Tauner50e7c602011-11-08 10:55:54 +0000477.BR auto ", " swseq " or " hwseq .
478By default
479.RB "(or when setting " ich_spi_mode=auto )
Stefan Taunereb582572012-09-21 12:52:50 +0000480the module tries to use swseq and only activates hwseq if need be (e.g.\& if
Stefan Tauner50e7c602011-11-08 10:55:54 +0000481important opcodes are inaccessible due to lockdown; or if more than one flash
482chip is attached). The other options (swseq, hwseq) select the respective mode
483(if possible).
484.sp
Stefan Tauner5210e722012-02-16 01:13:00 +0000485ICH8 and later southbridges may also have locked address ranges of different
486kinds if a valid descriptor was written to it. The flash address space is then
487partitioned in multiple so called "Flash Regions" containing the host firmware,
488the ME firmware and so on respectively. The flash descriptor can also specify up
489to 5 so called "Protected Regions", which are freely chosen address ranges
490independent from the aforementioned "Flash Regions". All of them can be write
491and/or read protected individually. If flashrom detects such a lock it will
492disable write support unless the user forces it with the
493.sp
494.B " flashrom \-p internal:ich_spi_force=yes"
495.sp
496syntax. If this leads to erase or write accesses to the flash it would most
497probably bring it into an inconsistent and unbootable state and we will not
498provide any support in such a case.
499.sp
Kyösti Mälkki88ee0402013-09-14 23:37:01 +0000500If you have an Intel chipset with an ICH2 or later southbridge and if you want
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000501to set specific IDSEL values for a non-default flash chip or an embedded
502controller (EC), you can use the
503.sp
504.B " flashrom \-p internal:fwh_idsel=value"
505.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000506syntax where
507.B value
508is the 48-bit hexadecimal raw value to be written in the
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000509IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
510each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
511use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
512The rightmost hex digit corresponds with the lowest address range. All address
513ranges have a corresponding sister range 4 MB below with identical IDSEL
514settings. The default value for ICH7 is given in the example below.
515.sp
516Example:
517.B "flashrom \-p internal:fwh_idsel=0x001122334567"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000518.TP
519.B Laptops
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000520.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000521Using flashrom on laptops is dangerous and may easily make your hardware
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000522unusable (see also the
523.B BUGS
524section). The embedded controller (EC) in these
525machines often interacts badly with flashing.
Stefan Tauner4c723152016-01-14 22:47:55 +0000526More information is
527.URLB https://flashrom.org/Laptops "in the wiki" .
528For example the EC firmware sometimes resides on the same
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000529flash chip as the host firmware. While flashrom tries to change the contents of
530that memory the EC might need to fetch new instructions or data from it and
531could stop working correctly. Probing for and reading from the chip may also
532irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
533other nasty effects. flashrom will attempt to detect if it is running on a
534laptop and abort immediately for safety reasons if it clearly identifies the
535host computer as one. If you want to proceed anyway at your own risk, use
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000536.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000537.B " flashrom \-p internal:laptop=force_I_want_a_brick"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000538.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000539We will not help you if you force flashing on a laptop because this is a really
540dumb idea.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000541.sp
542You have been warned.
543.sp
544Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
545laptops. Some vendors did not implement those bits correctly or set them to
546generic and/or dummy values. flashrom will then issue a warning and bail out
547like above. In this case you can use
548.sp
549.B " flashrom \-p internal:laptop=this_is_not_a_laptop"
550.sp
Stefan Tauner6697f712014-08-06 15:09:15 +0000551to tell flashrom (at your own risk) that it is not running on a laptop.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000552.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000553.BR "dummy " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000554.IP
555The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various
556aspects of flashrom and is mainly used in development and while debugging.
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000557It is able to emulate some chips to a certain degree (basic
558identify/read/erase/write operations work).
559.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000560An optional parameter specifies the bus types it
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000561should support. For that you have to use the
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000562.sp
563.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
564.sp
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000565syntax where
566.B type
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000567can be
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000568.BR parallel ", " lpc ", " fwh ", " spi
569in any order. If you specify bus without type, all buses will be disabled.
570If you do not specify bus, all buses will be enabled.
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000571.sp
572Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000573.B "flashrom \-p dummy:bus=lpc+fwh"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000574.sp
575The dummy programmer supports flash chip emulation for automated self-tests
576without hardware access. If you want to emulate a flash chip, use the
577.sp
578.B " flashrom \-p dummy:emulate=chip"
579.sp
580syntax where
581.B chip
582is one of the following chips (please specify only the chip name, not the
583vendor):
584.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000585.RB "* ST " M25P10.RES " SPI flash chip (128 kB, RES, page write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000586.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000587.RB "* SST " SST25VF040.REMS " SPI flash chip (512 kB, REMS, byte write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000588.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000589.RB "* SST " SST25VF032B " SPI flash chip (4096 kB, RDID, AAI write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000590.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000591.RB "* Macronix " MX25L6436 " SPI flash chip (8192 kB, RDID, SFDP)"
Stefan Tauner0b9df972012-05-07 22:12:16 +0000592.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000593Example:
594.B "flashrom -p dummy:emulate=SST25VF040.REMS"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000595.TP
596.B Persistent images
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000597.sp
598If you use flash chip emulation, flash image persistence is available as well
599by using the
600.sp
601.B " flashrom \-p dummy:emulate=chip,image=image.rom"
602.sp
603syntax where
604.B image.rom
605is the file where the simulated chip contents are read on flashrom startup and
606where the chip contents on flashrom shutdown are written to.
607.sp
608Example:
609.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000610.TP
611.B SPI write chunk size
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000612.sp
613If you use SPI flash chip emulation for a chip which supports SPI page write
614with the default opcode, you can set the maximum allowed write chunk size with
615the
616.sp
617.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
618.sp
619syntax where
620.B size
Stefan Taunereb582572012-09-21 12:52:50 +0000621is the number of bytes (min.\& 1, max.\& 256).
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000622.sp
623Example:
624.sp
625.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000626.TP
627.B SPI blacklist
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000628.sp
629To simulate a programmer which refuses to send certain SPI commands to the
630flash chip, you can specify a blacklist of SPI commands with the
631.sp
632.B " flashrom -p dummy:spi_blacklist=commandlist"
633.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000634syntax where
635.B commandlist
636is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000637SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000638controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
639commandlist may be up to 512 characters (256 commands) long.
640Implementation note: flashrom will detect an error during command execution.
641.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000642.TP
643.B SPI ignorelist
644.sp
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000645To simulate a flash chip which ignores (doesn't support) certain SPI commands,
646you can specify an ignorelist of SPI commands with the
647.sp
648.B " flashrom -p dummy:spi_ignorelist=commandlist"
649.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000650syntax where
651.B commandlist
652is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000653SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000654command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
655characters (256 commands) long.
656Implementation note: flashrom won't detect an error during command execution.
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000657.sp
658.TP
659.B SPI status register
660.sp
661You can specify the initial content of the chip's status register with the
662.sp
663.B " flashrom -p dummy:spi_status=content"
664.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000665syntax where
666.B content
667is an 8-bit hexadecimal value.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000668.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000669.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000670, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000671, " satamv" , " atahpt", " atavia ", " atapromise " and " it8212 " programmers
Stefan Tauner4c723152016-01-14 22:47:55 +0000672.IP
Michael Karchere5eafb22010-03-07 12:11:08 +0000673These programmers have an option to specify the PCI address of the card
674your want to use, which must be specified if more than one card supported
675by the selected programmer is installed in your system. The syntax is
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000676.sp
677.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
678.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000679where
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000680.B xxxx
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000681is the name of the programmer,
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000682.B bb
683is the PCI bus number,
684.B dd
685is the PCI device number, and
686.B f
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000687is the PCI function number of the desired device.
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000688.sp
689Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000690.B "flashrom \-p nic3com:pci=05:04.0"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000691.SS
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000692.BR "atavia " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000693.IP
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000694Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the
695.sp
696.B " flashrom \-p atavia:offset=addr"
697.sp
698syntax where
699.B addr
700will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal).
701For more information please see
Stefan Tauner4c723152016-01-14 22:47:55 +0000702.URLB https://flashrom.org/VT6421A "its wiki page" .
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000703.SS
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000704.BR "atapromise " programmer
705.IP
706This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip. This stems
707from the fact that, on the tested device (a Promise Ultra100), not all of the chip's address lines were
708actually connected. You may use this programmer to flash firmware updates, since these are only 16 kB in
709size (padding to 32 kB is required).
710.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000711.BR "nicintel_eeprom " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000712.IP
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000713This is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs
714mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEPROMs normally do not announce their
Stefan Tauner0be072c2016-03-13 15:16:30 +0000715size nor allow themselves to be identified, the controller relies on correct size values written to predefined
716addresses within the chip. Flashrom follows this scheme but assumes the minimum size of 16 kB (128 kb) if an
717unprogrammed EEPROM/card is detected. Intel specifies following EEPROMs to be compatible:
718Atmel AT25128, AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128.
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000719.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000720.BR "ft2232_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000721.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000722This module supports various programmers based on FTDI FT2232/FT4232H/FT232H chips including the DLP Design
723DLP-USB1232H, openbiosprog-spi, Amontec JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster,
724Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, OpenMoko Neo1973 Debug board (V2+), TIAO/DIYGADGET USB
725Multi-Protocol Adapter (TUMPA), TUMPA Lite, GOEPEL PicoTAP and Google Servo v1/v2.
726.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000727An optional parameter specifies the controller
Stefan Taunerfbc71ac2012-09-26 00:46:02 +0000728type and channel/interface/port it should support. For that you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000729.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000730.B " flashrom \-p ft2232_spi:type=model,port=interface"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000731.sp
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000732syntax where
733.B model
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000734can be
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +0000735.BR 2232H ", " 4232H ", " 232H ", " jtagkey ", " busblaster ", " openmoko ", " \
Uwe Hermann836b26a2011-10-14 20:33:14 +0000736arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
Todd Broch6800c952016-02-14 15:46:00 +0000737", " tumpa ", " tumpalite ", " picotap ", " google-servo ", " google-servo-v2 \
738" or " google-servo-v2-legacy
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000739and
740.B interface
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000741can be
Stefan Taunerfbc71ac2012-09-26 00:46:02 +0000742.BR A ", " B ", " C ", or " D .
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000743The default model is
744.B 4232H
745and the default interface is
Stefan Taunerfbc71ac2012-09-26 00:46:02 +0000746.BR A .
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000747.sp
Shik Chen14fbc4b2012-09-17 00:40:54 +0000748If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by
749specifying its serial number with the
750.sp
751.B " flashrom \-p ft2232_spi:serial=number"
752.sp
753syntax where
754.B number
755is the serial number of the device (which can be found for example in the output of lsusb -v).
756.sp
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000757All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The
Stefan Tauner0554ca52013-07-25 22:54:25 +0000758expressible divisors are all
759.B even
760numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of
Samir Ibradžićb482c6d2012-05-15 22:58:19 +00007616 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by
762specifying the optional
763.B divisor
764parameter with the
765.sp
766.B " flashrom \-p ft2232_spi:divisor=div"
767.sp
768syntax.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000769.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000770.BR "serprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000771.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000772This module supports all programmers speaking the serprog protocol. This includes some Arduino-based devices
773as well as various programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi Zhang and many others.
774.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000775A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for
776communicating with the programmer.
777The device/baud combination has to start with
778.B dev=
779and separate the optional baud rate with a colon.
780For example
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000781.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000782.B " flashrom \-p serprog:dev=/dev/ttyS0:115200"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000783.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000784If no baud rate is given the default values by the operating system/hardware will be used.
785For IP connections you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000786.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000787.B " flashrom \-p serprog:ip=ipaddr:port"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000788.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000789syntax.
790In case the device supports it, you can set the SPI clock frequency with the optional
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000791.B spispeed
Stefan Tauner0554ca52013-07-25 22:54:25 +0000792parameter. The frequency is parsed as hertz, unless an
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000793.BR M ", or " k
794suffix is given, then megahertz or kilohertz are used respectively.
795Example that sets the frequency to 2 MHz:
796.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +0000797.B " flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M"
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000798.sp
799More information about serprog is available in
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000800.B serprog-protocol.txt
801in the source distribution.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000802.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000803.BR "buspirate_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000804.IP
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000805A required
806.B dev
807parameter specifies the Bus Pirate device node and an optional
808.B spispeed
809parameter specifies the frequency of the SPI bus. The parameter
Michael Karchere5eafb22010-03-07 12:11:08 +0000810delimiter is a comma. Syntax is
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000811.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000812.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
Michael Karchere5eafb22010-03-07 12:11:08 +0000813.sp
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000814where
815.B frequency
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000816can be
817.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
Michael Karchere5eafb22010-03-07 12:11:08 +0000818(in Hz). The default is the maximum frequency of 8 MHz.
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000819.sp
820An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be
821needed if you are working with a flash ROM chip that you have physically removed from the board. Syntax is
822.sp
823.B " flashrom -p buspirate_spi:pullups=state"
824.sp
825where
826.B state
827can be
828.BR on " or " off .
Stefan Tauner4c723152016-01-14 22:47:55 +0000829More information about the Bus Pirate pull-up resistors and their purpose is available
830.URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistors" \
831"in a guide by dangerousprototypes" .
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000832Only the external supply voltage (Vpu) is supported as of this writing.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000833.SS
Justin Chevrier66e554b2015-02-08 21:58:10 +0000834.BR "pickit2_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000835.IP
Justin Chevrier66e554b2015-02-08 21:58:10 +0000836An optional
837.B voltage
838parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified.
839You can use
840.BR mV ", " millivolt ", " V " or " Volt
841as unit specifier. Syntax is
842.sp
843.B " flashrom \-p pickit2_spi:voltage=value"
844.sp
845where
846.B value
847can be
848.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
849or the equivalent in mV.
850.sp
851An optional
852.B spispeed
853parameter specifies the frequency of the SPI bus. Syntax is
854.sp
855.B " flashrom \-p pickit2_spi:spispeed=frequency"
856.sp
857where
858.B frequency
859can be
860.BR 250k ", " 333k ", " 500k " or " 1M "
861(in Hz). The default is a frequency of 1 MHz.
862.SS
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000863.BR "dediprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000864.IP
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000865An optional
866.B voltage
867parameter specifies the voltage the Dediprog should use. The default unit is
868Volt if no unit is specified. You can use
869.BR mV ", " milliVolt ", " V " or " Volt
870as unit specifier. Syntax is
871.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000872.B " flashrom \-p dediprog:voltage=value"
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000873.sp
874where
875.B value
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000876can be
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000877.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
878or the equivalent in mV.
Nathan Laredo21541a62012-12-24 22:07:36 +0000879.sp
880An optional
881.B device
882parameter specifies which of multiple connected Dediprog devices should be used.
883Please be aware that the order depends on libusb's usb_get_busses() function and that the numbering starts
884at 0.
885Usage example to select the second device:
886.sp
887.B " flashrom \-p dediprog:device=1"
Nico Huber77fa67d2013-02-20 18:03:36 +0000888.sp
889An optional
890.B spispeed
Patrick Georgiefe2d432013-05-23 21:47:46 +0000891parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer.
892Syntax is
Nico Huber77fa67d2013-02-20 18:03:36 +0000893.sp
894.B " flashrom \-p dediprog:spispeed=frequency"
895.sp
896where
897.B frequency
898can be
899.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M
900(in Hz). The default is a frequency of 12 MHz.
Stefan Taunere659d2d2013-05-03 21:58:28 +0000901.sp
902An optional
903.B target
904parameter specifies which target chip should be used. Syntax is
905.sp
906.B " flashrom \-p dediprog:target=value"
907.sp
908where
909.B value
910can be
911.BR 1 " or " 2
Stefan Tauner6697f712014-08-06 15:09:15 +0000912to select target chip 1 or 2 respectively. The default is target chip 1.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000913.SS
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000914.BR "rayer_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000915.IP
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000916The default I/O base address used for the parallel port is 0x378 and you can use
917the optional
918.B iobase
919parameter to specify an alternate base I/O address with the
920.sp
921.B " flashrom \-p rayer_spi:iobase=baseaddr"
922.sp
923syntax where
924.B baseaddr
925is base I/O port address of the parallel port, which must be a multiple of
926four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
927.sp
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000928The default cable type is the RayeR cable. You can use the optional
929.B type
930parameter to specify the cable type with the
931.sp
932.B " flashrom \-p rayer_spi:type=model"
933.sp
934syntax where
935.B model
936can be
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000937.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \
Stefan Taunerfdb16592016-02-28 17:04:38 +0000938STK200/300, " wiggler " for the Macraigor Wiggler, " xilinx " for the Xilinx Parallel Cable III (DLC 5), or" \
939" spi_tt" " for SPI Tiny Tools-compatible hardware.
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000940.sp
941More information about the RayeR hardware is available at
Stefan Tauner23e10b82016-01-23 16:16:49 +0000942.nh
Stefan Tauner4c723152016-01-14 22:47:55 +0000943.URLB "http://rayer.g6.cz/elektro/spipgm.htm" "RayeR's website" .
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000944The Altera ByteBlasterMV datasheet can be obtained from
Stefan Tauner4c723152016-01-14 22:47:55 +0000945.URLB "http://www.altera.co.jp/literature/ds/dsbytemv.pdf" Altera .
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000946For more information about the Macraigor Wiggler see
Stefan Tauner4c723152016-01-14 22:47:55 +0000947.URLB "http://www.macraigor.com/wiggler.htm" "their company homepage" .
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000948The schematic of the Xilinx DLC 5 was published in
Stefan Tauner4c723152016-01-14 22:47:55 +0000949.URLB "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf" "a Xilinx user guide" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000950.SS
Michael Karchere5449392012-05-05 20:53:59 +0000951.BR "pony_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000952.IP
Michael Karchere5449392012-05-05 20:53:59 +0000953The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
954specified using the mandatory
Stefan Taunere34e3e82013-01-01 00:06:51 +0000955.B dev
Michael Karchere5449392012-05-05 20:53:59 +0000956parameter. The adapter type is selectable between SI-Prog (used for
957SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer
958named "serbang". The optional
Stefan Taunere34e3e82013-01-01 00:06:51 +0000959.B type
Michael Karchere5449392012-05-05 20:53:59 +0000960parameter accepts the values "si_prog" (default) or "serbang".
961.sp
962Information about the SI-Prog adapter can be found at
Stefan Tauner4c723152016-01-14 22:47:55 +0000963.URLB "http://www.lancos.com/siprogsch.html" "its website" .
Michael Karchere5449392012-05-05 20:53:59 +0000964.sp
965An example call to flashrom is
966.sp
967.B " flashrom \-p pony_spi:dev=/dev/ttyS0,type=serbang"
968.sp
969Please note that while USB-to-serial adapters work under certain circumstances,
970this slows down operation considerably.
971.SS
Mark Marshall90021f22010-12-03 14:48:11 +0000972.BR "ogp_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000973.IP
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000974The flash ROM chip to access must be specified with the
Mark Marshall90021f22010-12-03 14:48:11 +0000975.B rom
976parameter.
977.sp
978.B " flashrom \-p ogp_spi:rom=name"
979.sp
980Where
981.B name
982is either
983.B cprom
984or
985.B s3
Stefan Taunere34e3e82013-01-01 00:06:51 +0000986for the configuration ROM and
Mark Marshall90021f22010-12-03 14:48:11 +0000987.B bprom
988or
989.B bios
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000990for the BIOS ROM. If more than one card supported by the ogp_spi programmer
Mark Marshall90021f22010-12-03 14:48:11 +0000991is installed in your system, you have to specify the PCI address of the card
992you want to use with the
993.B pci=
994parameter as explained in the
Stefan Taunere34e3e82013-01-01 00:06:51 +0000995.B nic3com et al.\&
Mark Marshall90021f22010-12-03 14:48:11 +0000996section above.
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000997.SS
998.BR "linux_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000999.IP
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001000You have to specify the SPI controller to use with the
1001.sp
1002.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y"
1003.sp
1004syntax where
1005.B /dev/spidevX.Y
1006is the Linux device node for your SPI controller.
1007.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +00001008In case the device supports it, you can set the SPI clock frequency with the optional
1009.B spispeed
1010parameter. The frequency is parsed as kilohertz.
1011Example that sets the frequency to 8 MHz:
1012.sp
1013.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000"
1014.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001015Please note that the linux_spi driver only works on Linux.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001016.SS
1017.BR "mstarddc_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001018.IP
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001019The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging
Stefan Tauner0be072c2016-03-13 15:16:30 +00001020information between a computer and attached displays. Its most common uses are getting display capabilities
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001021through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address
10220x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to
1023the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49.
1024This flashrom module allows the latter via Linux's I2C driver.
1025.sp
1026.B IMPORTANT:
1027Before using this programmer, the display
1028.B MUST
1029be in standby mode, and only connected to the computer that will run flashrom using a VGA cable, to an
1030inactive VGA output. It absolutely
1031.B MUST NOT
1032be used as a display during the procedure!
1033.sp
1034You have to specify the DDC/I2C controller and I2C address to use with the
1035.sp
1036.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-X:YY"
1037.sp
1038syntax where
1039.B /dev/i2c-X
1040is the Linux device node for your I2C controller connected to the display's DDC channel, and
1041.B YY
1042is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used).
1043Example that uses I2C controller /dev/i2c-1 and address 0x49:
1044.sp
1045.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49
1046.sp
1047It is also possible to inhibit the reset command that is normally sent to the display once the flashrom
1048operation is completed using the optional
1049.B noreset
1050parameter. A value of 1 prevents flashrom from sending the reset command.
1051Example that does not reset the display at the end of the operation:
1052.sp
1053.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
1054.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +00001055Please note that sending the reset command is also inhibited if an error occurred during the operation.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001056To send the reset command afterwards, you can simply run flashrom once more, in chip probe mode (not specifying
1057an operation), without the
1058.B noreset
1059parameter, once the flash read/write operation you intended to perform has completed successfully.
1060.sp
1061Please also note that the mstarddc_spi driver only works on Linux.
Urja Rannikko0870b022016-01-31 22:10:29 +00001062.SS
1063.BR "ch341a_spi " programmer
1064The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is
1065used as per the device.
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +00001066.SH EXAMPLES
1067To back up and update your BIOS, run
1068.sp
1069.B flashrom -p internal -r backup.rom -o backuplog.txt
1070.br
1071.B flashrom -p internal -w newbios.rom -o writelog.txt
1072.sp
1073Please make sure to copy backup.rom to some external media before you try
1074to write. That makes offline recovery easier.
1075.br
1076If writing fails and flashrom complains about the chip being in an unknown
1077state, you can try to restore the backup by running
1078.sp
1079.B flashrom -p internal -w backup.rom -o restorelog.txt
1080.sp
1081If you encounter any problems, please contact us and supply
1082backuplog.txt, writelog.txt and restorelog.txt. See section
1083.B BUGS
1084for contact info.
Peter Stuge42688e52009-01-26 02:20:56 +00001085.SH EXIT STATUS
Niklas Söderlund2d8b7ef2013-09-13 19:19:25 +00001086flashrom exits with 0 on success, 1 on most failures but with 3 if a call to mmap() fails.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001087.SH REQUIREMENTS
1088flashrom needs different access permissions for different programmers.
1089.sp
1090.B internal
1091needs raw memory access, PCI configuration space access, raw I/O port
1092access (x86) and MSR access (x86).
1093.sp
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +00001094.B atavia
1095needs PCI configuration space access.
1096.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001097.BR nic3com ", " nicrealtek " and " nicnatsemi "
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001098need PCI configuration space read access and raw I/O port access.
1099.sp
1100.B atahpt
1101needs PCI configuration space access and raw I/O port access.
1102.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001103.BR gfxnvidia ", " drkaiser " and " it8212
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001104need PCI configuration space access and raw memory access.
1105.sp
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001106.B rayer_spi
1107needs raw I/O port access.
1108.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +00001109.BR satasii ", " nicintel ", " nicintel_eeprom " and " nicintel_spi
1110need PCI configuration space read access and raw memory access.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001111.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001112.BR satamv " and " atapromise
1113need PCI configuration space read access, raw I/O port access and raw memory
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +00001114access.
1115.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001116.B serprog
1117needs TCP access to the network or userspace access to a serial port.
1118.sp
1119.B buspirate_spi
1120needs userspace access to a serial port.
1121.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001122.BR ft2232_spi ", " usbblaster_spi " and " pickit2_spi
Stefan Taunere49edbb82016-01-31 22:10:14 +00001123need access to the respective USB device via libusb API version 0.1.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001124.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001125.BR ch341a_spi " and " dediprog
1126need access to the respective USB device via libusb API version 1.0.
Urja Rannikko0870b022016-01-31 22:10:29 +00001127.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001128.B dummy
1129needs no access permissions at all.
1130.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001131.BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", "
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001132.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001133have to be run as superuser/root, and need additional raw access permission.
1134.sp
Urja Rannikko0870b022016-01-31 22:10:29 +00001135.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi " and " \
1136ch341a_spi
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001137can be run as normal user on most operating systems if appropriate device
1138permissions are set.
1139.sp
Mark Marshall90021f22010-12-03 14:48:11 +00001140.B ogp
1141needs PCI configuration space read access and raw memory access.
1142.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001143On OpenBSD, you can obtain raw access permission by setting
Uwe Hermann941a2732011-07-25 21:12:57 +00001144.B "securelevel=-1"
1145in
1146.B "/etc/rc.securelevel"
1147and rebooting, or rebooting into single user mode.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001148.SH BUGS
Stefan Tauner4c723152016-01-14 22:47:55 +00001149Please report any bugs to the
1150.MTOB "flashrom@flashrom.org" "flashrom mailing list" .
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001151.sp
1152We recommend to subscribe first at
Stefan Tauner4c723152016-01-14 22:47:55 +00001153.URLB "https://flashrom.org/mailman/listinfo/flashrom" "" .
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +00001154.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001155Many of the developers communicate via the
1156.B "#flashrom"
1157IRC channel on
1158.BR chat.freenode.net .
Stefan Tauner4c723152016-01-14 22:47:55 +00001159If you don't have an IRC client, you can use the
1160.URLB http://webchat.freenode.net/?channels=flashrom "freenode webchat" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001161You are welcome to join and ask questions, send us bug and success reports there
Stefan Taunereb582572012-09-21 12:52:50 +00001162too. Please provide a way to contact you later (e.g.\& a mail address) and be
Stefan Tauner4c723152016-01-14 22:47:55 +00001163patient if there is no immediate reaction. Also, we provide a
1164.URLB https://paste.flashrom.org "pastebin service"
Stefan Taunereb582572012-09-21 12:52:50 +00001165that is very useful when you want to share logs etc.\& without spamming the
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001166channel.
1167.SS
1168.B Laptops
1169.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +00001170Using flashrom on laptops is dangerous and may easily make your hardware
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001171unusable. flashrom will attempt to detect if it is running on a laptop and abort
1172immediately for safety reasons. Please see the detailed discussion of this topic
1173and associated flashrom options in the
1174.B Laptops
1175paragraph in the
1176.B internal programmer
1177subsection of the
Stefan Tauner6697f712014-08-06 15:09:15 +00001178.B PROGRAMMER-SPECIFIC INFORMATION
Stefan Tauner4c723152016-01-14 22:47:55 +00001179section and the information
1180.URLB "https://flashrom.org/Laptops" "in our wiki" .
Daniel Lenski65922a32012-02-15 23:40:23 +00001181.SS
1182One-time programmable (OTP) memory and unique IDs
1183.sp
1184Some flash chips contain OTP memory often denoted as "security registers".
1185They usually have a capacity in the range of some bytes to a few hundred
Stefan Taunereb582572012-09-21 12:52:50 +00001186bytes and can be used to give devices unique IDs etc. flashrom is not able
Daniel Lenski65922a32012-02-15 23:40:23 +00001187to read or write these memories and may therefore not be able to duplicate a
1188chip completely. For chip types known to include OTP memories a warning is
1189printed when they are detected.
1190.sp
1191Similar to OTP memories are unique, factory programmed, unforgeable IDs.
1192They are not modifiable by the user at all.
Stefan Taunerac54fbe2011-07-21 19:52:00 +00001193.SH LICENSE
Stefan Reinauer261144c2006-07-27 23:29:02 +00001194.B flashrom
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001195is covered by the GNU General Public License (GPL), version 2. Some files are
Stefan Tauner23e10b82016-01-23 16:16:49 +00001196additionally available under any later version of the GPL.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001197.SH COPYRIGHT
Stefan Reinauer261144c2006-07-27 23:29:02 +00001198.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001199Please see the individual files.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001200.SH AUTHORS
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001201Andrew Morgan
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001202.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001203Carl-Daniel Hailfinger
1204.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001205Claus Gindhart
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001206.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001207David Borg
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001208.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001209David Hendricks
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001210.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001211Dominik Geyer
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001212.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001213Eric Biederman
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001214.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001215Giampiero Giancipoli
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001216.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001217Helge Wagner
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001218.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001219Idwer Vollering
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001220.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001221Joe Bao
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001222.br
Stefan Taunerc0aaf952011-05-19 02:58:17 +00001223Joerg Fischer
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001224.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001225Joshua Roys
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001226.br
Stefan Tauner5c316f92015-02-08 21:57:52 +00001227Ky\[:o]sti M\[:a]lkki
1228.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001229Luc Verhaegen
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001230.br
Carl-Daniel Hailfinger451dc802009-05-01 11:00:39 +00001231Li-Ta Lo
1232.br
Mark Marshall90021f22010-12-03 14:48:11 +00001233Mark Marshall
1234.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001235Markus Boas
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001236.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001237Mattias Mattsson
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001238.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001239Michael Karcher
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001240.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001241Nikolay Petukhov
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001242.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001243Patrick Georgi
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001244.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001245Peter Lemenkov
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001246.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001247Peter Stuge
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001248.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001249Reinder E.N. de Haan
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001250.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001251Ronald G. Minnich
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001252.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001253Ronald Hoogenboom
Stefan Reinauer261144c2006-07-27 23:29:02 +00001254.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001255Sean Nelson
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001256.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001257Stefan Reinauer
Stefan Reinauer261144c2006-07-27 23:29:02 +00001258.br
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001259Stefan Tauner
1260.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001261Stefan Wildemann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001262.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001263Stephan Guilloux
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001264.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001265Steven James
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001266.br
Stefan Tauner23e10b82016-01-23 16:16:49 +00001267Urja Rannikko
1268.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001269Uwe Hermann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001270.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001271Wang Qingpei
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001272.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001273Yinghai Lu
Stefan Reinauerf8337dd2006-08-03 10:49:09 +00001274.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001275some others, please see the flashrom svn changelog for details.
1276.br
Stefan Tauner4c723152016-01-14 22:47:55 +00001277All still active authors can be reached via
1278.MTOB "flashrom@flashrom.org" "the mailing list" .
Stefan Reinauer261144c2006-07-27 23:29:02 +00001279.PP
Stefan Tauner4c723152016-01-14 22:47:55 +00001280This manual page was written by
1281.MTOB "uwe@hermann-uwe.de" "Uwe Hermann" ,
1282Carl-Daniel Hailfinger, Stefan Tauner and others.
Uwe Hermann42eb17f2008-01-18 17:48:51 +00001283It is licensed under the terms of the GNU GPL (version 2 or later).