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Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000014 */
15
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000016/* Driver for various LPT adapters.
17 *
18 * This driver uses non-portable direct I/O port accesses which won't work on
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000019 * any non-x86 platform, and even on x86 there is a high chance there will be
20 * collisions with any loaded parallel port drivers.
21 * The big advantage of direct port I/O is OS independence and speed because
22 * most OS parport drivers will perform many unnecessary accesses although
23 * this driver just treats the parallel port as a GPIO set.
24 */
25#if defined(__i386__) || defined(__x86_64__)
26
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +000027#include <stdlib.h>
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000028#include <strings.h>
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +000029#include <string.h>
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000030#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000031#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000032#include "hwaccess.h"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000033
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110034static uint16_t lpt_iobase;
35
36/* Cached value of last byte sent. */
37static uint8_t lpt_outbyte;
38
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000039/* We have two sets of pins, out and in. The numbers for both sets are
40 * independent and are bitshift values, not real pin numbers.
Paul Menzel018d4822011-10-21 12:33:07 +000041 * Default settings are for the RayeR hardware.
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000042 */
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000043
44struct rayer_programmer {
45 const char *type;
46 const enum test_state status;
47 const char *description;
48 const void *dev_data;
49};
50
51struct rayer_pinout {
52 uint8_t cs_bit;
53 uint8_t sck_bit;
54 uint8_t mosi_bit;
55 uint8_t miso_bit;
56 void (*preinit)(const void *);
57 int (*shutdown)(void *);
58};
59
60static const struct rayer_pinout rayer_spipgm = {
61 .cs_bit = 5,
62 .sck_bit = 6,
63 .mosi_bit = 7,
64 .miso_bit = 6,
65};
66
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110067static void dlc5_preinit(const void *data) {
68 msg_pdbg("dlc5_preinit\n");
69 /* Assert pin 6 to receive MISO. */
70 lpt_outbyte |= (1<<4);
71 OUTB(lpt_outbyte, lpt_iobase);
72}
73
74static int dlc5_shutdown(void *data) {
75 msg_pdbg("dlc5_shutdown\n");
76 /* De-assert pin 6 to force MISO low. */
77 lpt_outbyte &= ~(1<<4);
78 OUTB(lpt_outbyte, lpt_iobase);
79 return 0;
80}
Kyösti Mälkki1d473792013-10-02 01:22:17 +000081
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000082static const struct rayer_pinout xilinx_dlc5 = {
83 .cs_bit = 2,
84 .sck_bit = 1,
85 .mosi_bit = 0,
86 .miso_bit = 4,
Kyösti Mälkki1d473792013-10-02 01:22:17 +000087 .preinit = dlc5_preinit,
88 .shutdown = dlc5_shutdown,
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000089};
90
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110091static void byteblaster_preinit(const void *data){
92 msg_pdbg("byteblaster_preinit\n");
93 /* Assert #EN signal. */
94 OUTB(2, lpt_iobase + 2 );
95}
96
97static int byteblaster_shutdown(void *data){
98 msg_pdbg("byteblaster_shutdown\n");
99 /* De-Assert #EN signal. */
100 OUTB(0, lpt_iobase + 2 );
101 return 0;
102}
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000103
104static const struct rayer_pinout altera_byteblastermv = {
105 .cs_bit = 1,
106 .sck_bit = 0,
107 .mosi_bit = 6,
108 .miso_bit = 7,
109 .preinit = byteblaster_preinit,
110 .shutdown = byteblaster_shutdown,
111};
112
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100113static void stk200_preinit(const void *data) {
114 msg_pdbg("stk200_init\n");
115 /* Assert #EN signals, set LED signal. */
116 lpt_outbyte = (1 << 6) ;
117 OUTB(lpt_outbyte, lpt_iobase);
118}
119
120static int stk200_shutdown(void *data) {
121 msg_pdbg("stk200_shutdown\n");
122 /* Assert #EN signals, clear LED signal. */
123 lpt_outbyte = (1 << 2) | (1 << 3);
124 OUTB(lpt_outbyte, lpt_iobase);
125 return 0;
126}
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000127
128static const struct rayer_pinout atmel_stk200 = {
129 .cs_bit = 7,
130 .sck_bit = 4,
131 .mosi_bit = 5,
132 .miso_bit = 6,
133 .preinit = stk200_preinit,
134 .shutdown = stk200_shutdown,
135};
136
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000137static const struct rayer_pinout wiggler_lpt = {
138 .cs_bit = 1,
139 .sck_bit = 2,
140 .mosi_bit = 3,
141 .miso_bit = 7,
142};
143
Stefan Taunerfdb16592016-02-28 17:04:38 +0000144static const struct rayer_pinout spi_tt = {
145 .cs_bit = 2,
146 .sck_bit = 0,
147 .mosi_bit = 4,
148 .miso_bit = 7,
149};
150
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000151static const struct rayer_programmer rayer_spi_types[] = {
152 {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
153 {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000154 {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv},
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000155 {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200},
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000156 {"wiggler", OK, "Wiggler LPT", &wiggler_lpt},
Stefan Taunerfdb16592016-02-28 17:04:38 +0000157 {"spi_tt", NT, "SPI Tiny Tools (SPI_TT LPT)", &spi_tt},
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000158 {0},
159};
160
161static const struct rayer_pinout *pinout = NULL;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000162
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000163static void rayer_bitbang_set_cs(int val)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000164{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000165 lpt_outbyte &= ~(1 << pinout->cs_bit);
166 lpt_outbyte |= (val << pinout->cs_bit);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000167 OUTB(lpt_outbyte, lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000168}
169
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000170static void rayer_bitbang_set_sck(int val)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000171{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000172 lpt_outbyte &= ~(1 << pinout->sck_bit);
173 lpt_outbyte |= (val << pinout->sck_bit);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000174 OUTB(lpt_outbyte, lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000175}
176
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000177static void rayer_bitbang_set_mosi(int val)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000178{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000179 lpt_outbyte &= ~(1 << pinout->mosi_bit);
180 lpt_outbyte |= (val << pinout->mosi_bit);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000181 OUTB(lpt_outbyte, lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000182}
183
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000184static int rayer_bitbang_get_miso(void)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000185{
186 uint8_t tmp;
187
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000188 tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted
189 tmp = (tmp >> pinout->miso_bit) & 0x1;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000190 return tmp;
191}
192
193static const struct bitbang_spi_master bitbang_spi_master_rayer = {
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000194 .set_cs = rayer_bitbang_set_cs,
195 .set_sck = rayer_bitbang_set_sck,
196 .set_mosi = rayer_bitbang_set_mosi,
197 .get_miso = rayer_bitbang_get_miso,
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000198 .half_period = 0,
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000199};
200
201int rayer_spi_init(void)
202{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000203 const struct rayer_programmer *prog = rayer_spi_types;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000204 char *arg = NULL;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000205
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000206 /* Non-default port requested? */
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000207 arg = extract_programmer_param("iobase");
208 if (arg) {
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000209 char *endptr = NULL;
210 unsigned long tmp;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000211 tmp = strtoul(arg, &endptr, 0);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000212 /* Port 0, port >0x10000, unaligned ports and garbage strings
213 * are rejected.
214 */
215 if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||
216 (*endptr != '\0')) {
217 /* Using ports below 0x100 is a really bad idea, and
218 * should only be done if no port between 0x100 and
219 * 0xfffc works due to routing issues.
220 */
221 msg_perr("Error: iobase= specified, but the I/O base "
222 "given was invalid.\nIt must be a multiple of "
223 "0x4 and lie between 0x100 and 0xfffc.\n");
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000224 free(arg);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000225 return 1;
226 } else {
227 lpt_iobase = (uint16_t)tmp;
228 msg_pinfo("Non-default I/O base requested. This will "
229 "not change the hardware settings.\n");
230 }
231 } else {
232 /* Pick a default value for the I/O base. */
233 lpt_iobase = 0x378;
234 }
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000235 free(arg);
Elyes HAOUAS0cacb112019-02-04 12:16:38 +0100236
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000237 msg_pdbg("Using address 0x%x as I/O base for parallel port access.\n",
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000238 lpt_iobase);
239
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000240 arg = extract_programmer_param("type");
241 if (arg) {
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000242 for (; prog->type != NULL; prog++) {
243 if (strcasecmp(arg, prog->type) == 0) {
244 break;
245 }
246 }
247 if (prog->type == NULL) {
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000248 msg_perr("Error: Invalid device type specified.\n");
249 free(arg);
250 return 1;
251 }
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000252 free(arg);
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000253 }
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000254 msg_pinfo("Using %s pinout.\n", prog->description);
255 pinout = (struct rayer_pinout *)prog->dev_data;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000256
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000257 if (rget_io_perms())
258 return 1;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000259
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000260 /* Get the initial value before writing to any line. */
261 lpt_outbyte = INB(lpt_iobase);
262
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000263 if (pinout->shutdown)
264 register_shutdown(pinout->shutdown, (void*)pinout);
265 if (pinout->preinit)
266 pinout->preinit(pinout);
267
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000268 if (register_spi_bitbang_master(&bitbang_spi_master_rayer))
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000269 return 1;
270
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000271 return 0;
272}
273
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000274#else
275#error PCI port I/O access is not supported on this architecture yet.
276#endif