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Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000018 */
19
20#ifndef __PROGRAMMER_H__
21#define __PROGRAMMER_H__ 1
22
Nico Huber1cf407b2017-11-10 20:18:23 +010023#include <stdint.h>
24
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000025#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000026
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000027enum programmer {
28#if CONFIG_INTERNAL == 1
29 PROGRAMMER_INTERNAL,
30#endif
31#if CONFIG_DUMMY == 1
32 PROGRAMMER_DUMMY,
33#endif
Edward O'Callaghaned341cf2020-11-09 16:57:40 +110034#if CONFIG_MEC1308 == 1
35 PROGRAMMER_MEC1308,
36#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000037#if CONFIG_NIC3COM == 1
38 PROGRAMMER_NIC3COM,
39#endif
40#if CONFIG_NICREALTEK == 1
41 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000042#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000043#if CONFIG_NICNATSEMI == 1
44 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000045#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000046#if CONFIG_GFXNVIDIA == 1
47 PROGRAMMER_GFXNVIDIA,
48#endif
Edward O'Callaghan732f2ee2020-11-27 12:54:31 +110049#if CONFIG_RAIDEN_DEBUG_SPI == 1
Edward O'Callaghanf95cc8f2020-11-27 12:59:49 +110050 PROGRAMMER_RAIDEN_DEBUG_SPI,
Edward O'Callaghanad08aef2020-03-02 18:16:14 +110051#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000052#if CONFIG_DRKAISER == 1
53 PROGRAMMER_DRKAISER,
54#endif
55#if CONFIG_SATASII == 1
56 PROGRAMMER_SATASII,
57#endif
58#if CONFIG_ATAHPT == 1
59 PROGRAMMER_ATAHPT,
60#endif
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +000061#if CONFIG_ATAVIA == 1
62 PROGRAMMER_ATAVIA,
63#endif
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000064#if CONFIG_ATAPROMISE == 1
65 PROGRAMMER_ATAPROMISE,
66#endif
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000067#if CONFIG_IT8212 == 1
68 PROGRAMMER_IT8212,
69#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000070#if CONFIG_FT2232_SPI == 1
71 PROGRAMMER_FT2232_SPI,
72#endif
73#if CONFIG_SERPROG == 1
74 PROGRAMMER_SERPROG,
75#endif
76#if CONFIG_BUSPIRATE_SPI == 1
77 PROGRAMMER_BUSPIRATE_SPI,
78#endif
79#if CONFIG_DEDIPROG == 1
80 PROGRAMMER_DEDIPROG,
81#endif
Daniel Thompson45e91a22018-06-04 13:46:29 +010082#if CONFIG_DEVELOPERBOX_SPI == 1
83 PROGRAMMER_DEVELOPERBOX_SPI,
84#endif
Edward O'Callaghaned341cf2020-11-09 16:57:40 +110085#if CONFIG_ENE_LPC == 1
86 PROGRAMMER_ENE_LPC,
87#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000088#if CONFIG_RAYER_SPI == 1
89 PROGRAMMER_RAYER_SPI,
90#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000091#if CONFIG_PONY_SPI == 1
92 PROGRAMMER_PONY_SPI,
93#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000094#if CONFIG_NICINTEL == 1
95 PROGRAMMER_NICINTEL,
96#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000097#if CONFIG_NICINTEL_SPI == 1
98 PROGRAMMER_NICINTEL_SPI,
99#endif
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000100#if CONFIG_NICINTEL_EEPROM == 1
101 PROGRAMMER_NICINTEL_EEPROM,
102#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000103#if CONFIG_OGP_SPI == 1
104 PROGRAMMER_OGP_SPI,
105#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000106#if CONFIG_SATAMV == 1
107 PROGRAMMER_SATAMV,
108#endif
David Hendricksf9a30552015-05-23 20:30:30 -0700109#if CONFIG_LINUX_MTD == 1
110 PROGRAMMER_LINUX_MTD,
111#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000112#if CONFIG_LINUX_SPI == 1
113 PROGRAMMER_LINUX_SPI,
114#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000115#if CONFIG_USBBLASTER_SPI == 1
116 PROGRAMMER_USBBLASTER_SPI,
117#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000118#if CONFIG_MSTARDDC_SPI == 1
119 PROGRAMMER_MSTARDDC_SPI,
120#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000121#if CONFIG_PICKIT2_SPI == 1
122 PROGRAMMER_PICKIT2_SPI,
123#endif
Urja Rannikko0870b022016-01-31 22:10:29 +0000124#if CONFIG_CH341A_SPI == 1
125 PROGRAMMER_CH341A_SPI,
126#endif
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100127#if CONFIG_DIGILENT_SPI == 1
128 PROGRAMMER_DIGILENT_SPI,
129#endif
Marc Schink3578ec62016-03-17 16:23:03 +0100130#if CONFIG_JLINK_SPI == 1
131 PROGRAMMER_JLINK_SPI,
132#endif
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100133#if CONFIG_NI845X_SPI == 1
134 PROGRAMMER_NI845X_SPI,
135#endif
Miklós Márton324929c2019-08-01 19:14:10 +0200136#if CONFIG_STLINKV3_SPI == 1
137 PROGRAMMER_STLINKV3_SPI,
138#endif
Shiyu Sun13a2ef62020-03-19 14:37:57 +1100139#if CONFIG_LSPCON_I2C_SPI == 1
140 PROGRAMMER_LSPCON_I2C_SPI,
141#endif
Edward O'Callaghand97f87b2020-03-26 00:00:41 +1100142#if CONFIG_REALTEK_MST_I2C_SPI == 1
143 PROGRAMMER_REALTEK_MST_I2C_SPI,
144#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000145 PROGRAMMER_INVALID /* This must always be the last entry. */
146};
147
Stefan Tauneraf358d62012-12-27 18:40:26 +0000148enum programmer_type {
149 PCI = 1, /* to detect uninitialized values */
150 USB,
151 OTHER,
152};
153
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000154struct dev_entry {
155 uint16_t vendor_id;
156 uint16_t device_id;
157 const enum test_state status;
158 const char *vendor_name;
159 const char *device_name;
160};
161
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000162struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000163 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000164 const enum programmer_type type;
165 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000166 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000167 const char *const note;
168 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000169
170 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000171
Stefan Tauner305e0b92013-07-17 23:46:44 +0000172 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000173 void (*unmap_flash_region) (void *virt_addr, size_t len);
174
Stefan Taunerf80419c2014-05-02 15:41:42 +0000175 void (*delay) (unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000176};
177
178extern const struct programmer_entry programmer_table[];
179
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000180int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000181int programmer_shutdown(void);
182
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000183struct bitbang_spi_master {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000184 /* Note that CS# is active low, so val=0 means the chip is active. */
185 void (*set_cs) (int val);
186 void (*set_sck) (int val);
187 void (*set_mosi) (int val);
188 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000189 void (*request_bus) (void);
190 void (*release_bus) (void);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100191 /* optional functions to optimize xfers */
192 void (*set_sck_set_mosi) (int sck, int mosi);
193 int (*set_sck_get_miso) (int sck);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000194 /* Length of half a clock period in usecs. */
195 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000196};
197
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000198#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000199struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000200
201/* pcidev.c */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000202// FIXME: This needs to be local, not global(?)
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000203extern struct pci_access *pacc;
204int pci_init_common(void);
205uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
206struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
207/* rpci_write_* are reversible writes. The original PCI config space register
208 * contents will be restored on shutdown.
Youness Alaouia54ceb12017-07-26 18:03:36 -0400209 * To clone the pci_dev instances internally, the `pacc` global
210 * variable has to reference a pci_access method that is compatible
211 * with the given pci_dev handle. The referenced pci_access (not
212 * the variable) has to stay valid until the shutdown handlers are
213 * finished.
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000214 */
215int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
216int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
217int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
218#endif
219
220#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000221struct penable {
222 uint16_t vendor_id;
223 uint16_t device_id;
Nico Huber2e50cdc2018-09-23 20:20:26 +0200224 enum chipbustype buses;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000225 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000226 const char *vendor_name;
227 const char *device_name;
228 int (*doit) (struct pci_dev *dev, const char *name);
229};
230
231extern const struct penable chipset_enables[];
232
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000233enum board_match_phase {
234 P1,
235 P2,
236 P3
237};
238
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000239struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000240 /* Any device, but make it sensible, like the ISA bridge. */
241 uint16_t first_vendor;
242 uint16_t first_device;
243 uint16_t first_card_vendor;
244 uint16_t first_card_device;
245
246 /* Any device, but make it sensible, like
247 * the host bridge. May be NULL.
248 */
249 uint16_t second_vendor;
250 uint16_t second_device;
251 uint16_t second_card_vendor;
252 uint16_t second_card_device;
253
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000254 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000255 const char *dmi_pattern;
256
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000257 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000258 const char *lb_vendor;
259 const char *lb_part;
260
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000261 enum board_match_phase phase;
262
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000263 const char *vendor_name;
264 const char *board_name;
265
266 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000267 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000268 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000269};
270
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000271extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000272
273struct board_info {
274 const char *vendor;
275 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000276 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000277#ifdef CONFIG_PRINT_WIKI
278 const char *url;
279 const char *note;
280#endif
281};
282
283extern const struct board_info boards_known[];
284extern const struct board_info laptops_known[];
285#endif
286
287/* udelay.c */
Stefan Taunerf80419c2014-05-02 15:41:42 +0000288void myusec_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000289void myusec_calibrate_delay(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000290void internal_sleep(unsigned int usecs);
291void internal_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000292
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000293#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000294/* board_enable.c */
Stefan Tauner600576b2014-06-12 22:57:36 +0000295int selfcheck_board_enables(void);
Jacob Garber1c091d12019-08-12 11:14:14 -0600296int board_parse_parameter(const char *boardstring, char **vendor, char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000297void w836xx_ext_enter(uint16_t port);
298void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000299void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000300int it8705f_write_enable(uint8_t port);
301uint8_t sio_read(uint16_t port, uint8_t reg);
302void sio_write(uint16_t port, uint8_t reg, uint8_t data);
303void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000304void board_handle_before_superio(void);
305void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000306int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000307
308/* chipset_enable.c */
309int chipset_flash_enable(void);
310
311/* processor_enable.c */
312int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000313#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000314
315/* physmap.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000316void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000317void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
Niklas Söderlund5d307202013-09-14 09:02:27 +0000318void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000319void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000320void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000321void physunmap_unaligned(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000322#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000323int setup_cpu_msr(int cpu);
324void cleanup_cpu_msr(void);
325
326/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000327int cb_parse_table(const char **vendor, const char **model);
Nico Huber519be662018-12-23 20:03:35 +0100328int cb_check_image(const uint8_t *bios, unsigned int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000329
330/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000331#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000332extern int has_dmi_support;
333void dmi_init(void);
334int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000335#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000336
337/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000338struct superio {
339 uint16_t vendor;
340 uint16_t port;
341 uint16_t model;
342};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000343extern struct superio superios[];
344extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000345#define SUPERIO_VENDOR_NONE 0x0
346#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000347#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000348#endif
349#if NEED_PCI == 1
Uwe Hermann24c35e42011-07-13 11:22:03 +0000350struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000351struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
352struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
353 uint16_t card_vendor, uint16_t card_device);
354#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000355int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000356#if CONFIG_INTERNAL == 1
357extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000358extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000359extern int force_boardenable;
360extern int force_boardmismatch;
361void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000362int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000363extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000364int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000365#endif
366
367/* hwaccess.c */
368void mmio_writeb(uint8_t val, void *addr);
369void mmio_writew(uint16_t val, void *addr);
370void mmio_writel(uint32_t val, void *addr);
Nico Huberb4d8a2a2017-03-17 17:19:15 +0100371uint8_t mmio_readb(const void *addr);
372uint16_t mmio_readw(const void *addr);
373uint32_t mmio_readl(const void *addr);
374void mmio_readn(const void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000375void mmio_le_writeb(uint8_t val, void *addr);
376void mmio_le_writew(uint16_t val, void *addr);
377void mmio_le_writel(uint32_t val, void *addr);
Nico Huberb4d8a2a2017-03-17 17:19:15 +0100378uint8_t mmio_le_readb(const void *addr);
379uint16_t mmio_le_readw(const void *addr);
380uint32_t mmio_le_readl(const void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000381#define pci_mmio_writeb mmio_le_writeb
382#define pci_mmio_writew mmio_le_writew
383#define pci_mmio_writel mmio_le_writel
384#define pci_mmio_readb mmio_le_readb
385#define pci_mmio_readw mmio_le_readw
386#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000387void rmmio_writeb(uint8_t val, void *addr);
388void rmmio_writew(uint16_t val, void *addr);
389void rmmio_writel(uint32_t val, void *addr);
390void rmmio_le_writeb(uint8_t val, void *addr);
391void rmmio_le_writew(uint16_t val, void *addr);
392void rmmio_le_writel(uint32_t val, void *addr);
393#define pci_rmmio_writeb rmmio_le_writeb
394#define pci_rmmio_writew rmmio_le_writew
395#define pci_rmmio_writel rmmio_le_writel
396void rmmio_valb(void *addr);
397void rmmio_valw(void *addr);
398void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000399
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000400/* dummyflasher.c */
401#if CONFIG_DUMMY == 1
402int dummy_init(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000403void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000404void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000405#endif
406
407/* nic3com.c */
408#if CONFIG_NIC3COM == 1
409int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000410extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000411#endif
412
413/* gfxnvidia.c */
414#if CONFIG_GFXNVIDIA == 1
415int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000416extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000417#endif
418
Edward O'Callaghanad08aef2020-03-02 18:16:14 +1100419/* raiden_debug_spi.c */
Edward O'Callaghan732f2ee2020-11-27 12:54:31 +1100420#if CONFIG_RAIDEN_DEBUG_SPI == 1
Edward O'Callaghanad08aef2020-03-02 18:16:14 +1100421int raiden_debug_spi_init(void);
Angel Pons6c8bd912020-03-25 13:35:45 +0100422extern const struct dev_entry devs_raiden[];
Edward O'Callaghanad08aef2020-03-02 18:16:14 +1100423#endif
424
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000425/* drkaiser.c */
426#if CONFIG_DRKAISER == 1
427int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000428extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000429#endif
430
431/* nicrealtek.c */
432#if CONFIG_NICREALTEK == 1
433int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000434extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000435#endif
436
437/* nicnatsemi.c */
438#if CONFIG_NICNATSEMI == 1
439int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000440extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000441#endif
442
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000443/* nicintel.c */
444#if CONFIG_NICINTEL == 1
445int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000446extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000447#endif
448
Idwer Vollering004f4b72010-09-03 18:21:21 +0000449/* nicintel_spi.c */
450#if CONFIG_NICINTEL_SPI == 1
451int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000452extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000453#endif
454
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000455/* nicintel_eeprom.c */
456#if CONFIG_NICINTEL_EEPROM == 1
457int nicintel_ee_init(void);
458extern const struct dev_entry nics_intel_ee[];
459#endif
460
Mark Marshall90021f22010-12-03 14:48:11 +0000461/* ogp_spi.c */
462#if CONFIG_OGP_SPI == 1
463int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000464extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000465#endif
466
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000467/* satamv.c */
468#if CONFIG_SATAMV == 1
469int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000470extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000471#endif
472
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000473/* satasii.c */
474#if CONFIG_SATASII == 1
475int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000476extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000477#endif
478
479/* atahpt.c */
480#if CONFIG_ATAHPT == 1
481int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000482extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000483#endif
484
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000485/* atavia.c */
486#if CONFIG_ATAVIA == 1
487int atavia_init(void);
488void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len);
489extern const struct dev_entry ata_via[];
490#endif
491
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000492/* atapromise.c */
493#if CONFIG_ATAPROMISE == 1
494int atapromise_init(void);
495void *atapromise_map(const char *descr, uintptr_t phys_addr, size_t len);
496extern const struct dev_entry ata_promise[];
497#endif
498
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000499/* it8212.c */
500#if CONFIG_IT8212 == 1
501int it8212_init(void);
502extern const struct dev_entry devs_it8212[];
503#endif
504
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000505/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000506#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000507int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000508extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000509#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000510
James Lairdc60de0e2013-03-27 13:00:23 +0000511/* usbblaster_spi.c */
512#if CONFIG_USBBLASTER_SPI == 1
513int usbblaster_spi_init(void);
514extern const struct dev_entry devs_usbblasterspi[];
515#endif
516
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000517/* mstarddc_spi.c */
518#if CONFIG_MSTARDDC_SPI == 1
519int mstarddc_spi_init(void);
520#endif
521
Justin Chevrier66e554b2015-02-08 21:58:10 +0000522/* pickit2_spi.c */
523#if CONFIG_PICKIT2_SPI == 1
524int pickit2_spi_init(void);
Stefan Taunerf31fe842016-02-22 08:59:15 +0000525extern const struct dev_entry devs_pickit2_spi[];
Justin Chevrier66e554b2015-02-08 21:58:10 +0000526#endif
527
Miklós Márton324929c2019-08-01 19:14:10 +0200528/* stlinkv3_spi.c */
529#if CONFIG_STLINKV3_SPI == 1
530int stlinkv3_spi_init(void);
531extern const struct dev_entry devs_stlinkv3_spi[];
532#endif
533
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000534/* rayer_spi.c */
535#if CONFIG_RAYER_SPI == 1
536int rayer_spi_init(void);
537#endif
538
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000539/* pony_spi.c */
540#if CONFIG_PONY_SPI == 1
541int pony_spi_init(void);
542#endif
543
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000544/* bitbang_spi.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000545int register_spi_bitbang_master(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000546
547/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000548#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000549int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000550#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000551
David Hendricksf9a30552015-05-23 20:30:30 -0700552/* linux_mtd.c */
553#if CONFIG_LINUX_MTD == 1
554int linux_mtd_init(void);
555#endif
556
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000557/* linux_spi.c */
558#if CONFIG_LINUX_SPI == 1
559int linux_spi_init(void);
560#endif
561
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000562/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000563#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000564int dediprog_init(void);
Stefan Taunerfdec7472016-02-22 08:59:27 +0000565extern const struct dev_entry devs_dediprog[];
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000566#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000567
Daniel Thompson45e91a22018-06-04 13:46:29 +0100568/* developerbox_spi.c */
569#if CONFIG_DEVELOPERBOX_SPI == 1
570int developerbox_spi_init(void);
571extern const struct dev_entry devs_developerbox_spi[];
572#endif
573
Urja Rannikko0870b022016-01-31 22:10:29 +0000574/* ch341a_spi.c */
575#if CONFIG_CH341A_SPI == 1
576int ch341a_spi_init(void);
577void ch341a_spi_delay(unsigned int usecs);
578extern const struct dev_entry devs_ch341a_spi[];
579#endif
580
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100581/* digilent_spi.c */
582#if CONFIG_DIGILENT_SPI == 1
583int digilent_spi_init(void);
584extern const struct dev_entry devs_digilent_spi[];
585#endif
586
Victor Ding436b4152020-08-19 22:48:19 +1000587/* ene_lpc.c */
588#if CONFIG_ENE_LPC == 1
589int ene_lpc_init(void);
590#endif
591
Marc Schink3578ec62016-03-17 16:23:03 +0100592/* jlink_spi.c */
593#if CONFIG_JLINK_SPI == 1
594int jlink_spi_init(void);
595#endif
596
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100597/* ni845x_spi.c */
598#if CONFIG_NI845X_SPI == 1
599int ni845x_spi_init(void);
600#endif
601
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000602/* flashrom.c */
603struct decode_sizes {
604 uint32_t parallel;
605 uint32_t lpc;
606 uint32_t fwh;
607 uint32_t spi;
608};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000609// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000610extern struct decode_sizes max_rom_decode;
611extern int programmer_may_write;
612extern unsigned long flashbase;
Stefan Tauner9e3a6982014-08-15 17:17:59 +0000613unsigned int count_max_decode_exceedings(const struct flashctx *flash);
Stefan Tauner66652442011-06-26 17:38:17 +0000614char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000615
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000616/* spi.c */
Michael Karcher62797512011-05-11 17:07:02 +0000617#define MAX_DATA_UNSPECIFIED 0
618#define MAX_DATA_READ_UNLIMITED 64 * 1024
619#define MAX_DATA_WRITE_UNLIMITED 256
Nico Huber1cf407b2017-11-10 20:18:23 +0100620
621#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
Nico Huberdc5af542018-12-22 16:54:59 +0100622#define SPI_MASTER_NO_4BA_MODES (1U << 1) /**< Compatibility modes (i.e. extended address
623 register, 4BA mode switch) don't work */
Nico Huber1cf407b2017-11-10 20:18:23 +0100624
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000625struct spi_master {
Nico Huber1cf407b2017-11-10 20:18:23 +0100626 uint32_t features;
Stefan Tauner23e10b82016-01-23 16:16:49 +0000627 unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
628 unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000629 int (*command)(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000630 const unsigned char *writearr, unsigned char *readarr);
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000631 int (*multicommand)(const struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000632
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000633 /* Optimized functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000634 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000635 int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
636 int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Edward O'Callaghanec942502021-01-06 14:10:52 +1100637 void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000638};
639
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000640int default_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000641 const unsigned char *writearr, unsigned char *readarr);
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000642int default_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000643int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000644int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
645int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7e496852021-05-11 17:38:14 +0200646int register_spi_master(const struct spi_master *mst, void *data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000647
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000648/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000649enum ich_chipset {
650 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000651 CHIPSET_ICH,
652 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000653 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000654 CHIPSET_POULSBO, /* SCH U* */
655 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
656 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000657 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000658 CHIPSET_ICH8,
659 CHIPSET_ICH9,
660 CHIPSET_ICH10,
661 CHIPSET_5_SERIES_IBEX_PEAK,
662 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000663 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000664 CHIPSET_8_SERIES_LYNX_POINT,
Duncan Laurie4095ed72014-08-20 15:39:32 +0000665 CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
Duncan Laurie90eb2262013-03-15 03:12:29 +0000666 CHIPSET_8_SERIES_LYNX_POINT_LP,
667 CHIPSET_8_SERIES_WELLSBURG,
Duncan Laurie823096e2014-08-20 15:39:38 +0000668 CHIPSET_9_SERIES_WILDCAT_POINT,
Nico Huber51205912017-03-17 17:59:54 +0100669 CHIPSET_9_SERIES_WILDCAT_POINT_LP,
Nico Huber93c30692017-03-20 14:25:09 +0100670 CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
David Hendricksa5216362017-08-08 20:02:22 -0700671 CHIPSET_C620_SERIES_LEWISBURG,
Thomas Heijligen5ec84b32019-03-19 17:00:03 +0100672 CHIPSET_300_SERIES_CANNON_POINT,
Nico Huber37509862019-01-18 14:23:02 +0100673 CHIPSET_APOLLO_LAKE,
Matt DeVillierb1f858f2020-08-12 12:48:06 -0500674 CHIPSET_400_SERIES_COMET_POINT,
Angel Pons11a35982020-07-10 17:04:10 +0200675 CHIPSET_GEMINI_LAKE,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000676};
677
Stefan Tauner2abab942012-04-27 20:41:23 +0000678/* ichspi.c */
679#if CONFIG_INTERNAL == 1
Nico Huber560111e2017-04-26 12:27:17 +0200680int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
681int via_init_spi(uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000682
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000683/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000684int amd_imc_shutdown(struct pci_dev *dev);
685
David Hendricks4e748392011-02-28 23:58:15 +0000686/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000687int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000688
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000689/* it87spi.c */
690void enter_conf_mode_ite(uint16_t port);
691void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000692void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000693int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000694
David Hendricksf9a30552015-05-23 20:30:30 -0700695#if CONFIG_LINUX_MTD == 1
696/* trivial wrapper to avoid cluttering internal_init() with #if */
697static inline int try_mtd(void) { return linux_mtd_init(); };
698#else
699static inline int try_mtd(void) { return 1; };
700#endif
701
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000702/* mcp6x_spi.c */
703int mcp6x_spi_init(int want_spi);
704
Victor Ding821e44c2020-08-18 18:27:26 +1000705/* mec1308.c */
706#if CONFIG_MEC1308 == 1
707int mec1308_init(void);
708#endif
709
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000710/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000711int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000712
713/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000714int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000715#endif
716
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000717/* opaque.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000718struct opaque_master {
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000719 int max_data_read;
720 int max_data_write;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000721 /* Specific functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000722 int (*probe) (struct flashctx *flash);
723 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000724 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000725 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Edward O'Callaghanec942502021-01-06 14:10:52 +1100726 void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000727};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000728int register_opaque_master(const struct opaque_master *mst);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000729
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000730/* programmer.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000731void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000732void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000733void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
734void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000735void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000736uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
737uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
738void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000739struct par_master {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000740 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
741 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
742 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000743 void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000744 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
745 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
746 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
747 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Edward O'Callaghanec942502021-01-06 14:10:52 +1100748 void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000749};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000750int register_par_master(const struct par_master *mst, const enum chipbustype buses);
751struct registered_master {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000752 enum chipbustype buses_supported;
Edward O'Callaghan4eef6512021-02-03 11:19:41 +1100753 struct {
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000754 struct par_master par;
755 struct spi_master spi;
756 struct opaque_master opaque;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000757 };
758};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000759extern struct registered_master registered_masters[];
760extern int registered_master_count;
Stefan Tauner5c316f92015-02-08 21:57:52 +0000761int register_master(const struct registered_master *mst);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000762
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000763/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000764#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000765int serprog_init(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000766void serprog_delay(unsigned int usecs);
Urja Rannikko0b4ffd52015-06-29 23:24:23 +0000767void *serprog_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000768#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000769
770/* serial.c */
Stefan Taunerb0eee9b2015-01-10 09:32:50 +0000771#if IS_WINDOWS
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000772typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000773#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000774#else
775typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000776#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000777#endif
778
779void sp_flush_incoming(void);
Stefan Tauner72587f82016-01-04 03:05:15 +0000780fdtype sp_openserport(char *dev, int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000781extern fdtype sp_fd;
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600782int serialport_config(fdtype fd, int baud);
David Hendricks8bb20212011-06-14 01:35:36 +0000783int serialport_shutdown(void *data);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000784int serialport_write(const unsigned char *buf, unsigned int writecnt);
785int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000786int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000787int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000788
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000789/* Serial port/pin mapping:
790
791 1 CD <-
792 2 RXD <-
793 3 TXD ->
794 4 DTR ->
795 5 GND --
796 6 DSR <-
797 7 RTS ->
798 8 CTS <-
799 9 RI <-
800*/
801enum SP_PIN {
802 PIN_CD = 1,
803 PIN_RXD,
804 PIN_TXD,
805 PIN_DTR,
806 PIN_GND,
807 PIN_DSR,
808 PIN_RTS,
809 PIN_CTS,
810 PIN_RI,
811};
812
813void sp_set_pin(enum SP_PIN pin, int val);
814int sp_get_pin(enum SP_PIN pin);
815
Nico Huber1cf407b2017-11-10 20:18:23 +0100816/* spi_master feature checks */
817static inline bool spi_master_4ba(const struct flashctx *const flash)
818{
819 return flash->mst->buses_supported & BUS_SPI &&
820 flash->mst->spi.features & SPI_MASTER_4BA;
821}
Nico Huberdc5af542018-12-22 16:54:59 +0100822static inline bool spi_master_no_4ba_modes(const struct flashctx *const flash)
823{
824 return flash->mst->buses_supported & BUS_SPI &&
825 flash->mst->spi.features & SPI_MASTER_NO_4BA_MODES;
826}
Nico Huber1cf407b2017-11-10 20:18:23 +0100827
Daniel Thompson1d507a02018-07-12 11:02:28 +0100828/* usbdev.c */
829struct libusb_device_handle;
830struct libusb_context;
831struct libusb_device_handle *usb_dev_get_by_vid_pid_serial(
832 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, const char *serialno);
833struct libusb_device_handle *usb_dev_get_by_vid_pid_number(
834 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, unsigned int num);
835
Shiyu Sun13a2ef62020-03-19 14:37:57 +1100836/* lspcon_i2c_spi.c */
837#if CONFIG_LSPCON_I2C_SPI == 1
838int lspcon_i2c_spi_init(void);
839#endif
840
Edward O'Callaghand97f87b2020-03-26 00:00:41 +1100841/* realtek_mst_i2c_spi.c */
842#if CONFIG_REALTEK_MST_I2C_SPI == 1
843int realtek_mst_i2c_spi_init(void);
844#endif
845
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000846#endif /* !__PROGRAMMER_H__ */