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Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2011 Carl-Daniel Hailfinger
5 * Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000015 */
16
17#include <stdlib.h>
18#include "flash.h"
19#include "programmer.h"
20#include "hwaccess.h"
21
22static uint8_t *it8212_bar = NULL;
23
24#define PCI_VENDOR_ID_ITE 0x1283
25
26const struct dev_entry devs_it8212[] = {
Stefan Tauner6697f712014-08-06 15:09:15 +000027 {PCI_VENDOR_ID_ITE, 0x8212, NT, "ITE", "8212F PATA RAID"},
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000028
Evgeny Zinoviev83c56b82019-11-05 17:47:43 +030029 {0},
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000030};
31
32#define IT8212_MEMMAP_SIZE (128 * 1024)
33#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1)
34
35static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
36static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000037static const struct par_master par_master_it8212 = {
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000038 .chip_readb = it8212_chip_readb,
39 .chip_readw = fallback_chip_readw,
40 .chip_readl = fallback_chip_readl,
41 .chip_readn = fallback_chip_readn,
42 .chip_writeb = it8212_chip_writeb,
43 .chip_writew = fallback_chip_writew,
44 .chip_writel = fallback_chip_writel,
45 .chip_writen = fallback_chip_writen,
46};
47
48int it8212_init(void)
49{
50 if (rget_io_perms())
51 return 1;
52
53 struct pci_dev *dev = pcidev_init(devs_it8212, PCI_ROM_ADDRESS);
54 if (!dev)
55 return 1;
56
57 /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +000058 uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE;
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000059 if (!io_base_addr)
60 return 1;
61
62 it8212_bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE);
63 if (it8212_bar == ERROR_PTR)
64 return 1;
65
66 /* Restore ROM BAR decode state automatically at shutdown. */
67 rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
68
69 max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
Anastasia Klimchuk6a5db262021-05-21 09:40:58 +100070 register_par_master(&par_master_it8212, BUS_PARALLEL, NULL);
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000071 return 0;
72}
73
74static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
75{
76 pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK));
77}
78
79static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr)
80{
81 return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK));
82}