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Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000018 */
19
20#ifndef __PROGRAMMER_H__
21#define __PROGRAMMER_H__ 1
22
Nico Huber1cf407b2017-11-10 20:18:23 +010023#include <stdint.h>
24
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000025#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000026
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000027enum programmer {
28#if CONFIG_INTERNAL == 1
29 PROGRAMMER_INTERNAL,
30#endif
31#if CONFIG_DUMMY == 1
32 PROGRAMMER_DUMMY,
33#endif
Edward O'Callaghaned341cf2020-11-09 16:57:40 +110034#if CONFIG_MEC1308 == 1
35 PROGRAMMER_MEC1308,
36#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000037#if CONFIG_NIC3COM == 1
38 PROGRAMMER_NIC3COM,
39#endif
40#if CONFIG_NICREALTEK == 1
41 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000042#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000043#if CONFIG_NICNATSEMI == 1
44 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000045#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000046#if CONFIG_GFXNVIDIA == 1
47 PROGRAMMER_GFXNVIDIA,
48#endif
Edward O'Callaghan732f2ee2020-11-27 12:54:31 +110049#if CONFIG_RAIDEN_DEBUG_SPI == 1
Edward O'Callaghanf95cc8f2020-11-27 12:59:49 +110050 PROGRAMMER_RAIDEN_DEBUG_SPI,
Edward O'Callaghanad08aef2020-03-02 18:16:14 +110051#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000052#if CONFIG_DRKAISER == 1
53 PROGRAMMER_DRKAISER,
54#endif
55#if CONFIG_SATASII == 1
56 PROGRAMMER_SATASII,
57#endif
58#if CONFIG_ATAHPT == 1
59 PROGRAMMER_ATAHPT,
60#endif
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +000061#if CONFIG_ATAVIA == 1
62 PROGRAMMER_ATAVIA,
63#endif
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000064#if CONFIG_ATAPROMISE == 1
65 PROGRAMMER_ATAPROMISE,
66#endif
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000067#if CONFIG_IT8212 == 1
68 PROGRAMMER_IT8212,
69#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000070#if CONFIG_FT2232_SPI == 1
71 PROGRAMMER_FT2232_SPI,
72#endif
73#if CONFIG_SERPROG == 1
74 PROGRAMMER_SERPROG,
75#endif
76#if CONFIG_BUSPIRATE_SPI == 1
77 PROGRAMMER_BUSPIRATE_SPI,
78#endif
79#if CONFIG_DEDIPROG == 1
80 PROGRAMMER_DEDIPROG,
81#endif
Daniel Thompson45e91a22018-06-04 13:46:29 +010082#if CONFIG_DEVELOPERBOX_SPI == 1
83 PROGRAMMER_DEVELOPERBOX_SPI,
84#endif
Edward O'Callaghaned341cf2020-11-09 16:57:40 +110085#if CONFIG_ENE_LPC == 1
86 PROGRAMMER_ENE_LPC,
87#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000088#if CONFIG_RAYER_SPI == 1
89 PROGRAMMER_RAYER_SPI,
90#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000091#if CONFIG_PONY_SPI == 1
92 PROGRAMMER_PONY_SPI,
93#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000094#if CONFIG_NICINTEL == 1
95 PROGRAMMER_NICINTEL,
96#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000097#if CONFIG_NICINTEL_SPI == 1
98 PROGRAMMER_NICINTEL_SPI,
99#endif
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000100#if CONFIG_NICINTEL_EEPROM == 1
101 PROGRAMMER_NICINTEL_EEPROM,
102#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000103#if CONFIG_OGP_SPI == 1
104 PROGRAMMER_OGP_SPI,
105#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000106#if CONFIG_SATAMV == 1
107 PROGRAMMER_SATAMV,
108#endif
David Hendricksf9a30552015-05-23 20:30:30 -0700109#if CONFIG_LINUX_MTD == 1
110 PROGRAMMER_LINUX_MTD,
111#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000112#if CONFIG_LINUX_SPI == 1
113 PROGRAMMER_LINUX_SPI,
114#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000115#if CONFIG_USBBLASTER_SPI == 1
116 PROGRAMMER_USBBLASTER_SPI,
117#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000118#if CONFIG_MSTARDDC_SPI == 1
119 PROGRAMMER_MSTARDDC_SPI,
120#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000121#if CONFIG_PICKIT2_SPI == 1
122 PROGRAMMER_PICKIT2_SPI,
123#endif
Urja Rannikko0870b022016-01-31 22:10:29 +0000124#if CONFIG_CH341A_SPI == 1
125 PROGRAMMER_CH341A_SPI,
126#endif
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100127#if CONFIG_DIGILENT_SPI == 1
128 PROGRAMMER_DIGILENT_SPI,
129#endif
Marc Schink3578ec62016-03-17 16:23:03 +0100130#if CONFIG_JLINK_SPI == 1
131 PROGRAMMER_JLINK_SPI,
132#endif
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100133#if CONFIG_NI845X_SPI == 1
134 PROGRAMMER_NI845X_SPI,
135#endif
Miklós Márton324929c2019-08-01 19:14:10 +0200136#if CONFIG_STLINKV3_SPI == 1
137 PROGRAMMER_STLINKV3_SPI,
138#endif
Shiyu Sun13a2ef62020-03-19 14:37:57 +1100139#if CONFIG_LSPCON_I2C_SPI == 1
140 PROGRAMMER_LSPCON_I2C_SPI,
141#endif
Edward O'Callaghand97f87b2020-03-26 00:00:41 +1100142#if CONFIG_REALTEK_MST_I2C_SPI == 1
143 PROGRAMMER_REALTEK_MST_I2C_SPI,
144#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000145 PROGRAMMER_INVALID /* This must always be the last entry. */
146};
147
Stefan Tauneraf358d62012-12-27 18:40:26 +0000148enum programmer_type {
149 PCI = 1, /* to detect uninitialized values */
150 USB,
151 OTHER,
152};
153
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000154struct dev_entry {
155 uint16_t vendor_id;
156 uint16_t device_id;
157 const enum test_state status;
158 const char *vendor_name;
159 const char *device_name;
160};
161
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000162struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000163 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000164 const enum programmer_type type;
165 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000166 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000167 const char *const note;
168 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000169
170 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000171
Stefan Tauner305e0b92013-07-17 23:46:44 +0000172 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000173 void (*unmap_flash_region) (void *virt_addr, size_t len);
174
Stefan Taunerf80419c2014-05-02 15:41:42 +0000175 void (*delay) (unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000176};
177
Thomas Heijligendee884e2021-03-31 19:09:44 +0200178extern const struct programmer_entry *const programmer_table[];
Thomas Heijligen113f3bc2021-05-19 13:53:34 +0200179extern const size_t programmer_table_size;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000180
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000181int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000182int programmer_shutdown(void);
183
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000184struct bitbang_spi_master {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000185 /* Note that CS# is active low, so val=0 means the chip is active. */
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +1000186 void (*set_cs) (int val, void *spi_data);
187 void (*set_sck) (int val, void *spi_data);
188 void (*set_mosi) (int val, void *spi_data);
189 int (*get_miso) (void *spi_data);
190 void (*request_bus) (void *spi_data);
191 void (*release_bus) (void *spi_data);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100192 /* optional functions to optimize xfers */
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +1000193 void (*set_sck_set_mosi) (int sck, int mosi, void *spi_data);
194 int (*set_sck_get_miso) (int sck, void *spi_data);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000195 /* Length of half a clock period in usecs. */
196 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000197};
198
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000199#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000200struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000201
202/* pcidev.c */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000203// FIXME: This needs to be local, not global(?)
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000204extern struct pci_access *pacc;
205int pci_init_common(void);
206uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
207struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
208/* rpci_write_* are reversible writes. The original PCI config space register
209 * contents will be restored on shutdown.
Youness Alaouia54ceb12017-07-26 18:03:36 -0400210 * To clone the pci_dev instances internally, the `pacc` global
211 * variable has to reference a pci_access method that is compatible
212 * with the given pci_dev handle. The referenced pci_access (not
213 * the variable) has to stay valid until the shutdown handlers are
214 * finished.
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000215 */
216int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
217int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
218int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
219#endif
220
221#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000222struct penable {
223 uint16_t vendor_id;
224 uint16_t device_id;
Nico Huber2e50cdc2018-09-23 20:20:26 +0200225 enum chipbustype buses;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000226 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000227 const char *vendor_name;
228 const char *device_name;
229 int (*doit) (struct pci_dev *dev, const char *name);
230};
231
232extern const struct penable chipset_enables[];
233
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000234enum board_match_phase {
235 P1,
236 P2,
237 P3
238};
239
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000240struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000241 /* Any device, but make it sensible, like the ISA bridge. */
242 uint16_t first_vendor;
243 uint16_t first_device;
244 uint16_t first_card_vendor;
245 uint16_t first_card_device;
246
247 /* Any device, but make it sensible, like
248 * the host bridge. May be NULL.
249 */
250 uint16_t second_vendor;
251 uint16_t second_device;
252 uint16_t second_card_vendor;
253 uint16_t second_card_device;
254
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000255 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000256 const char *dmi_pattern;
257
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000258 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000259 const char *lb_vendor;
260 const char *lb_part;
261
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000262 enum board_match_phase phase;
263
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000264 const char *vendor_name;
265 const char *board_name;
266
267 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000268 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000269 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000270};
271
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000272extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000273
274struct board_info {
275 const char *vendor;
276 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000277 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000278#ifdef CONFIG_PRINT_WIKI
279 const char *url;
280 const char *note;
281#endif
282};
283
284extern const struct board_info boards_known[];
285extern const struct board_info laptops_known[];
286#endif
287
288/* udelay.c */
Stefan Taunerf80419c2014-05-02 15:41:42 +0000289void myusec_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000290void myusec_calibrate_delay(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000291void internal_sleep(unsigned int usecs);
292void internal_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000293
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000294#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000295/* board_enable.c */
Stefan Tauner600576b2014-06-12 22:57:36 +0000296int selfcheck_board_enables(void);
Jacob Garber1c091d12019-08-12 11:14:14 -0600297int board_parse_parameter(const char *boardstring, char **vendor, char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000298void w836xx_ext_enter(uint16_t port);
299void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000300void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000301int it8705f_write_enable(uint8_t port);
302uint8_t sio_read(uint16_t port, uint8_t reg);
303void sio_write(uint16_t port, uint8_t reg, uint8_t data);
304void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000305void board_handle_before_superio(void);
306void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000307int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000308
309/* chipset_enable.c */
310int chipset_flash_enable(void);
311
312/* processor_enable.c */
313int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000314#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000315
316/* physmap.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000317void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000318void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
Niklas Söderlund5d307202013-09-14 09:02:27 +0000319void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000320void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000321void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000322void physunmap_unaligned(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000323#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000324int setup_cpu_msr(int cpu);
325void cleanup_cpu_msr(void);
326
327/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000328int cb_parse_table(const char **vendor, const char **model);
Nico Huber519be662018-12-23 20:03:35 +0100329int cb_check_image(const uint8_t *bios, unsigned int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000330
331/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000332#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000333extern int has_dmi_support;
334void dmi_init(void);
335int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000336#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000337
338/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000339struct superio {
340 uint16_t vendor;
341 uint16_t port;
342 uint16_t model;
343};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000344extern struct superio superios[];
345extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000346#define SUPERIO_VENDOR_NONE 0x0
347#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000348#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000349#endif
350#if NEED_PCI == 1
Uwe Hermann24c35e42011-07-13 11:22:03 +0000351struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000352struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
353struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
354 uint16_t card_vendor, uint16_t card_device);
355#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000356int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000357#if CONFIG_INTERNAL == 1
358extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000359extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000360extern int force_boardenable;
361extern int force_boardmismatch;
362void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000363int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000364extern enum chipbustype internal_buses_supported;
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200365extern const struct programmer_entry programmer_internal;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000366#endif
367
368/* hwaccess.c */
369void mmio_writeb(uint8_t val, void *addr);
370void mmio_writew(uint16_t val, void *addr);
371void mmio_writel(uint32_t val, void *addr);
Nico Huberb4d8a2a2017-03-17 17:19:15 +0100372uint8_t mmio_readb(const void *addr);
373uint16_t mmio_readw(const void *addr);
374uint32_t mmio_readl(const void *addr);
375void mmio_readn(const void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000376void mmio_le_writeb(uint8_t val, void *addr);
377void mmio_le_writew(uint16_t val, void *addr);
378void mmio_le_writel(uint32_t val, void *addr);
Nico Huberb4d8a2a2017-03-17 17:19:15 +0100379uint8_t mmio_le_readb(const void *addr);
380uint16_t mmio_le_readw(const void *addr);
381uint32_t mmio_le_readl(const void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000382#define pci_mmio_writeb mmio_le_writeb
383#define pci_mmio_writew mmio_le_writew
384#define pci_mmio_writel mmio_le_writel
385#define pci_mmio_readb mmio_le_readb
386#define pci_mmio_readw mmio_le_readw
387#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000388void rmmio_writeb(uint8_t val, void *addr);
389void rmmio_writew(uint16_t val, void *addr);
390void rmmio_writel(uint32_t val, void *addr);
391void rmmio_le_writeb(uint8_t val, void *addr);
392void rmmio_le_writew(uint16_t val, void *addr);
393void rmmio_le_writel(uint32_t val, void *addr);
394#define pci_rmmio_writeb rmmio_le_writeb
395#define pci_rmmio_writew rmmio_le_writew
396#define pci_rmmio_writel rmmio_le_writel
397void rmmio_valb(void *addr);
398void rmmio_valw(void *addr);
399void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000400
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000401/* dummyflasher.c */
402#if CONFIG_DUMMY == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200403extern const struct programmer_entry programmer_dummy;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000404#endif
405
406/* nic3com.c */
407#if CONFIG_NIC3COM == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200408extern const struct programmer_entry programmer_nic3com;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000409#endif
410
411/* gfxnvidia.c */
412#if CONFIG_GFXNVIDIA == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200413extern const struct programmer_entry programmer_gfxnvidia;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000414#endif
415
Edward O'Callaghanad08aef2020-03-02 18:16:14 +1100416/* raiden_debug_spi.c */
Edward O'Callaghan732f2ee2020-11-27 12:54:31 +1100417#if CONFIG_RAIDEN_DEBUG_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200418extern const struct programmer_entry programmer_raiden_debug_spi;
Edward O'Callaghanad08aef2020-03-02 18:16:14 +1100419#endif
420
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000421/* drkaiser.c */
422#if CONFIG_DRKAISER == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200423extern const struct programmer_entry programmer_drkaiser;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000424#endif
425
426/* nicrealtek.c */
427#if CONFIG_NICREALTEK == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200428extern const struct programmer_entry programmer_nicrealtek;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000429#endif
430
431/* nicnatsemi.c */
432#if CONFIG_NICNATSEMI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200433extern const struct programmer_entry programmer_nicnatsemi;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000434#endif
435
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000436/* nicintel.c */
437#if CONFIG_NICINTEL == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200438extern const struct programmer_entry programmer_nicintel;
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000439#endif
440
Idwer Vollering004f4b72010-09-03 18:21:21 +0000441/* nicintel_spi.c */
442#if CONFIG_NICINTEL_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200443extern const struct programmer_entry programmer_nicintel_spi;
Idwer Vollering004f4b72010-09-03 18:21:21 +0000444#endif
445
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000446/* nicintel_eeprom.c */
447#if CONFIG_NICINTEL_EEPROM == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200448extern const struct programmer_entry programmer_nicintel_eeprom;
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000449#endif
450
Mark Marshall90021f22010-12-03 14:48:11 +0000451/* ogp_spi.c */
452#if CONFIG_OGP_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200453extern const struct programmer_entry programmer_ogp_spi;
Mark Marshall90021f22010-12-03 14:48:11 +0000454#endif
455
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000456/* satamv.c */
457#if CONFIG_SATAMV == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200458extern const struct programmer_entry programmer_satamv;
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000459#endif
460
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000461/* satasii.c */
462#if CONFIG_SATASII == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200463extern const struct programmer_entry programmer_satasii;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000464#endif
465
466/* atahpt.c */
467#if CONFIG_ATAHPT == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200468extern const struct programmer_entry programmer_atahpt;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000469#endif
470
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000471/* atavia.c */
472#if CONFIG_ATAVIA == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200473extern const struct programmer_entry programmer_atavia;
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000474#endif
475
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000476/* atapromise.c */
477#if CONFIG_ATAPROMISE == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200478extern const struct programmer_entry programmer_atapromise;
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000479#endif
480
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000481/* it8212.c */
482#if CONFIG_IT8212 == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200483extern const struct programmer_entry programmer_it8212;
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000484#endif
485
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000486/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000487#if CONFIG_FT2232_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200488extern const struct programmer_entry programmer_ft2232_spi;
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000489#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000490
James Lairdc60de0e2013-03-27 13:00:23 +0000491/* usbblaster_spi.c */
492#if CONFIG_USBBLASTER_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200493extern const struct programmer_entry programmer_usbblaster_spi;
James Lairdc60de0e2013-03-27 13:00:23 +0000494#endif
495
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000496/* mstarddc_spi.c */
497#if CONFIG_MSTARDDC_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200498extern const struct programmer_entry programmer_mstarddc_spi;
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000499#endif
500
Justin Chevrier66e554b2015-02-08 21:58:10 +0000501/* pickit2_spi.c */
502#if CONFIG_PICKIT2_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200503extern const struct programmer_entry programmer_pickit2_spi;
Justin Chevrier66e554b2015-02-08 21:58:10 +0000504#endif
505
Miklós Márton324929c2019-08-01 19:14:10 +0200506/* stlinkv3_spi.c */
507#if CONFIG_STLINKV3_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200508extern const struct programmer_entry programmer_stlinkv3_spi;
Miklós Márton324929c2019-08-01 19:14:10 +0200509#endif
510
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000511/* rayer_spi.c */
512#if CONFIG_RAYER_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200513extern const struct programmer_entry programmer_rayer_spi;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000514#endif
515
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000516/* pony_spi.c */
517#if CONFIG_PONY_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200518extern const struct programmer_entry programmer_pony_spi;
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000519#endif
520
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000521/* bitbang_spi.c */
Anastasia Klimchuk30815fc2021-05-31 11:20:01 +1000522int register_spi_bitbang_master(const struct bitbang_spi_master *master, void *spi_data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000523
524/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000525#if CONFIG_BUSPIRATE_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200526extern const struct programmer_entry programmer_buspirate_spi;
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000527#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000528
David Hendricksf9a30552015-05-23 20:30:30 -0700529/* linux_mtd.c */
530#if CONFIG_LINUX_MTD == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200531extern const struct programmer_entry programmer_linux_mtd;
David Hendricksf9a30552015-05-23 20:30:30 -0700532#endif
533
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000534/* linux_spi.c */
535#if CONFIG_LINUX_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200536extern const struct programmer_entry programmer_linux_spi;
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000537#endif
538
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000539/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000540#if CONFIG_DEDIPROG == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200541extern const struct programmer_entry programmer_dediprog;
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000542#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000543
Daniel Thompson45e91a22018-06-04 13:46:29 +0100544/* developerbox_spi.c */
545#if CONFIG_DEVELOPERBOX_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200546extern const struct programmer_entry programmer_developerbox;
Daniel Thompson45e91a22018-06-04 13:46:29 +0100547#endif
548
Urja Rannikko0870b022016-01-31 22:10:29 +0000549/* ch341a_spi.c */
550#if CONFIG_CH341A_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200551extern const struct programmer_entry programmer_ch341a_spi;
Urja Rannikko0870b022016-01-31 22:10:29 +0000552#endif
553
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100554/* digilent_spi.c */
555#if CONFIG_DIGILENT_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200556extern const struct programmer_entry programmer_digilent_spi;
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100557#endif
558
Victor Ding436b4152020-08-19 22:48:19 +1000559/* ene_lpc.c */
560#if CONFIG_ENE_LPC == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200561extern const struct programmer_entry programmer_ene_lpc;
Victor Ding436b4152020-08-19 22:48:19 +1000562#endif
563
Marc Schink3578ec62016-03-17 16:23:03 +0100564/* jlink_spi.c */
565#if CONFIG_JLINK_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200566extern const struct programmer_entry programmer_jlink_spi;
Marc Schink3578ec62016-03-17 16:23:03 +0100567#endif
568
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100569/* ni845x_spi.c */
570#if CONFIG_NI845X_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200571extern const struct programmer_entry programmer_ni845x_spi;
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100572#endif
573
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000574/* flashrom.c */
575struct decode_sizes {
576 uint32_t parallel;
577 uint32_t lpc;
578 uint32_t fwh;
579 uint32_t spi;
580};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000581// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000582extern struct decode_sizes max_rom_decode;
583extern int programmer_may_write;
584extern unsigned long flashbase;
Stefan Tauner9e3a6982014-08-15 17:17:59 +0000585unsigned int count_max_decode_exceedings(const struct flashctx *flash);
Stefan Tauner66652442011-06-26 17:38:17 +0000586char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000587
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000588/* spi.c */
Michael Karcher62797512011-05-11 17:07:02 +0000589#define MAX_DATA_UNSPECIFIED 0
590#define MAX_DATA_READ_UNLIMITED 64 * 1024
591#define MAX_DATA_WRITE_UNLIMITED 256
Nico Huber1cf407b2017-11-10 20:18:23 +0100592
593#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
Nico Huberdc5af542018-12-22 16:54:59 +0100594#define SPI_MASTER_NO_4BA_MODES (1U << 1) /**< Compatibility modes (i.e. extended address
595 register, 4BA mode switch) don't work */
Nico Huber1cf407b2017-11-10 20:18:23 +0100596
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000597struct spi_master {
Nico Huber1cf407b2017-11-10 20:18:23 +0100598 uint32_t features;
Stefan Tauner23e10b82016-01-23 16:16:49 +0000599 unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
600 unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000601 int (*command)(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000602 const unsigned char *writearr, unsigned char *readarr);
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000603 int (*multicommand)(const struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000604
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000605 /* Optimized functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000606 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000607 int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
608 int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Edward O'Callaghanec942502021-01-06 14:10:52 +1100609 void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000610};
611
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000612int default_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000613 const unsigned char *writearr, unsigned char *readarr);
Edward O'Callaghane4ddc362020-04-12 17:27:53 +1000614int default_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000615int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000616int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
617int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7e496852021-05-11 17:38:14 +0200618int register_spi_master(const struct spi_master *mst, void *data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000619
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000620/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000621enum ich_chipset {
622 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000623 CHIPSET_ICH,
624 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000625 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000626 CHIPSET_POULSBO, /* SCH U* */
627 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
628 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000629 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000630 CHIPSET_ICH8,
631 CHIPSET_ICH9,
632 CHIPSET_ICH10,
633 CHIPSET_5_SERIES_IBEX_PEAK,
634 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000635 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000636 CHIPSET_8_SERIES_LYNX_POINT,
Duncan Laurie4095ed72014-08-20 15:39:32 +0000637 CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
Duncan Laurie90eb2262013-03-15 03:12:29 +0000638 CHIPSET_8_SERIES_LYNX_POINT_LP,
639 CHIPSET_8_SERIES_WELLSBURG,
Duncan Laurie823096e2014-08-20 15:39:38 +0000640 CHIPSET_9_SERIES_WILDCAT_POINT,
Nico Huber51205912017-03-17 17:59:54 +0100641 CHIPSET_9_SERIES_WILDCAT_POINT_LP,
Nico Huber93c30692017-03-20 14:25:09 +0100642 CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
David Hendricksa5216362017-08-08 20:02:22 -0700643 CHIPSET_C620_SERIES_LEWISBURG,
Thomas Heijligen5ec84b32019-03-19 17:00:03 +0100644 CHIPSET_300_SERIES_CANNON_POINT,
Matt DeVillierb1f858f2020-08-12 12:48:06 -0500645 CHIPSET_400_SERIES_COMET_POINT,
Angel Pons59e344e2021-05-17 19:08:32 +0200646 CHIPSET_APOLLO_LAKE,
Angel Pons11a35982020-07-10 17:04:10 +0200647 CHIPSET_GEMINI_LAKE,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000648};
649
Stefan Tauner2abab942012-04-27 20:41:23 +0000650/* ichspi.c */
651#if CONFIG_INTERNAL == 1
Nico Huber560111e2017-04-26 12:27:17 +0200652int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
653int via_init_spi(uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000654
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000655/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000656int amd_imc_shutdown(struct pci_dev *dev);
657
David Hendricks4e748392011-02-28 23:58:15 +0000658/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000659int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000660
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000661/* it87spi.c */
662void enter_conf_mode_ite(uint16_t port);
663void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000664void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000665int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000666
David Hendricksf9a30552015-05-23 20:30:30 -0700667#if CONFIG_LINUX_MTD == 1
668/* trivial wrapper to avoid cluttering internal_init() with #if */
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200669static inline int try_mtd(void) { return programmer_linux_mtd.init(); };
David Hendricksf9a30552015-05-23 20:30:30 -0700670#else
671static inline int try_mtd(void) { return 1; };
672#endif
673
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000674/* mcp6x_spi.c */
675int mcp6x_spi_init(int want_spi);
676
Victor Ding821e44c2020-08-18 18:27:26 +1000677/* mec1308.c */
678#if CONFIG_MEC1308 == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200679extern const struct programmer_entry programmer_mec1308;
Victor Ding821e44c2020-08-18 18:27:26 +1000680#endif
681
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000682/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000683int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000684
685/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000686int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000687#endif
688
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000689/* opaque.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000690struct opaque_master {
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000691 int max_data_read;
692 int max_data_write;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000693 /* Specific functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000694 int (*probe) (struct flashctx *flash);
695 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000696 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000697 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Edward O'Callaghanec942502021-01-06 14:10:52 +1100698 void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000699};
Anastasia Klimchuk9309bed2021-05-13 12:28:47 +1000700int register_opaque_master(const struct opaque_master *mst, void *data);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000701
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000702/* programmer.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000703void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000704void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000705void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
706void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000707void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000708uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
709uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
710void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000711struct par_master {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000712 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
713 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
714 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000715 void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000716 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
717 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
718 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
719 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Edward O'Callaghanec942502021-01-06 14:10:52 +1100720 void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000721};
Anastasia Klimchuk6a5db262021-05-21 09:40:58 +1000722int register_par_master(const struct par_master *mst, const enum chipbustype buses, void *data);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000723struct registered_master {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000724 enum chipbustype buses_supported;
Edward O'Callaghan4eef6512021-02-03 11:19:41 +1100725 struct {
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000726 struct par_master par;
727 struct spi_master spi;
728 struct opaque_master opaque;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000729 };
730};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000731extern struct registered_master registered_masters[];
732extern int registered_master_count;
Stefan Tauner5c316f92015-02-08 21:57:52 +0000733int register_master(const struct registered_master *mst);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000734
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000735/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000736#if CONFIG_SERPROG == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200737extern const struct programmer_entry programmer_serprog;
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000738#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000739
740/* serial.c */
Stefan Taunerb0eee9b2015-01-10 09:32:50 +0000741#if IS_WINDOWS
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000742typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000743#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000744#else
745typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000746#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000747#endif
748
749void sp_flush_incoming(void);
Stefan Tauner72587f82016-01-04 03:05:15 +0000750fdtype sp_openserport(char *dev, int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000751extern fdtype sp_fd;
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600752int serialport_config(fdtype fd, int baud);
David Hendricks8bb20212011-06-14 01:35:36 +0000753int serialport_shutdown(void *data);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000754int serialport_write(const unsigned char *buf, unsigned int writecnt);
755int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000756int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000757int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000758
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000759/* Serial port/pin mapping:
760
761 1 CD <-
762 2 RXD <-
763 3 TXD ->
764 4 DTR ->
765 5 GND --
766 6 DSR <-
767 7 RTS ->
768 8 CTS <-
769 9 RI <-
770*/
771enum SP_PIN {
772 PIN_CD = 1,
773 PIN_RXD,
774 PIN_TXD,
775 PIN_DTR,
776 PIN_GND,
777 PIN_DSR,
778 PIN_RTS,
779 PIN_CTS,
780 PIN_RI,
781};
782
783void sp_set_pin(enum SP_PIN pin, int val);
784int sp_get_pin(enum SP_PIN pin);
785
Nico Huber1cf407b2017-11-10 20:18:23 +0100786/* spi_master feature checks */
787static inline bool spi_master_4ba(const struct flashctx *const flash)
788{
789 return flash->mst->buses_supported & BUS_SPI &&
790 flash->mst->spi.features & SPI_MASTER_4BA;
791}
Nico Huberdc5af542018-12-22 16:54:59 +0100792static inline bool spi_master_no_4ba_modes(const struct flashctx *const flash)
793{
794 return flash->mst->buses_supported & BUS_SPI &&
795 flash->mst->spi.features & SPI_MASTER_NO_4BA_MODES;
796}
Nico Huber1cf407b2017-11-10 20:18:23 +0100797
Daniel Thompson1d507a02018-07-12 11:02:28 +0100798/* usbdev.c */
799struct libusb_device_handle;
800struct libusb_context;
801struct libusb_device_handle *usb_dev_get_by_vid_pid_serial(
802 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, const char *serialno);
803struct libusb_device_handle *usb_dev_get_by_vid_pid_number(
804 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, unsigned int num);
805
Shiyu Sun13a2ef62020-03-19 14:37:57 +1100806/* lspcon_i2c_spi.c */
807#if CONFIG_LSPCON_I2C_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200808extern const struct programmer_entry programmer_lspcon_i2c_spi;
Shiyu Sun13a2ef62020-03-19 14:37:57 +1100809#endif
810
Edward O'Callaghand97f87b2020-03-26 00:00:41 +1100811/* realtek_mst_i2c_spi.c */
812#if CONFIG_REALTEK_MST_I2C_SPI == 1
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200813extern const struct programmer_entry programmer_realtek_mst_i2c_spi;
Edward O'Callaghand97f87b2020-03-26 00:00:41 +1100814#endif
815
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000816#endif /* !__PROGRAMMER_H__ */