blob: 4ae7e71bf46a4d58488ab706ec3d6961ace7dad9 [file] [log] [blame]
Stefan Tauner4c723152016-01-14 22:47:55 +00001.\" Load the www device when using groff; provide a fallback for groff's MTO macro that formats email addresses.
2.ie \n[.g] \
3. mso www.tmac
Stefan Tauner0be072c2016-03-13 15:16:30 +00004.el \{
5. de MTO
6 \\$2 \(la\\$1 \(ra\\$3 \
Stefan Tauner4c723152016-01-14 22:47:55 +00007. .
Stefan Tauner0be072c2016-03-13 15:16:30 +00008.\}
Stefan Tauner4c723152016-01-14 22:47:55 +00009.\" Create wrappers for .MTO and .URL that print only text on systems w/o groff or if not outputting to a HTML
10.\" device. To that end we need to distinguish HTML output on groff from other configurations first.
11.nr groffhtml 0
12.if \n[.g] \
13. if "\*[.T]"html" \
14. nr groffhtml 1
15.\" For code reuse it would be nice to have a single wrapper that gets its target macro as parameter.
16.\" However, this did not work out with NetBSD's and OpenBSD's groff...
17.de URLB
18. ie (\n[groffhtml]==1) \{\
19. URL \\$@
20. \}
21. el \{\
22. ie "\\$2"" \{\
23. BR "\\$1" "\\$3"
24. \}
25. el \{\
26. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
27. \}
28. \}
29..
30.de MTOB
31. ie (\n[groffhtml]==1) \{\
32. MTO \\$@
33. \}
34. el \{\
35. ie "\\$2"" \{\
36. BR "\\$1" "\\$3"
37. \}
38. el \{\
39. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
40. \}
41. \}
42..
Richard Hughes7aea04f2020-02-17 09:57:01 +000043.TH FLASHROM 8 "@MAN_DATE@" "@VERSION@" "@MAN_DATE@"
Stefan Reinauer261144c2006-07-27 23:29:02 +000044.SH NAME
Uwe Hermann530cb2d2009-05-14 22:58:21 +000045flashrom \- detect, read, write, verify and erase flash chips
Stefan Reinauer261144c2006-07-27 23:29:02 +000046.SH SYNOPSIS
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100047.B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|
48 \fB\-p\fR <programmername>[:<parameters>] [\fB\-c\fR <chipname>]
Edward O'Callaghan7d6b5262019-09-23 22:53:14 +100049 (\fB\-\-flash\-name\fR|\fB\-\-flash\-size\fR|
Daniel Campello2e993a92021-05-04 11:45:21 -060050 [\fB\-E\fR|\fB\-x\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>]
Daniel Campello45d50a12021-04-13 10:47:25 -060051 [(\fB\-l\fR <file>|\fB\-\-ifd|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>)
52 [\fB\-i\fR <image>[:<file>]]]
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100053 [\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])]
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +000054 [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>]
Stefan Reinauer261144c2006-07-27 23:29:02 +000055.SH DESCRIPTION
56.B flashrom
Uwe Hermanne8ba5382009-05-22 11:37:27 +000057is a utility for detecting, reading, writing, verifying and erasing flash
Uwe Hermann530cb2d2009-05-14 22:58:21 +000058chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
Uwe Hermann941a2732011-07-25 21:12:57 +000059using a supported mainboard. However, it also supports various external
60PCI/USB/parallel-port/serial-port based devices which can program flash chips,
61including some network cards (NICs), SATA/IDE controller cards, graphics cards,
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +000062the Bus Pirate device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more.
Uwe Hermanne74b9f82009-04-10 14:41:29 +000063.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000064It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
Uwe Hermann941a2732011-07-25 21:12:57 +000065TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
66parallel flash, or SPI.
Stefan Reinauer261144c2006-07-27 23:29:02 +000067.SH OPTIONS
Uwe Hermann9ff514d2010-06-07 19:41:25 +000068.B IMPORTANT:
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000069Please note that the command line interface for flashrom will change before
70flashrom 1.0. Do not use flashrom in scripts or other automated tools without
Uwe Hermanne8ba5382009-05-22 11:37:27 +000071checking that your flashrom version won't interpret options in a different way.
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000072.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000073You can specify one of
74.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
75or no operation.
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000076If no operation is specified, flashrom will only probe for flash chips. It is
Michael Karcher31fd8252010-03-12 06:41:39 +000077recommended that if you try flashrom the first time on a system, you run it
Uwe Hermann941a2732011-07-25 21:12:57 +000078in probe-only mode and check the output. Also you are advised to make a
Uwe Hermann9ff514d2010-06-07 19:41:25 +000079backup of your current ROM contents with
80.B \-r
Stefan Taunere34e3e82013-01-01 00:06:51 +000081before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the
82.B -p/--programmer
83option to be used (please see below).
Stefan Reinauerde063bf2006-09-21 13:09:22 +000084.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000085.B "\-r, \-\-read <file>"
86Read flash ROM contents and save them into the given
87.BR <file> .
Uwe Hermann941a2732011-07-25 21:12:57 +000088If the file already exists, it will be overwritten.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000089.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000090.B "\-w, \-\-write <file>"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000091Write
92.B <file>
Uwe Hermann9ff514d2010-06-07 19:41:25 +000093into flash ROM. This will first automatically
94.B erase
95the chip, then write to it.
Stefan Taunerac54fbe2011-07-21 19:52:00 +000096.sp
97In the process the chip is also read several times. First an in-memory backup
98is made for disaster recovery and to be able to skip regions that are
99already equal to the image file. This copy is updated along with the write
100operation. In case of erase errors it is even re-read completely. After
101writing has finished and if verification is enabled, the whole flash chip is
102read out and compared with the input image.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000103.TP
Uwe Hermannea07f622009-06-24 17:31:08 +0000104.B "\-n, \-\-noverify"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000105Skip the automatic verification of flash ROM contents after writing. Using this
Uwe Hermannea07f622009-06-24 17:31:08 +0000106option is
107.B not
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000108recommended, you should only use it if you know what you are doing and if you
Uwe Hermannea07f622009-06-24 17:31:08 +0000109feel that the time for verification takes too long.
110.sp
111Typical usage is:
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000112.B "flashrom \-p prog \-n \-w <file>"
Uwe Hermannea07f622009-06-24 17:31:08 +0000113.sp
114This option is only useful in combination with
115.BR \-\-write .
116.TP
Nico Huber99d15952016-05-02 16:54:24 +0200117.B "\-N, \-\-noverify-all"
118Skip not included regions during automatic verification after writing (cf.
119.BR "\-l " "and " "\-i" ).
120You should only use this option if you are sure that communication with
121the flash chip is reliable (e.g. when using the
122.BR internal
123programmer). Even if flashrom is instructed not to touch parts of the
124flash chip, their contents could be damaged (e.g. due to misunderstood
125erase commands).
126.sp
127This option is required to flash an Intel system with locked ME flash
128region using the
129.BR internal
130programmer. It may be enabled by default in this case in the future.
131.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000132.B "\-v, \-\-verify <file>"
133Verify the flash ROM contents against the given
134.BR <file> .
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000135.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000136.B "\-E, \-\-erase"
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000137Erase the flash ROM chip.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000138.TP
Daniel Campello2e993a92021-05-04 11:45:21 -0600139.B "\-x, \-\-extract"
140Extract every region defined on the layout from flash ROM chip to a
141file with the same name as the extracted region.
142.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000143.B "\-V, \-\-verbose"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000144More verbose output. This option can be supplied multiple times
Stefan Taunereebeb532011-08-04 17:40:25 +0000145(max. 3 times, i.e.
146.BR \-VVV )
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000147for even more debug output.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000148.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000149.B "\-c, \-\-chip" <chipname>
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000150Probe only for the specified flash ROM chip. This option takes the chip name as
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000151printed by
152.B "flashrom \-L"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000153without the vendor name as parameter. Please note that the chip name is
154case sensitive.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000155.TP
Joerg Mayer645c6df2010-03-13 14:47:48 +0000156.B "\-f, \-\-force"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000157Force one or more of the following actions:
Joerg Mayer645c6df2010-03-13 14:47:48 +0000158.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000159* Force chip read and pretend the chip is there.
160.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000161* Force chip access even if the chip is bigger than the maximum supported \
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000162size for the flash bus.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000163.sp
164* Force erase even if erase is known bad.
165.sp
166* Force write even if write is known bad.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000167.TP
168.B "\-l, \-\-layout <file>"
169Read ROM layout from
170.BR <file> .
Uwe Hermann87c07932009-05-05 16:15:46 +0000171.sp
172flashrom supports ROM layouts. This allows you to flash certain parts of
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000173the flash chip only. A ROM layout file contains multiple lines with the
174following syntax:
175.sp
176.B " startaddr:endaddr imagename"
177.sp
178.BR "startaddr " "and " "endaddr "
179are hexadecimal addresses within the ROM file and do not refer to any
180physical address. Please note that using a 0x prefix for those hexadecimal
181numbers is not necessary, but you can't specify decimal/octal numbers.
182.BR "imagename " "is an arbitrary name for the region/image from"
183.BR " startaddr " "to " "endaddr " "(both addresses included)."
184.sp
185Example:
Uwe Hermann87c07932009-05-05 16:15:46 +0000186.sp
187 00000000:00008fff gfxrom
188 00009000:0003ffff normal
189 00040000:0007ffff fallback
190.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000191If you only want to update the image named
192.BR "normal " "in a ROM based on the layout above, run"
Uwe Hermann87c07932009-05-05 16:15:46 +0000193.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000194.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000195.sp
Stefan Taunere34e3e82013-01-01 00:06:51 +0000196To update only the images named
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000197.BR "normal " "and " "fallback" ", run:"
Uwe Hermann87c07932009-05-05 16:15:46 +0000198.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000199.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000200.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000201Overlapping sections are not supported.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000202.TP
Arthur Heymansc82900b2018-01-10 12:48:16 +0100203.B "\-\-fmap"
204Read layout from fmap in flash chip.
205.sp
206flashrom supports the fmap binary format which is commonly used by coreboot
207for partitioning a flash chip. The on-chip fmap will be read and used to generate
208the layout.
209.sp
210If you only want to update the
211.BR "COREBOOT"
212region defined in the fmap, run
213.sp
214.B " flashrom -p prog \-\-fmap \-\-image COREBOOT \-w some.rom"
215.TP
216.B "\-\-fmap-file <file>"
217Read layout from a
218.BR <file>
219containing binary fmap (e.g. coreboot roms).
220.sp
221flashrom supports the fmap binary format which is commonly used by coreboot
222for partitioning a flash chip. The fmap in the specified file will be read and
223used to generate the layout.
224.sp
225If you only want to update the
226.BR "COREBOOT"
227region defined in the binary fmap file, run
228.sp
229.B " flashrom \-p prog \-\-fmap-file some.rom \-\-image COREBOOT \-w some.rom"
230.TP
Nico Huber305f4172013-06-14 11:55:26 +0200231.B "\-\-ifd"
232Read ROM layout from Intel Firmware Descriptor.
233.sp
234flashrom supports ROM layouts given by an Intel Firmware Descriptor
235(IFD). The on-chip descriptor will be read and used to generate the
236layout. If you need to change the layout, you have to update the IFD
237only first.
238.sp
239The following ROM images may be present in an IFD:
240.sp
241 fd the IFD itself
242 bios the host firmware aka. BIOS
243 me Intel Management Engine firmware
244 gbe gigabit ethernet firmware
245 pd platform specific data
246.TP
Daniel Campello45d50a12021-04-13 10:47:25 -0600247.B "\-i, \-\-include <region>[:<file>]"
248Read or write only
249.B <region>
250to or from ROM.
251The
252.B "\-i"
253option may be used multiple times if the user wishes to read or write
254multiple regions using a single command.
255.sp
256The user may optionally specify a corresponding
257.B <file>
258for any region they wish to read or write. A read operation will read the
259corresponding regions from ROM and write individual files for each one. A write
260option will read file(s) and write to the corresponding region(s) in ROM.
261.sp
262For write operations, files specified using
263.B "\-i"
264take precedence over content from the argument to
265.B "\-w."
266.sp
267Examples:
268.sp
269 To read regions named
270.BR "foo " and " bar"
271in layout file
272.B <layout>
273into region-sized files
274.BR "foo.bin " and " bar.bin" ", run:
275.sp
276.B " flashrom \-p prog \-l <layout> \-i foo:foo.bin -i bar:bar.bin -r rom.bin
277.sp
278 To write files
279.BR "foo.bin " and " bar.bin"
280into regions named
281.BR "foo " and " bar" " in layout file
282.BR <layout>
283to the ROM, run:
284.sp
285.B " flashrom \-p prog \-l <layout> \-i foo:foo.bin -i bar:bar.bin -w rom.bin
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000286.TP
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +1000287.B "\-\-flash\-name"
288Prints out the detected flash chips name.
289.TP
Edward O'Callaghan7d6b5262019-09-23 22:53:14 +1000290.B "\-\-flash\-size"
291Prints out the detected flash chips size.
292.TP
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000293.B "\-L, \-\-list\-supported"
Uwe Hermann941a2732011-07-25 21:12:57 +0000294List the flash chips, chipsets, mainboards, and external programmers
295(including PCI, USB, parallel port, and serial port based devices)
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000296supported by flashrom.
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000297.sp
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000298There are many unlisted boards which will work out of the box, without
299special support in flashrom. Please let us know if you can verify that
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000300other boards work or do not work out of the box.
301.sp
302.B IMPORTANT:
303For verification you have
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000304to test an ERASE and/or WRITE operation, so make sure you only do that
305if you have proper means to recover from failure!
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000306.TP
Uwe Hermann20a293f2009-06-19 10:42:43 +0000307.B "\-z, \-\-list\-supported-wiki"
308Same as
309.BR \-\-list\-supported ,
310but outputs the supported hardware in MediaWiki syntax, so that it can be
Stefan Tauner4c723152016-01-14 22:47:55 +0000311easily pasted into the
312.URLB https://flashrom.org/Supported_hardware "supported hardware wiki page" .
Uwe Hermann941a2732011-07-25 21:12:57 +0000313Please note that MediaWiki output is not compiled in by default.
Uwe Hermann20a293f2009-06-19 10:42:43 +0000314.TP
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000315.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000316Specify the programmer device. This is mandatory for all operations
317involving any chip access (probe/read/write/...). Currently supported are:
Carl-Daniel Hailfingerce986772009-05-09 00:27:07 +0000318.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000319.BR "* internal" " (for in-system flashing in the mainboard)"
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000320.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000321.BR "* dummy" " (virtual programmer for testing flashrom)"
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000322.sp
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000323.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
324.sp
Sergey Lichack98f47102012-08-27 01:24:15 +0000325.BR "* nicrealtek" " (for flash ROMs on Realtek and SMC 1211 network cards)"
Uwe Hermann829ed842010-05-24 17:39:14 +0000326.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000327.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
328cards)"
329.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000330.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000331.sp
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000332.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
333.sp
TURBO Jb0912c02009-09-02 23:00:46 +0000334.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
335.sp
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000336.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
337.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000338.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
339.sp
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000340.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
341.sp
Stefan Tauner4f094752014-06-01 22:36:30 +0000342.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)"
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000343.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000344.BR "* atapromise" " (for flash ROMs on Promise PDC2026x ATA/RAID controllers)"
345.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000346.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)"
347.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000348.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer).
Paul Fox05dfbe62009-06-16 21:08:06 +0000349.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000350.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog, \
Stefan Tauner0be072c2016-03-13 15:16:30 +0000351including some Arduino-based devices)."
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000352.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000353.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000354.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000355.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
356.sp
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000357.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000358.sp
Michael Karchere5449392012-05-05 20:53:59 +0000359.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
360bitbanging adapter)
361.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000362.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
Idwer Vollering004f4b72010-09-03 18:21:21 +0000363.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000364.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
Mark Marshall90021f22010-12-03 14:48:11 +0000365.sp
David Hendricksf9a30552015-05-23 20:30:30 -0700366.BR "* linux_mtd" " (for SPI flash ROMs accessible via /dev/mtdX on Linux)"
367.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000368.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
369.sp
James Lairdc60de0e2013-03-27 13:00:23 +0000370.BR "* usbblaster_spi" " (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)"
371.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000372.BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)"
373.sp
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000374.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)"
375.sp
Justin Chevrier66e554b2015-02-08 21:58:10 +0000376.BR "* pickit2_spi" " (for SPI flash ROMs accessible via Microchip PICkit2)"
377.sp
Urja Rannikko0870b022016-01-31 22:10:29 +0000378.BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)"
379.sp
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100380.BR "* digilent_spi" " (for SPI flash ROMs attached to iCEblink40 development boards)"
381.sp
Marc Schink3578ec62016-03-17 16:23:03 +0100382.BR "* jlink_spi" " (for SPI flash ROMs attached to SEGGER J-Link and compatible devices)"
383.sp
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100384.BR "* ni845x_spi" " (for SPI flash ROMs attached to National Instruments USB-8451 or USB-8452)"
385.sp
Miklós Márton324929c2019-08-01 19:14:10 +0200386.BR "* stlinkv3_spi" " (for SPI flash ROMs attached to STMicroelectronics STLINK V3 devices)"
387.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000388Some programmers have optional or mandatory parameters which are described
389in detail in the
Stefan Tauner6697f712014-08-06 15:09:15 +0000390.B PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000391section. Support for some programmers can be disabled at compile time.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000392.B "flashrom \-h"
Michael Karchere5eafb22010-03-07 12:11:08 +0000393lists all supported programmers.
394.TP
395.B "\-h, \-\-help"
396Show a help text and exit.
397.TP
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000398.B "\-o, \-\-output <logfile>"
399Save the full debug log to
400.BR <logfile> .
401If the file already exists, it will be overwritten. This is the recommended
402way to gather logs from flashrom because they will be verbose even if the
Stefan Tauner6697f712014-08-06 15:09:15 +0000403on-screen messages are not verbose and don't require output redirection.
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000404.TP
Michael Karchere5eafb22010-03-07 12:11:08 +0000405.B "\-R, \-\-version"
406Show version information and exit.
Stefan Tauner6697f712014-08-06 15:09:15 +0000407.SH PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000408Some programmer drivers accept further parameters to set programmer-specific
Uwe Hermann4e3d0b32010-03-25 23:18:41 +0000409parameters. These parameters are separated from the programmer name by a
Michael Karchere5eafb22010-03-07 12:11:08 +0000410colon. While some programmers take arguments at fixed positions, other
411programmers use a key/value interface in which the key and value is separated
412by an equal sign and different pairs are separated by a comma or a colon.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000413.SS
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000414.BR "internal " programmer
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000415.TP
416.B Board Enables
417.sp
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000418Some mainboards require to run mainboard specific code to enable flash erase
419and write support (and probe support on old systems with parallel flash).
420The mainboard brand and model (if it requires specific code) is usually
421autodetected using one of the following mechanisms: If your system is
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000422running coreboot, the mainboard type is determined from the coreboot table.
423Otherwise, the mainboard is detected by examining the onboard PCI devices
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000424and possibly DMI info. If PCI and DMI do not contain information to uniquely
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000425identify the mainboard (which is the exception), or if you want to override
426the detected mainboard model, you can specify the mainboard using the
427.sp
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000428.B " flashrom \-p internal:mainboard=<vendor>:<board>"
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000429syntax.
430.sp
431See the 'Known boards' or 'Known laptops' section in the output
432of 'flashrom \-L' for a list of boards which require the specification of
433the board name, if no coreboot table is found.
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000434.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000435Some of these board-specific flash enabling functions (called
436.BR "board enables" )
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000437in flashrom have not yet been tested. If your mainboard is detected needing
438an untested board enable function, a warning message is printed and the
439board enable is not executed, because a wrong board enable function might
440cause the system to behave erratically, as board enable functions touch the
441low-level internals of a mainboard. Not executing a board enable function
442(if one is needed) might cause detection or erasing failure. If your board
443protects only part of the flash (commonly the top end, called boot block),
444flashrom might encounter an error only after erasing the unprotected part,
445so running without the board-enable function might be dangerous for erase
446and write (which includes erase).
447.sp
448The suggested procedure for a mainboard with untested board specific code is
449to first try to probe the ROM (just invoke flashrom and check that it
450detects your flash chip type) without running the board enable code (i.e.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000451without any parameters). If it finds your chip, fine. Otherwise, retry
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000452probing your chip with the board-enable code running, using
453.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000454.B " flashrom \-p internal:boardenable=force"
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000455.sp
456If your chip is still not detected, the board enable code seems to be broken
457or the flash chip unsupported. Otherwise, make a backup of your current ROM
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000458contents (using
459.BR \-r )
460and store it to a medium outside of your computer, like
461a USB drive or a network share. If you needed to run the board enable code
Stefan Taunereb582572012-09-21 12:52:50 +0000462already for probing, use it for reading too.
463If reading succeeds and the contens of the read file look legit you can try to write the new image.
464You should enable the board enable code in any case now, as it
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000465has been written because it is known that writing/erasing without the board
466enable is going to fail. In any case (success or failure), please report to
467the flashrom mailing list, see below.
468.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000469.TP
470.B Coreboot
471.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000472On systems running coreboot, flashrom checks whether the desired image matches
473your mainboard. This needs some special board ID to be present in the image.
474If flashrom detects that the image you want to write and the current board
475do not match, it will refuse to write the image unless you specify
476.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000477.B " flashrom \-p internal:boardmismatch=force"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000478.TP
479.B ITE IT87 Super I/O
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000480.sp
Vadim Girlin4dd0f902013-08-24 12:18:17 +0000481If your mainboard is manufactured by GIGABYTE and supports DualBIOS it is very likely that it uses an
482ITE IT87 series Super I/O to switch between the two flash chips. Only one of them can be accessed at a time
483and you can manually select which one to use with the
484.sp
485.B " flashrom \-p internal:dualbiosindex=chip"
486.sp
487syntax where
488.B chip
489is the index of the chip to use (0 = main, 1 = backup). You can check which one is currently selected by
490leaving out the
491.B chip
492parameter.
493.sp
Carl-Daniel Hailfinger01f3ef42010-03-25 02:50:40 +0000494If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000495translation, flashrom should autodetect that configuration. If you want to
496set the I/O base port of the IT87 series SPI controller manually instead of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000497using the value provided by the BIOS, use the
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000498.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000499.B " flashrom \-p internal:it87spiport=portnum"
500.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000501syntax where
502.B portnum
503is the I/O port number (must be a multiple of 8). In the unlikely case
504flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
505report so we can diagnose the problem.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000506.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000507.TP
Rudolf Marek70e14592013-07-25 22:58:56 +0000508.B AMD chipsets
509.sp
510Beginning with the SB700 chipset there is an integrated microcontroller (IMC) based on the 8051 embedded in
511every AMD southbridge. Its firmware resides in the same flash chip as the host's which makes writing to the
512flash risky if the IMC is active. Flashrom tries to temporarily disable the IMC but even then changing the
513contents of the flash can have unwanted effects: when the IMC continues (at the latest after a reboot) it will
514continue executing code from the flash. If the code was removed or changed in an unfortunate way it is
515unpredictable what the IMC will do. Therefore, if flashrom detects an active IMC it will disable write support
516unless the user forces it with the
517.sp
518.B " flashrom \-p internal:amd_imc_force=yes"
519.sp
520syntax. The user is responsible for supplying a suitable image or leaving out the IMC region with the help of
521a layout file. This limitation might be removed in the future when we understand the details better and have
522received enough feedback from users. Please report the outcome if you had to use this option to write a chip.
523.sp
Stefan Tauner21071b02014-05-16 21:39:48 +0000524An optional
525.B spispeed
526parameter specifies the frequency of the SPI bus where applicable (i.e.\& SB600 or later with an SPI flash chip
527directly attached to the chipset).
528Syntax is
529.sp
530.B " flashrom \-p internal:spispeed=frequency"
531.sp
532where
533.B frequency
534can be
535.BR "'16.5\ MHz'" ", " "'22\ MHz'" ", " "'33\ MHz'" ", " "'66\ MHz'" ", " "'100\ MHZ'" ", or " "'800\ kHz'" "."
536Support of individual frequencies depends on the generation of the chipset:
537.sp
538* SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
539.sp
Rob Barnes703de982020-01-21 09:10:51 -0700540-The default is to use 16.5 MHz and disable Fast Reads.
541.sp
Stefan Tauner21071b02014-05-16 21:39:48 +0000542* SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
543.sp
Rob Barnes703de982020-01-21 09:10:51 -0700544-The default is to use 16.5 MHz and disable Fast Reads.
545.sp
Stefan Tauner21071b02014-05-16 21:39:48 +0000546* Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them
547.sp
Rob Barnes703de982020-01-21 09:10:51 -0700548-The default is to use the frequency that is currently configured.
549.sp
550An optional
551.B spireadmode
552parameter specifies the read mode of the SPI bus where applicable (Bolton or later).
553Syntax is
554.sp
555.B " flashrom \-p internal:spireadmode=mode"
556.sp
557where
558.B mode
559can be
560.BR "'Normal\ (up\ to\ 33 MHz)'" ", " "'Normal\ (up\ to\ 66 MHz)'" ", " "'Dual\ IO\ (1-1-2)'" ", " "'Quad\ IO\ (1-1-4)'" ", " "'Dual\ IO\ (1-2-2)'" ", " "'Quad\ IO\ (1-4-4)'" ", or " "'Fast\ Read'" "."
561.sp
562The default is to use the read mode that is currently configured.
Rudolf Marek70e14592013-07-25 22:58:56 +0000563.TP
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000564.B Intel chipsets
565.sp
Stefan Tauner50e7c602011-11-08 10:55:54 +0000566If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
Stefan Taunereb582572012-09-21 12:52:50 +0000567attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the
Stefan Tauner50e7c602011-11-08 10:55:54 +0000568chipset provides an alternative way to access the flash chip(s) named
569.BR "Hardware Sequencing" .
570It is much simpler than the normal access method (called
571.BR "Software Sequencing" "),"
572but does not allow the software to choose the SPI commands to be sent.
573You can use the
574.sp
575.B " flashrom \-p internal:ich_spi_mode=value"
576.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000577syntax where
578.BR "value " "can be"
Stefan Tauner50e7c602011-11-08 10:55:54 +0000579.BR auto ", " swseq " or " hwseq .
580By default
581.RB "(or when setting " ich_spi_mode=auto )
Stefan Taunereb582572012-09-21 12:52:50 +0000582the module tries to use swseq and only activates hwseq if need be (e.g.\& if
Stefan Tauner50e7c602011-11-08 10:55:54 +0000583important opcodes are inaccessible due to lockdown; or if more than one flash
584chip is attached). The other options (swseq, hwseq) select the respective mode
585(if possible).
586.sp
Stefan Tauner5210e722012-02-16 01:13:00 +0000587ICH8 and later southbridges may also have locked address ranges of different
588kinds if a valid descriptor was written to it. The flash address space is then
589partitioned in multiple so called "Flash Regions" containing the host firmware,
590the ME firmware and so on respectively. The flash descriptor can also specify up
591to 5 so called "Protected Regions", which are freely chosen address ranges
592independent from the aforementioned "Flash Regions". All of them can be write
Nico Huber7590d1a2016-05-03 13:38:28 +0200593and/or read protected individually.
Stefan Tauner5210e722012-02-16 01:13:00 +0000594.sp
Kyösti Mälkki88ee0402013-09-14 23:37:01 +0000595If you have an Intel chipset with an ICH2 or later southbridge and if you want
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000596to set specific IDSEL values for a non-default flash chip or an embedded
597controller (EC), you can use the
598.sp
599.B " flashrom \-p internal:fwh_idsel=value"
600.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000601syntax where
602.B value
603is the 48-bit hexadecimal raw value to be written in the
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000604IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
605each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
606use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
607The rightmost hex digit corresponds with the lowest address range. All address
608ranges have a corresponding sister range 4 MB below with identical IDSEL
609settings. The default value for ICH7 is given in the example below.
610.sp
611Example:
612.B "flashrom \-p internal:fwh_idsel=0x001122334567"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000613.TP
614.B Laptops
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000615.sp
Nico Huber2e50cdc2018-09-23 20:20:26 +0200616Using flashrom on older laptops that don't boot from the SPI bus is
617dangerous and may easily make your hardware unusable (see also the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000618.B BUGS
Nico Huber2e50cdc2018-09-23 20:20:26 +0200619section). The embedded controller (EC) in some
620machines may interact badly with flashing.
Stefan Tauner4c723152016-01-14 22:47:55 +0000621More information is
622.URLB https://flashrom.org/Laptops "in the wiki" .
Nico Huber2e50cdc2018-09-23 20:20:26 +0200623Problems occur when the flash chip is shared between BIOS
624and EC firmware, and the latter does not expect flashrom
625to access the chip. While flashrom tries to change the contents of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000626that memory the EC might need to fetch new instructions or data from it and
627could stop working correctly. Probing for and reading from the chip may also
628irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
Nico Huber2e50cdc2018-09-23 20:20:26 +0200629other nasty effects. flashrom will attempt to detect if it is running on such a
630laptop and limit probing to SPI buses. If you want to probe the LPC bus
631anyway at your own risk, use
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000632.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000633.B " flashrom \-p internal:laptop=force_I_want_a_brick"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000634.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000635We will not help you if you force flashing on a laptop because this is a really
636dumb idea.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000637.sp
638You have been warned.
639.sp
640Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
641laptops. Some vendors did not implement those bits correctly or set them to
Nico Huber2e50cdc2018-09-23 20:20:26 +0200642generic and/or dummy values. flashrom will then issue a warning and restrict
643buses like above. In this case you can use
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000644.sp
645.B " flashrom \-p internal:laptop=this_is_not_a_laptop"
646.sp
Stefan Tauner6697f712014-08-06 15:09:15 +0000647to tell flashrom (at your own risk) that it is not running on a laptop.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000648.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000649.BR "dummy " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000650.IP
651The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various
652aspects of flashrom and is mainly used in development and while debugging.
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000653It is able to emulate some chips to a certain degree (basic
654identify/read/erase/write operations work).
655.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000656An optional parameter specifies the bus types it
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000657should support. For that you have to use the
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000658.sp
659.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
660.sp
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000661syntax where
662.B type
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000663can be
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000664.BR parallel ", " lpc ", " fwh ", " spi
665in any order. If you specify bus without type, all buses will be disabled.
666If you do not specify bus, all buses will be enabled.
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000667.sp
668Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000669.B "flashrom \-p dummy:bus=lpc+fwh"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000670.sp
671The dummy programmer supports flash chip emulation for automated self-tests
672without hardware access. If you want to emulate a flash chip, use the
673.sp
674.B " flashrom \-p dummy:emulate=chip"
675.sp
676syntax where
677.B chip
678is one of the following chips (please specify only the chip name, not the
679vendor):
680.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000681.RB "* ST " M25P10.RES " SPI flash chip (128 kB, RES, page write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000682.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000683.RB "* SST " SST25VF040.REMS " SPI flash chip (512 kB, REMS, byte write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000684.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000685.RB "* SST " SST25VF032B " SPI flash chip (4096 kB, RDID, AAI write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000686.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000687.RB "* Macronix " MX25L6436 " SPI flash chip (8192 kB, RDID, SFDP)"
Stefan Tauner0b9df972012-05-07 22:12:16 +0000688.sp
Namyoon Woof7a08a82020-10-17 20:25:15 -0700689.RB "* Dummy vendor " VARIABLE_SIZE " SPI flash chip (configurable size, page write)"
690.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000691Example:
692.B "flashrom -p dummy:emulate=SST25VF040.REMS"
Namyoon Woof7a08a82020-10-17 20:25:15 -0700693.sp
694To use
695.B VARIABLE_SIZE
696chip,
697.B size
698must be specified to configure the size of the flash chip as a power of two.
699.sp
700Example:
701.B "flashrom -p dummy:emulate=VARIABLE_SIZE,size=16777216,image=dummy.bin"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000702.TP
703.B Persistent images
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000704.sp
705If you use flash chip emulation, flash image persistence is available as well
706by using the
707.sp
708.B " flashrom \-p dummy:emulate=chip,image=image.rom"
709.sp
710syntax where
711.B image.rom
712is the file where the simulated chip contents are read on flashrom startup and
713where the chip contents on flashrom shutdown are written to.
714.sp
715Example:
716.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000717.TP
718.B SPI write chunk size
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000719.sp
720If you use SPI flash chip emulation for a chip which supports SPI page write
721with the default opcode, you can set the maximum allowed write chunk size with
722the
723.sp
724.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
725.sp
726syntax where
727.B size
Stefan Taunereb582572012-09-21 12:52:50 +0000728is the number of bytes (min.\& 1, max.\& 256).
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000729.sp
730Example:
731.sp
732.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000733.TP
734.B SPI blacklist
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000735.sp
736To simulate a programmer which refuses to send certain SPI commands to the
737flash chip, you can specify a blacklist of SPI commands with the
738.sp
739.B " flashrom -p dummy:spi_blacklist=commandlist"
740.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000741syntax where
742.B commandlist
743is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000744SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000745controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
746commandlist may be up to 512 characters (256 commands) long.
747Implementation note: flashrom will detect an error during command execution.
748.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000749.TP
750.B SPI ignorelist
751.sp
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000752To simulate a flash chip which ignores (doesn't support) certain SPI commands,
753you can specify an ignorelist of SPI commands with the
754.sp
755.B " flashrom -p dummy:spi_ignorelist=commandlist"
756.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000757syntax where
758.B commandlist
759is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000760SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000761command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
762characters (256 commands) long.
763Implementation note: flashrom won't detect an error during command execution.
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000764.sp
765.TP
766.B SPI status register
767.sp
768You can specify the initial content of the chip's status register with the
769.sp
770.B " flashrom -p dummy:spi_status=content"
771.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000772syntax where
773.B content
774is an 8-bit hexadecimal value.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000775.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000776.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000777, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000778, " satamv" , " atahpt", " atavia ", " atapromise " and " it8212 " programmers
Stefan Tauner4c723152016-01-14 22:47:55 +0000779.IP
Michael Karchere5eafb22010-03-07 12:11:08 +0000780These programmers have an option to specify the PCI address of the card
781your want to use, which must be specified if more than one card supported
782by the selected programmer is installed in your system. The syntax is
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000783.sp
784.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
785.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000786where
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000787.B xxxx
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000788is the name of the programmer,
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000789.B bb
790is the PCI bus number,
791.B dd
792is the PCI device number, and
793.B f
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000794is the PCI function number of the desired device.
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000795.sp
796Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000797.B "flashrom \-p nic3com:pci=05:04.0"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000798.SS
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000799.BR "atavia " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000800.IP
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000801Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the
802.sp
803.B " flashrom \-p atavia:offset=addr"
804.sp
805syntax where
806.B addr
807will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal).
808For more information please see
Stefan Tauner4c723152016-01-14 22:47:55 +0000809.URLB https://flashrom.org/VT6421A "its wiki page" .
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000810.SS
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000811.BR "atapromise " programmer
812.IP
813This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip. This stems
814from the fact that, on the tested device (a Promise Ultra100), not all of the chip's address lines were
815actually connected. You may use this programmer to flash firmware updates, since these are only 16 kB in
816size (padding to 32 kB is required).
817.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000818.BR "nicintel_eeprom " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000819.IP
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000820This is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs
821mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEPROMs normally do not announce their
Stefan Tauner0be072c2016-03-13 15:16:30 +0000822size nor allow themselves to be identified, the controller relies on correct size values written to predefined
823addresses within the chip. Flashrom follows this scheme but assumes the minimum size of 16 kB (128 kb) if an
824unprogrammed EEPROM/card is detected. Intel specifies following EEPROMs to be compatible:
825Atmel AT25128, AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128.
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000826.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000827.BR "ft2232_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000828.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000829This module supports various programmers based on FTDI FT2232/FT4232H/FT232H chips including the DLP Design
830DLP-USB1232H, openbiosprog-spi, Amontec JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster,
831Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, OpenMoko Neo1973 Debug board (V2+), TIAO/DIYGADGET USB
Russ Dill7bd31a42019-10-30 00:40:43 -0700832Multi-Protocol Adapter (TUMPA), TUMPA Lite, GOEPEL PicoTAP, Google Servo v1/v2 and Tin Can Tools
833Flyswatter/Flyswatter 2.
Stefan Tauner0be072c2016-03-13 15:16:30 +0000834.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000835An optional parameter specifies the controller
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300836type, channel/interface/port and GPIO-based chip select it should support. For that you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000837.sp
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300838.B " flashrom \-p ft2232_spi:type=model,port=interface,csgpiol=gpio"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000839.sp
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000840syntax where
841.B model
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000842can be
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +0000843.BR 2232H ", " 4232H ", " 232H ", " jtagkey ", " busblaster ", " openmoko ", " \
Uwe Hermann836b26a2011-10-14 20:33:14 +0000844arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
Todd Broch6800c952016-02-14 15:46:00 +0000845", " tumpa ", " tumpalite ", " picotap ", " google-servo ", " google-servo-v2 \
846" or " google-servo-v2-legacy
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000847.B interface
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000848can be
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300849.BR A ", " B ", " C ", or " D
850and
851.B csgpiol
852can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly.
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000853The default model is
854.B 4232H
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300855the default interface is
856.BR A
857and GPIO is not used by default.
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000858.sp
Shik Chen14fbc4b2012-09-17 00:40:54 +0000859If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by
860specifying its serial number with the
861.sp
862.B " flashrom \-p ft2232_spi:serial=number"
863.sp
864syntax where
865.B number
866is the serial number of the device (which can be found for example in the output of lsusb -v).
867.sp
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000868All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The
Stefan Tauner0554ca52013-07-25 22:54:25 +0000869expressible divisors are all
870.B even
871numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of
Samir Ibradžićb482c6d2012-05-15 22:58:19 +00008726 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by
873specifying the optional
874.B divisor
875parameter with the
876.sp
877.B " flashrom \-p ft2232_spi:divisor=div"
878.sp
879syntax.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000880.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000881.BR "serprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000882.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000883This module supports all programmers speaking the serprog protocol. This includes some Arduino-based devices
884as well as various programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi Zhang and many others.
885.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000886A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for
887communicating with the programmer.
888The device/baud combination has to start with
889.B dev=
890and separate the optional baud rate with a colon.
891For example
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000892.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000893.B " flashrom \-p serprog:dev=/dev/ttyS0:115200"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000894.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000895If no baud rate is given the default values by the operating system/hardware will be used.
896For IP connections you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000897.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000898.B " flashrom \-p serprog:ip=ipaddr:port"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000899.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000900syntax.
901In case the device supports it, you can set the SPI clock frequency with the optional
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000902.B spispeed
Stefan Tauner0554ca52013-07-25 22:54:25 +0000903parameter. The frequency is parsed as hertz, unless an
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000904.BR M ", or " k
905suffix is given, then megahertz or kilohertz are used respectively.
906Example that sets the frequency to 2 MHz:
907.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +0000908.B " flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M"
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000909.sp
910More information about serprog is available in
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000911.B serprog-protocol.txt
912in the source distribution.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000913.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000914.BR "buspirate_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000915.IP
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000916A required
917.B dev
918parameter specifies the Bus Pirate device node and an optional
919.B spispeed
920parameter specifies the frequency of the SPI bus. The parameter
Michael Karchere5eafb22010-03-07 12:11:08 +0000921delimiter is a comma. Syntax is
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000922.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000923.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
Michael Karchere5eafb22010-03-07 12:11:08 +0000924.sp
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000925where
926.B frequency
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000927can be
928.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
Michael Karchere5eafb22010-03-07 12:11:08 +0000929(in Hz). The default is the maximum frequency of 8 MHz.
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000930.sp
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600931The baud rate for communication between the host and the Bus Pirate can be specified with the optional
932.B serialspeed
933parameter. Syntax is
934.sp
935.B " flashrom -p buspirate_spi:serialspeed=baud
936.sp
937where
938.B baud
939can be
940.BR 115200 ", " 230400 ", " 250000 " or " 2000000 " (" 2M ")."
941The default is 2M baud for Bus Pirate hardware version 3.0 and greater, and 115200 otherwise.
942.sp
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000943An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be
944needed if you are working with a flash ROM chip that you have physically removed from the board. Syntax is
945.sp
946.B " flashrom -p buspirate_spi:pullups=state"
947.sp
948where
949.B state
950can be
951.BR on " or " off .
Stefan Tauner4c723152016-01-14 22:47:55 +0000952More information about the Bus Pirate pull-up resistors and their purpose is available
953.URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistors" \
954"in a guide by dangerousprototypes" .
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000955Only the external supply voltage (Vpu) is supported as of this writing.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000956.SS
Justin Chevrier66e554b2015-02-08 21:58:10 +0000957.BR "pickit2_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000958.IP
Justin Chevrier66e554b2015-02-08 21:58:10 +0000959An optional
960.B voltage
961parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified.
962You can use
963.BR mV ", " millivolt ", " V " or " Volt
964as unit specifier. Syntax is
965.sp
966.B " flashrom \-p pickit2_spi:voltage=value"
967.sp
968where
969.B value
970can be
971.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
972or the equivalent in mV.
973.sp
974An optional
975.B spispeed
976parameter specifies the frequency of the SPI bus. Syntax is
977.sp
978.B " flashrom \-p pickit2_spi:spispeed=frequency"
979.sp
980where
981.B frequency
982can be
983.BR 250k ", " 333k ", " 500k " or " 1M "
984(in Hz). The default is a frequency of 1 MHz.
985.SS
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000986.BR "dediprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000987.IP
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000988An optional
989.B voltage
990parameter specifies the voltage the Dediprog should use. The default unit is
991Volt if no unit is specified. You can use
992.BR mV ", " milliVolt ", " V " or " Volt
993as unit specifier. Syntax is
994.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000995.B " flashrom \-p dediprog:voltage=value"
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000996.sp
997where
998.B value
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000999can be
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +00001000.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
1001or the equivalent in mV.
Nathan Laredo21541a62012-12-24 22:07:36 +00001002.sp
1003An optional
1004.B device
1005parameter specifies which of multiple connected Dediprog devices should be used.
1006Please be aware that the order depends on libusb's usb_get_busses() function and that the numbering starts
1007at 0.
1008Usage example to select the second device:
1009.sp
1010.B " flashrom \-p dediprog:device=1"
Nico Huber77fa67d2013-02-20 18:03:36 +00001011.sp
1012An optional
1013.B spispeed
Patrick Georgiefe2d432013-05-23 21:47:46 +00001014parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer.
1015Syntax is
Nico Huber77fa67d2013-02-20 18:03:36 +00001016.sp
1017.B " flashrom \-p dediprog:spispeed=frequency"
1018.sp
1019where
1020.B frequency
1021can be
1022.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M
1023(in Hz). The default is a frequency of 12 MHz.
Stefan Taunere659d2d2013-05-03 21:58:28 +00001024.sp
1025An optional
1026.B target
1027parameter specifies which target chip should be used. Syntax is
1028.sp
1029.B " flashrom \-p dediprog:target=value"
1030.sp
1031where
1032.B value
1033can be
1034.BR 1 " or " 2
Stefan Tauner6697f712014-08-06 15:09:15 +00001035to select target chip 1 or 2 respectively. The default is target chip 1.
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001036.SS
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001037.BR "rayer_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001038.IP
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +00001039The default I/O base address used for the parallel port is 0x378 and you can use
1040the optional
1041.B iobase
1042parameter to specify an alternate base I/O address with the
1043.sp
1044.B " flashrom \-p rayer_spi:iobase=baseaddr"
1045.sp
1046syntax where
1047.B baseaddr
1048is base I/O port address of the parallel port, which must be a multiple of
1049four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
1050.sp
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +00001051The default cable type is the RayeR cable. You can use the optional
1052.B type
1053parameter to specify the cable type with the
1054.sp
1055.B " flashrom \-p rayer_spi:type=model"
1056.sp
1057syntax where
1058.B model
1059can be
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +00001060.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \
Stefan Taunerfdb16592016-02-28 17:04:38 +00001061STK200/300, " wiggler " for the Macraigor Wiggler, " xilinx " for the Xilinx Parallel Cable III (DLC 5), or" \
1062" spi_tt" " for SPI Tiny Tools-compatible hardware.
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +00001063.sp
1064More information about the RayeR hardware is available at
Stefan Tauner23e10b82016-01-23 16:16:49 +00001065.nh
Stefan Tauner4c723152016-01-14 22:47:55 +00001066.URLB "http://rayer.g6.cz/elektro/spipgm.htm" "RayeR's website" .
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +00001067The Altera ByteBlasterMV datasheet can be obtained from
Stefan Tauner4c723152016-01-14 22:47:55 +00001068.URLB "http://www.altera.co.jp/literature/ds/dsbytemv.pdf" Altera .
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +00001069For more information about the Macraigor Wiggler see
Stefan Tauner4c723152016-01-14 22:47:55 +00001070.URLB "http://www.macraigor.com/wiggler.htm" "their company homepage" .
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +00001071The schematic of the Xilinx DLC 5 was published in
Stefan Tauner4c723152016-01-14 22:47:55 +00001072.URLB "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf" "a Xilinx user guide" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001073.SS
Michael Karchere5449392012-05-05 20:53:59 +00001074.BR "pony_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001075.IP
Michael Karchere5449392012-05-05 20:53:59 +00001076The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
1077specified using the mandatory
Stefan Taunere34e3e82013-01-01 00:06:51 +00001078.B dev
Michael Karchere5449392012-05-05 20:53:59 +00001079parameter. The adapter type is selectable between SI-Prog (used for
1080SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer
1081named "serbang". The optional
Stefan Taunere34e3e82013-01-01 00:06:51 +00001082.B type
Michael Karchere5449392012-05-05 20:53:59 +00001083parameter accepts the values "si_prog" (default) or "serbang".
1084.sp
1085Information about the SI-Prog adapter can be found at
Stefan Tauner4c723152016-01-14 22:47:55 +00001086.URLB "http://www.lancos.com/siprogsch.html" "its website" .
Michael Karchere5449392012-05-05 20:53:59 +00001087.sp
1088An example call to flashrom is
1089.sp
1090.B " flashrom \-p pony_spi:dev=/dev/ttyS0,type=serbang"
1091.sp
1092Please note that while USB-to-serial adapters work under certain circumstances,
1093this slows down operation considerably.
1094.SS
Mark Marshall90021f22010-12-03 14:48:11 +00001095.BR "ogp_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001096.IP
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001097The flash ROM chip to access must be specified with the
Mark Marshall90021f22010-12-03 14:48:11 +00001098.B rom
1099parameter.
1100.sp
1101.B " flashrom \-p ogp_spi:rom=name"
1102.sp
1103Where
1104.B name
1105is either
1106.B cprom
1107or
1108.B s3
Stefan Taunere34e3e82013-01-01 00:06:51 +00001109for the configuration ROM and
Mark Marshall90021f22010-12-03 14:48:11 +00001110.B bprom
1111or
1112.B bios
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001113for the BIOS ROM. If more than one card supported by the ogp_spi programmer
Mark Marshall90021f22010-12-03 14:48:11 +00001114is installed in your system, you have to specify the PCI address of the card
1115you want to use with the
1116.B pci=
1117parameter as explained in the
Stefan Taunere34e3e82013-01-01 00:06:51 +00001118.B nic3com et al.\&
Mark Marshall90021f22010-12-03 14:48:11 +00001119section above.
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001120.SS
David Hendricksf9a30552015-05-23 20:30:30 -07001121.BR "linux_mtd " programmer
1122.IP
1123You may specify the MTD device to use with the
1124.sp
1125.B " flashrom \-p linux_mtd:dev=/dev/mtdX"
1126.sp
1127syntax where
1128.B /dev/mtdX
1129is the Linux device node for your MTD device. If left unspecified the first MTD
1130device found (e.g. /dev/mtd0) will be used by default.
1131.sp
1132Please note that the linux_mtd driver only works on Linux.
1133.SS
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001134.BR "linux_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001135.IP
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001136You have to specify the SPI controller to use with the
1137.sp
1138.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y"
1139.sp
1140syntax where
1141.B /dev/spidevX.Y
1142is the Linux device node for your SPI controller.
1143.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +00001144In case the device supports it, you can set the SPI clock frequency with the optional
1145.B spispeed
1146parameter. The frequency is parsed as kilohertz.
1147Example that sets the frequency to 8 MHz:
1148.sp
1149.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000"
1150.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001151Please note that the linux_spi driver only works on Linux.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001152.SS
1153.BR "mstarddc_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001154.IP
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001155The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging
Stefan Tauner0be072c2016-03-13 15:16:30 +00001156information between a computer and attached displays. Its most common uses are getting display capabilities
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001157through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address
11580x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to
1159the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49.
1160This flashrom module allows the latter via Linux's I2C driver.
1161.sp
1162.B IMPORTANT:
1163Before using this programmer, the display
1164.B MUST
1165be in standby mode, and only connected to the computer that will run flashrom using a VGA cable, to an
1166inactive VGA output. It absolutely
1167.B MUST NOT
1168be used as a display during the procedure!
1169.sp
1170You have to specify the DDC/I2C controller and I2C address to use with the
1171.sp
1172.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-X:YY"
1173.sp
1174syntax where
1175.B /dev/i2c-X
1176is the Linux device node for your I2C controller connected to the display's DDC channel, and
1177.B YY
1178is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used).
1179Example that uses I2C controller /dev/i2c-1 and address 0x49:
1180.sp
1181.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49
1182.sp
1183It is also possible to inhibit the reset command that is normally sent to the display once the flashrom
1184operation is completed using the optional
1185.B noreset
1186parameter. A value of 1 prevents flashrom from sending the reset command.
1187Example that does not reset the display at the end of the operation:
1188.sp
1189.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
1190.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +00001191Please note that sending the reset command is also inhibited if an error occurred during the operation.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001192To send the reset command afterwards, you can simply run flashrom once more, in chip probe mode (not specifying
1193an operation), without the
1194.B noreset
1195parameter, once the flash read/write operation you intended to perform has completed successfully.
1196.sp
1197Please also note that the mstarddc_spi driver only works on Linux.
Urja Rannikko0870b022016-01-31 22:10:29 +00001198.SS
1199.BR "ch341a_spi " programmer
1200The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is
1201used as per the device.
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001202.SS
Miklós Márton2d20d6d2018-01-30 20:20:15 +01001203.BR "ni845x_spi " programmer
1204.IP
1205An optional
1206.B voltage
1207parameter could be used to specify the IO voltage. This parameter is available for the NI USB-8452 device.
1208The default unit is Volt if no unit is specified. You can use
1209.BR mV ", " milliVolt ", " V " or " Volt
1210as unit specifier.
1211Syntax is
1212.sp
1213.B " flashrom \-p ni845x_spi:voltage=value"
1214.sp
1215where
1216.B value
1217can be
1218.BR 1.2V ", " 1.5V ", " 1.8V ", " 2.5V ", " 3.3V
1219or the equivalent in mV.
1220.sp
1221In the case if none of the programmer's supported IO voltage is within the supported voltage range of
1222the detected flash chip the flashrom will abort the operation (to prevent damaging the flash chip).
1223You can override this behaviour by passing "yes" to the
1224.B ignore_io_voltage_limits
1225parameter (for e.g. if you are using an external voltage translator circuit).
1226Syntax is
1227.sp
1228.B " flashrom \-p ni845x_spi:ignore_io_voltage_limits=yes"
1229.sp
1230You can use the
1231.B serial
1232parameter to explicitly specify which connected NI USB-845x device should be used.
1233You should use your device's 7 digit hexadecimal serial number.
1234Usage example to select the device with 1230A12 serial number:
1235.sp
1236.B " flashrom \-p ni845x_spi:serial=1230A12"
1237.sp
1238An optional
1239.B spispeed
1240parameter specifies the frequency of the SPI bus.
1241Syntax is
1242.sp
1243.B " flashrom \-p ni845x_spi:spispeed=frequency"
1244.sp
1245where
1246.B frequency
1247should a number corresponding to the desired frequency in kHz.
1248The maximum
1249.B frequency
1250is 12 MHz (12000 kHz) for the USB-8451 and 50 MHz (50000 kHz) for the USB-8452.
1251The default is a frequency of 1 MHz (1000 kHz).
1252.sp
1253An optional
1254.B cs
1255parameter specifies which target chip select line should be used. Syntax is
1256.sp
1257.B " flashrom \-p ni845x_spi:csnumber=value"
1258.sp
1259where
1260.B value
1261should be between
1262.BR 0 " and " 7
1263By default the CS0 is used.
1264.SS
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001265.BR "digilent_spi " programmer
1266.IP
1267An optional
1268.B spispeed
1269parameter specifies the frequency of the SPI bus.
1270Syntax is
1271.sp
1272.B " flashrom \-p digilent_spi:spispeed=frequency"
1273.sp
1274where
1275.B frequency
1276can be
1277.BR 62.5k ", " 125k ", " 250k ", " 500k ", " 1M ", " 2M " or " 4M
1278(in Hz). The default is a frequency of 4 MHz.
1279.sp
1280.SS
Marc Schink3578ec62016-03-17 16:23:03 +01001281.BR "jlink_spi " programmer
1282.IP
1283This module supports SEGGER J-Link and compatible devices.
1284
1285The \fBMOSI\fP signal of the flash chip must be attached to \fBTDI\fP pin of
1286the programmer, \fBMISO\fP to \fBTDO\fP and \fBSCK\fP to \fBTCK\fP.
1287The chip select (\fBCS\fP) signal of the flash chip can be attached to
1288different pins of the programmer which can be selected with the
1289.sp
1290.B " flashrom \-p jlink_spi:cs=pin"
1291.sp
1292syntax where \fBpin\fP can be either \fBTRST\fP or \fBRESET\fP.
1293The default pin for chip select is \fBRESET\fP.
1294Note that, when using \fBRESET\fP, it is normal that the indicator LED blinks
1295orange or red.
1296.br
1297Additionally, the \fBVTref\fP pin of the programmer must be attached to the
1298logic level of the flash chip.
1299The programmer measures the voltage on this pin and generates the reference
1300voltage for its input comparators and adapts its output voltages to it.
1301.sp
1302Pinout for devices with 20-pin JTAG connector:
1303.sp
1304 +-------+
1305 | 1 2 | 1: VTref 2:
1306 | 3 4 | 3: TRST 4: GND
1307 | 5 6 | 5: TDI 6: GND
1308 +-+ 7 8 | 7: 8: GND
1309 | 9 10 | 9: TCK 10: GND
1310 | 11 12 | 11: 12: GND
1311 +-+ 13 14 | 13: TDO 14:
1312 | 15 16 | 15: RESET 16:
1313 | 17 18 | 17: 18:
1314 | 19 20 | 19: PWR_5V 20:
1315 +-------+
1316.sp
1317If there is more than one compatible device connected, you can select which one
1318should be used by specifying its serial number with the
1319.sp
1320.B " flashrom \-p jlink_spi:serial=number"
1321.sp
1322syntax where
1323.B number
1324is the serial number of the device (which can be found for example in the
1325output of lsusb -v).
1326.sp
1327The SPI speed can be selected by using the
1328.sp
1329.B " flashrom \-p jlink_spi:spispeed=frequency"
1330.sp
1331syntax where \fBfrequency\fP is the SPI clock frequency in kHz.
1332The maximum speed depends on the device in use.
1333.SS
Miklós Márton324929c2019-08-01 19:14:10 +02001334.BR "stlinkv3_spi " programmer
1335.IP
1336This module supports SPI flash programming through the STMicroelectronics
1337STLINK V3 programmer/debugger's SPI bridge interface
1338.sp
1339.B " flashrom \-p stlinkv3_spi"
1340.sp
1341If there is more than one compatible device connected, you can select which one
1342should be used by specifying its serial number with the
1343.sp
1344.B " flashrom \-p stlinkv3_spi:serial=number"
1345.sp
1346syntax where
1347.B number
1348is the serial number of the device (which can be found for example in the
1349output of lsusb -v).
1350.sp
1351The SPI speed can be selected by using the
1352.sp
1353.B " flashrom \-p stlinkv3_spi:spispeed=frequency"
1354.sp
1355syntax where \fBfrequency\fP is the SPI clock frequency in kHz.
1356If the passed frequency is not supported by the adapter the nearest lower
1357supported frequency will be used.
1358.SS
Marc Schink3578ec62016-03-17 16:23:03 +01001359
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +00001360.SH EXAMPLES
1361To back up and update your BIOS, run
1362.sp
1363.B flashrom -p internal -r backup.rom -o backuplog.txt
1364.br
1365.B flashrom -p internal -w newbios.rom -o writelog.txt
1366.sp
1367Please make sure to copy backup.rom to some external media before you try
1368to write. That makes offline recovery easier.
1369.br
1370If writing fails and flashrom complains about the chip being in an unknown
1371state, you can try to restore the backup by running
1372.sp
1373.B flashrom -p internal -w backup.rom -o restorelog.txt
1374.sp
1375If you encounter any problems, please contact us and supply
1376backuplog.txt, writelog.txt and restorelog.txt. See section
1377.B BUGS
1378for contact info.
Peter Stuge42688e52009-01-26 02:20:56 +00001379.SH EXIT STATUS
Niklas Söderlund2d8b7ef2013-09-13 19:19:25 +00001380flashrom exits with 0 on success, 1 on most failures but with 3 if a call to mmap() fails.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001381.SH REQUIREMENTS
1382flashrom needs different access permissions for different programmers.
1383.sp
1384.B internal
1385needs raw memory access, PCI configuration space access, raw I/O port
1386access (x86) and MSR access (x86).
1387.sp
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +00001388.B atavia
1389needs PCI configuration space access.
1390.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001391.BR nic3com ", " nicrealtek " and " nicnatsemi "
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001392need PCI configuration space read access and raw I/O port access.
1393.sp
1394.B atahpt
1395needs PCI configuration space access and raw I/O port access.
1396.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001397.BR gfxnvidia ", " drkaiser " and " it8212
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001398need PCI configuration space access and raw memory access.
1399.sp
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001400.B rayer_spi
1401needs raw I/O port access.
1402.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +00001403.BR satasii ", " nicintel ", " nicintel_eeprom " and " nicintel_spi
1404need PCI configuration space read access and raw memory access.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001405.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001406.BR satamv " and " atapromise
1407need PCI configuration space read access, raw I/O port access and raw memory
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +00001408access.
1409.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001410.B serprog
1411needs TCP access to the network or userspace access to a serial port.
1412.sp
1413.B buspirate_spi
1414needs userspace access to a serial port.
1415.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001416.BR ft2232_spi ", " usbblaster_spi " and " pickit2_spi
Stefan Taunere49edbb82016-01-31 22:10:14 +00001417need access to the respective USB device via libusb API version 0.1.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001418.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001419.BR ch341a_spi " and " dediprog
1420need access to the respective USB device via libusb API version 1.0.
Urja Rannikko0870b022016-01-31 22:10:29 +00001421.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001422.B dummy
1423needs no access permissions at all.
1424.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001425.BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", "
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001426.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001427have to be run as superuser/root, and need additional raw access permission.
1428.sp
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001429.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi ", " \
1430ch341a_spi " and " digilent_spi
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001431can be run as normal user on most operating systems if appropriate device
1432permissions are set.
1433.sp
Mark Marshall90021f22010-12-03 14:48:11 +00001434.B ogp
1435needs PCI configuration space read access and raw memory access.
1436.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001437On OpenBSD, you can obtain raw access permission by setting
Uwe Hermann941a2732011-07-25 21:12:57 +00001438.B "securelevel=-1"
1439in
1440.B "/etc/rc.securelevel"
1441and rebooting, or rebooting into single user mode.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001442.SH BUGS
Stefan Tauner4c723152016-01-14 22:47:55 +00001443Please report any bugs to the
1444.MTOB "flashrom@flashrom.org" "flashrom mailing list" .
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001445.sp
1446We recommend to subscribe first at
Stefan Tauner4c723152016-01-14 22:47:55 +00001447.URLB "https://flashrom.org/mailman/listinfo/flashrom" "" .
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +00001448.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001449Many of the developers communicate via the
1450.B "#flashrom"
1451IRC channel on
1452.BR chat.freenode.net .
Stefan Tauner4c723152016-01-14 22:47:55 +00001453If you don't have an IRC client, you can use the
1454.URLB http://webchat.freenode.net/?channels=flashrom "freenode webchat" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001455You are welcome to join and ask questions, send us bug and success reports there
Stefan Taunereb582572012-09-21 12:52:50 +00001456too. Please provide a way to contact you later (e.g.\& a mail address) and be
Stefan Tauner4c723152016-01-14 22:47:55 +00001457patient if there is no immediate reaction. Also, we provide a
1458.URLB https://paste.flashrom.org "pastebin service"
Stefan Taunereb582572012-09-21 12:52:50 +00001459that is very useful when you want to share logs etc.\& without spamming the
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001460channel.
1461.SS
1462.B Laptops
1463.sp
Nico Huber2e50cdc2018-09-23 20:20:26 +02001464Using flashrom on older laptops is dangerous and may easily make your hardware
1465unusable. flashrom will attempt to detect if it is running on a susceptible
1466laptop and restrict flash-chip probing for safety reasons. Please see the
1467detailed discussion of this topic and associated flashrom options in the
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001468.B Laptops
1469paragraph in the
1470.B internal programmer
1471subsection of the
Stefan Tauner6697f712014-08-06 15:09:15 +00001472.B PROGRAMMER-SPECIFIC INFORMATION
Stefan Tauner4c723152016-01-14 22:47:55 +00001473section and the information
1474.URLB "https://flashrom.org/Laptops" "in our wiki" .
Daniel Lenski65922a32012-02-15 23:40:23 +00001475.SS
1476One-time programmable (OTP) memory and unique IDs
1477.sp
1478Some flash chips contain OTP memory often denoted as "security registers".
1479They usually have a capacity in the range of some bytes to a few hundred
Stefan Taunereb582572012-09-21 12:52:50 +00001480bytes and can be used to give devices unique IDs etc. flashrom is not able
Daniel Lenski65922a32012-02-15 23:40:23 +00001481to read or write these memories and may therefore not be able to duplicate a
1482chip completely. For chip types known to include OTP memories a warning is
1483printed when they are detected.
1484.sp
1485Similar to OTP memories are unique, factory programmed, unforgeable IDs.
1486They are not modifiable by the user at all.
Stefan Taunerac54fbe2011-07-21 19:52:00 +00001487.SH LICENSE
Stefan Reinauer261144c2006-07-27 23:29:02 +00001488.B flashrom
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001489is covered by the GNU General Public License (GPL), version 2. Some files are
Stefan Tauner23e10b82016-01-23 16:16:49 +00001490additionally available under any later version of the GPL.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001491.SH COPYRIGHT
Stefan Reinauer261144c2006-07-27 23:29:02 +00001492.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001493Please see the individual files.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001494.SH AUTHORS
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001495Andrew Morgan
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001496.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001497Carl-Daniel Hailfinger
1498.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001499Claus Gindhart
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001500.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001501David Borg
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001502.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001503David Hendricks
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001504.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001505Dominik Geyer
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001506.br
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +10001507Edward O'Callaghan
1508.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001509Eric Biederman
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001510.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001511Giampiero Giancipoli
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001512.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001513Helge Wagner
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001514.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001515Idwer Vollering
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001516.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001517Joe Bao
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001518.br
Stefan Taunerc0aaf952011-05-19 02:58:17 +00001519Joerg Fischer
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001520.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001521Joshua Roys
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001522.br
Stefan Tauner5c316f92015-02-08 21:57:52 +00001523Ky\[:o]sti M\[:a]lkki
1524.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001525Luc Verhaegen
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001526.br
Carl-Daniel Hailfinger451dc802009-05-01 11:00:39 +00001527Li-Ta Lo
1528.br
Mark Marshall90021f22010-12-03 14:48:11 +00001529Mark Marshall
1530.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001531Markus Boas
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001532.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001533Mattias Mattsson
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001534.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001535Michael Karcher
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001536.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001537Nikolay Petukhov
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001538.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001539Patrick Georgi
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001540.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001541Peter Lemenkov
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001542.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001543Peter Stuge
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001544.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001545Reinder E.N. de Haan
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001546.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001547Ronald G. Minnich
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001548.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001549Ronald Hoogenboom
Stefan Reinauer261144c2006-07-27 23:29:02 +00001550.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001551Sean Nelson
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001552.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001553Stefan Reinauer
Stefan Reinauer261144c2006-07-27 23:29:02 +00001554.br
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001555Stefan Tauner
1556.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001557Stefan Wildemann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001558.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001559Stephan Guilloux
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001560.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001561Steven James
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001562.br
Stefan Tauner23e10b82016-01-23 16:16:49 +00001563Urja Rannikko
1564.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001565Uwe Hermann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001566.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001567Wang Qingpei
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001568.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001569Yinghai Lu
Stefan Reinauerf8337dd2006-08-03 10:49:09 +00001570.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001571some others, please see the flashrom svn changelog for details.
1572.br
Stefan Tauner4c723152016-01-14 22:47:55 +00001573All still active authors can be reached via
1574.MTOB "flashrom@flashrom.org" "the mailing list" .
Stefan Reinauer261144c2006-07-27 23:29:02 +00001575.PP
Stefan Tauner4c723152016-01-14 22:47:55 +00001576This manual page was written by
1577.MTOB "uwe@hermann-uwe.de" "Uwe Hermann" ,
1578Carl-Daniel Hailfinger, Stefan Tauner and others.
Uwe Hermann42eb17f2008-01-18 17:48:51 +00001579It is licensed under the terms of the GNU GPL (version 2 or later).