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Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000014 */
15
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000016/* Driver for various LPT adapters.
17 *
18 * This driver uses non-portable direct I/O port accesses which won't work on
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000019 * any non-x86 platform, and even on x86 there is a high chance there will be
20 * collisions with any loaded parallel port drivers.
21 * The big advantage of direct port I/O is OS independence and speed because
22 * most OS parport drivers will perform many unnecessary accesses although
23 * this driver just treats the parallel port as a GPIO set.
24 */
25#if defined(__i386__) || defined(__x86_64__)
26
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +000027#include <stdlib.h>
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000028#include <strings.h>
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +000029#include <string.h>
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000030#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000031#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000032#include "hwaccess.h"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000033
34/* We have two sets of pins, out and in. The numbers for both sets are
35 * independent and are bitshift values, not real pin numbers.
Paul Menzel018d4822011-10-21 12:33:07 +000036 * Default settings are for the RayeR hardware.
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000037 */
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000038
39struct rayer_programmer {
40 const char *type;
41 const enum test_state status;
42 const char *description;
43 const void *dev_data;
44};
45
46struct rayer_pinout {
47 uint8_t cs_bit;
48 uint8_t sck_bit;
49 uint8_t mosi_bit;
50 uint8_t miso_bit;
Anastasia Klimchuk38c13342021-05-27 11:12:44 +100051 void (*preinit)(void *);
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000052 int (*shutdown)(void *);
53};
54
Anastasia Klimchuk38c13342021-05-27 11:12:44 +100055struct rayer_spi_data {
56 uint16_t lpt_iobase;
57 /* Cached value of last byte sent. */
58 uint8_t lpt_outbyte;
59
60 const struct rayer_pinout *pinout;
61};
62
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000063static const struct rayer_pinout rayer_spipgm = {
64 .cs_bit = 5,
65 .sck_bit = 6,
66 .mosi_bit = 7,
67 .miso_bit = 6,
68};
69
Anastasia Klimchuk38c13342021-05-27 11:12:44 +100070static void dlc5_preinit(void *spi_data)
71{
72 struct rayer_spi_data *data = spi_data;
73
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110074 msg_pdbg("dlc5_preinit\n");
75 /* Assert pin 6 to receive MISO. */
Anastasia Klimchuk38c13342021-05-27 11:12:44 +100076 data->lpt_outbyte |= (1<<4);
77 OUTB(data->lpt_outbyte, data->lpt_iobase);
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110078}
79
Anastasia Klimchuk38c13342021-05-27 11:12:44 +100080static int dlc5_shutdown(void *spi_data)
81{
82 struct rayer_spi_data *data = spi_data;
83
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110084 msg_pdbg("dlc5_shutdown\n");
85 /* De-assert pin 6 to force MISO low. */
Anastasia Klimchuk38c13342021-05-27 11:12:44 +100086 data->lpt_outbyte &= ~(1<<4);
87 OUTB(data->lpt_outbyte, data->lpt_iobase);
88
89 free(data);
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +110090 return 0;
91}
Kyösti Mälkki1d473792013-10-02 01:22:17 +000092
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000093static const struct rayer_pinout xilinx_dlc5 = {
94 .cs_bit = 2,
95 .sck_bit = 1,
96 .mosi_bit = 0,
97 .miso_bit = 4,
Kyösti Mälkki1d473792013-10-02 01:22:17 +000098 .preinit = dlc5_preinit,
99 .shutdown = dlc5_shutdown,
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000100};
101
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000102static void byteblaster_preinit(void *spi_data)
103{
104 struct rayer_spi_data *data = spi_data;
105
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100106 msg_pdbg("byteblaster_preinit\n");
107 /* Assert #EN signal. */
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000108 OUTB(2, data->lpt_iobase + 2 );
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100109}
110
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000111static int byteblaster_shutdown(void *spi_data)
112{
113 struct rayer_spi_data *data = spi_data;
114
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100115 msg_pdbg("byteblaster_shutdown\n");
116 /* De-Assert #EN signal. */
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000117 OUTB(0, data->lpt_iobase + 2 );
118
119 free(data);
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100120 return 0;
121}
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000122
123static const struct rayer_pinout altera_byteblastermv = {
124 .cs_bit = 1,
125 .sck_bit = 0,
126 .mosi_bit = 6,
127 .miso_bit = 7,
128 .preinit = byteblaster_preinit,
129 .shutdown = byteblaster_shutdown,
130};
131
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000132static void stk200_preinit(void *spi_data)
133{
134 struct rayer_spi_data *data = spi_data;
135
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100136 msg_pdbg("stk200_init\n");
137 /* Assert #EN signals, set LED signal. */
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000138 data->lpt_outbyte = (1 << 6) ;
139 OUTB(data->lpt_outbyte, data->lpt_iobase);
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100140}
141
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000142static int stk200_shutdown(void *spi_data)
143{
144 struct rayer_spi_data *data = spi_data;
145
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100146 msg_pdbg("stk200_shutdown\n");
147 /* Assert #EN signals, clear LED signal. */
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000148 data->lpt_outbyte = (1 << 2) | (1 << 3);
149 OUTB(data->lpt_outbyte, data->lpt_iobase);
150
151 free(data);
Anastasia Klimchuk5e0a9ea2021-03-17 12:11:35 +1100152 return 0;
153}
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000154
155static const struct rayer_pinout atmel_stk200 = {
156 .cs_bit = 7,
157 .sck_bit = 4,
158 .mosi_bit = 5,
159 .miso_bit = 6,
160 .preinit = stk200_preinit,
161 .shutdown = stk200_shutdown,
162};
163
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000164static const struct rayer_pinout wiggler_lpt = {
165 .cs_bit = 1,
166 .sck_bit = 2,
167 .mosi_bit = 3,
168 .miso_bit = 7,
169};
170
Stefan Taunerfdb16592016-02-28 17:04:38 +0000171static const struct rayer_pinout spi_tt = {
172 .cs_bit = 2,
173 .sck_bit = 0,
174 .mosi_bit = 4,
175 .miso_bit = 7,
176};
177
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000178static const struct rayer_programmer rayer_spi_types[] = {
179 {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
180 {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000181 {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv},
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000182 {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200},
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000183 {"wiggler", OK, "Wiggler LPT", &wiggler_lpt},
Stefan Taunerfdb16592016-02-28 17:04:38 +0000184 {"spi_tt", NT, "SPI Tiny Tools (SPI_TT LPT)", &spi_tt},
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000185 {0},
186};
187
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +1000188static void rayer_bitbang_set_cs(int val, void *spi_data)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000189{
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000190 struct rayer_spi_data *data = spi_data;
191
192 data->lpt_outbyte &= ~(1 << data->pinout->cs_bit);
193 data->lpt_outbyte |= (val << data->pinout->cs_bit);
194 OUTB(data->lpt_outbyte, data->lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000195}
196
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +1000197static void rayer_bitbang_set_sck(int val, void *spi_data)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000198{
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000199 struct rayer_spi_data *data = spi_data;
200
201 data->lpt_outbyte &= ~(1 << data->pinout->sck_bit);
202 data->lpt_outbyte |= (val << data->pinout->sck_bit);
203 OUTB(data->lpt_outbyte, data->lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000204}
205
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +1000206static void rayer_bitbang_set_mosi(int val, void *spi_data)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000207{
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000208 struct rayer_spi_data *data = spi_data;
209
210 data->lpt_outbyte &= ~(1 << data->pinout->mosi_bit);
211 data->lpt_outbyte |= (val << data->pinout->mosi_bit);
212 OUTB(data->lpt_outbyte, data->lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000213}
214
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +1000215static int rayer_bitbang_get_miso(void *spi_data)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000216{
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000217 struct rayer_spi_data *data = spi_data;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000218 uint8_t tmp;
219
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000220 tmp = INB(data->lpt_iobase + 1) ^ 0x80; // bit.7 inverted
221 tmp = (tmp >> data->pinout->miso_bit) & 0x1;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000222 return tmp;
223}
224
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000225static int rayer_shutdown(void *spi_data)
226{
227 free(spi_data);
228 return 0;
229}
230
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000231static const struct bitbang_spi_master bitbang_spi_master_rayer = {
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000232 .set_cs = rayer_bitbang_set_cs,
233 .set_sck = rayer_bitbang_set_sck,
234 .set_mosi = rayer_bitbang_set_mosi,
235 .get_miso = rayer_bitbang_get_miso,
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000236 .half_period = 0,
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000237};
238
239int rayer_spi_init(void)
240{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000241 const struct rayer_programmer *prog = rayer_spi_types;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000242 char *arg = NULL;
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000243 struct rayer_pinout *pinout = NULL;
244 uint16_t lpt_iobase;
245 uint8_t lpt_outbyte;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000246
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000247 /* Non-default port requested? */
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000248 arg = extract_programmer_param("iobase");
249 if (arg) {
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000250 char *endptr = NULL;
251 unsigned long tmp;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000252 tmp = strtoul(arg, &endptr, 0);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000253 /* Port 0, port >0x10000, unaligned ports and garbage strings
254 * are rejected.
255 */
256 if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||
257 (*endptr != '\0')) {
258 /* Using ports below 0x100 is a really bad idea, and
259 * should only be done if no port between 0x100 and
260 * 0xfffc works due to routing issues.
261 */
262 msg_perr("Error: iobase= specified, but the I/O base "
263 "given was invalid.\nIt must be a multiple of "
264 "0x4 and lie between 0x100 and 0xfffc.\n");
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000265 free(arg);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000266 return 1;
267 } else {
268 lpt_iobase = (uint16_t)tmp;
269 msg_pinfo("Non-default I/O base requested. This will "
270 "not change the hardware settings.\n");
271 }
272 } else {
273 /* Pick a default value for the I/O base. */
274 lpt_iobase = 0x378;
275 }
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000276 free(arg);
Elyes HAOUAS0cacb112019-02-04 12:16:38 +0100277
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000278 msg_pdbg("Using address 0x%x as I/O base for parallel port access.\n",
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000279 lpt_iobase);
280
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000281 arg = extract_programmer_param("type");
282 if (arg) {
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000283 for (; prog->type != NULL; prog++) {
284 if (strcasecmp(arg, prog->type) == 0) {
285 break;
286 }
287 }
288 if (prog->type == NULL) {
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000289 msg_perr("Error: Invalid device type specified.\n");
290 free(arg);
291 return 1;
292 }
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000293 free(arg);
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000294 }
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000295 msg_pinfo("Using %s pinout.\n", prog->description);
296 pinout = (struct rayer_pinout *)prog->dev_data;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000297
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000298 if (rget_io_perms())
299 return 1;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000300
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000301 /* Get the initial value before writing to any line. */
302 lpt_outbyte = INB(lpt_iobase);
303
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000304 struct rayer_spi_data *data = calloc(1, sizeof(*data));
305 if (!data) {
306 msg_perr("Unable to allocate space for SPI master data\n");
307 return 1;
308 }
309 data->pinout = pinout;
310 data->lpt_iobase = lpt_iobase;
311 data->lpt_outbyte = lpt_outbyte;
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000312
Anastasia Klimchuk38c13342021-05-27 11:12:44 +1000313 if (pinout->shutdown)
314 register_shutdown(pinout->shutdown, data);
315 else
316 register_shutdown(rayer_shutdown, data);
317
318 if (pinout->preinit)
319 pinout->preinit(data);
320
321 if (register_spi_bitbang_master(&bitbang_spi_master_rayer, data))
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000322 return 1;
323
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000324 return 0;
325}
326
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000327#else
328#error PCI port I/O access is not supported on this architecture yet.
329#endif