blob: a0b0fcf5e20d26e50b387332f76c49514e6dc9dc [file] [log] [blame]
Stefan Tauner6ee37e22012-12-29 15:03:51 +00001/*
2 * This file is part of the flashrom project.
3 * It handles everything related to status registers of the JEDEC family 25.
4 *
5 * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger
6 * Copyright (C) 2008 coresystems GmbH
7 * Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
8 * Copyright (C) 2012 Stefan Tauner
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Stefan Tauner6ee37e22012-12-29 15:03:51 +000018 */
19
20#include "flash.h"
21#include "chipdrivers.h"
22#include "spi.h"
23
24/* === Generic functions === */
Edward O'Callaghane4ddc362020-04-12 17:27:53 +100025static int spi_write_status_register_flag(const struct flashctx *flash, int status, const unsigned char enable_opcode)
Stefan Tauner6ee37e22012-12-29 15:03:51 +000026{
27 int result;
28 int i = 0;
29 /*
30 * WRSR requires either EWSR or WREN depending on chip type.
31 * The code below relies on the fact hat EWSR and WREN have the same
32 * INSIZE and OUTSIZE.
33 */
34 struct spi_command cmds[] = {
35 {
36 .writecnt = JEDEC_WREN_OUTSIZE,
37 .writearr = (const unsigned char[]){ enable_opcode },
38 .readcnt = 0,
39 .readarr = NULL,
40 }, {
41 .writecnt = JEDEC_WRSR_OUTSIZE,
42 .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status },
43 .readcnt = 0,
44 .readarr = NULL,
45 }, {
46 .writecnt = 0,
47 .writearr = NULL,
48 .readcnt = 0,
49 .readarr = NULL,
50 }};
51
52 result = spi_send_multicommand(flash, cmds);
53 if (result) {
54 msg_cerr("%s failed during command execution\n", __func__);
55 /* No point in waiting for the command to complete if execution
56 * failed.
57 */
58 return result;
59 }
60 /* WRSR performs a self-timed erase before the changes take effect.
61 * This may take 50-85 ms in most cases, and some chips apparently
62 * allow running RDSR only once. Therefore pick an initial delay of
63 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
64 */
65 programmer_delay(100 * 1000);
66 while (spi_read_status_register(flash) & SPI_SR_WIP) {
67 if (++i > 490) {
68 msg_cerr("Error: WIP bit after WRSR never cleared\n");
69 return TIMEOUT_ERROR;
70 }
71 programmer_delay(10 * 1000);
72 }
73 return 0;
74}
75
Edward O'Callaghane4ddc362020-04-12 17:27:53 +100076int spi_write_status_register(const struct flashctx *flash, int status)
Stefan Tauner6ee37e22012-12-29 15:03:51 +000077{
78 int feature_bits = flash->chip->feature_bits;
79 int ret = 1;
80
81 if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
82 msg_cdbg("Missing status register write definition, assuming "
83 "EWSR is needed\n");
84 feature_bits |= FEATURE_WRSR_EWSR;
85 }
86 if (feature_bits & FEATURE_WRSR_WREN)
87 ret = spi_write_status_register_flag(flash, status, JEDEC_WREN);
88 if (ret && (feature_bits & FEATURE_WRSR_EWSR))
89 ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR);
90 return ret;
91}
92
Edward O'Callaghane4ddc362020-04-12 17:27:53 +100093uint8_t spi_read_status_register(const struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +000094{
95 static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
96 /* FIXME: No workarounds for driver/hardware bugs in generic code. */
97 unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */
98 int ret;
99
100 /* Read Status Register */
101 ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr);
Nico Huber1f081532017-10-14 15:01:13 +0200102 if (ret) {
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000103 msg_cerr("RDSR failed!\n");
Nico Huber1f081532017-10-14 15:01:13 +0200104 /* FIXME: We should propagate the error. */
105 return 0;
106 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000107
108 return readarr[0];
109}
110
Nikolai Artemievf3841612020-12-14 07:39:02 +1100111static int spi_restore_status(struct flashctx *flash, uint8_t status)
112{
113 msg_cdbg("restoring chip status (0x%02x)\n", status);
114 return spi_write_status_register(flash, status);
115}
116
Stefan Tauner9530a022012-12-29 15:04:05 +0000117/* A generic block protection disable.
118 * Tests if a protection is enabled with the block protection mask (bp_mask) and returns success otherwise.
119 * Tests if the register bits are locked with the lock_mask (lock_mask).
Stefan Taunercecb2c52013-06-20 22:55:41 +0000120 * Tests if a hardware protection is active (i.e. low pin/high bit value) with the write protection mask
121 * (wp_mask) and bails out in that case.
122 * If there are register lock bits set we try to disable them by unsetting those bits of the previous register
123 * contents that are set in the lock_mask. We then check if removing the lock bits has worked and continue as if
124 * they never had been engaged:
125 * If the lock bits are out of the way try to disable engaged protections.
126 * To support uncommon global unprotects (e.g. on most AT2[56]xx1(A)) unprotect_mask can be used to force
127 * bits to 0 additionally to those set in bp_mask and lock_mask. Only bits set in unprotect_mask are potentially
128 * preserved when doing the final unprotect.
129 *
130 * To sum up:
131 * bp_mask: set those bits that correspond to the bits in the status register that indicate an active protection
132 * (which should be unset after this function returns).
133 * lock_mask: set the bits that correspond to the bits that lock changing the bits above.
134 * wp_mask: set the bits that correspond to bits indicating non-software revocable protections.
135 * unprotect_mask: set the bits that should be preserved if possible when unprotecting.
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000136 */
Stefan Taunercecb2c52013-06-20 22:55:41 +0000137static int spi_disable_blockprotect_generic(struct flashctx *flash, uint8_t bp_mask, uint8_t lock_mask, uint8_t wp_mask, uint8_t unprotect_mask)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000138{
139 uint8_t status;
140 int result;
141
142 status = spi_read_status_register(flash);
Stefan Tauner9530a022012-12-29 15:04:05 +0000143 if ((status & bp_mask) == 0) {
144 msg_cdbg2("Block protection is disabled.\n");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000145 return 0;
Stefan Tauner9530a022012-12-29 15:04:05 +0000146 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000147
Nikolai Artemievf3841612020-12-14 07:39:02 +1100148 /* Restore status register content upon exit in finalize_flash_access(). */
149 register_chip_restore(spi_restore_status, flash, status);
150
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000151 msg_cdbg("Some block protection in effect, disabling... ");
Stefan Tauner9530a022012-12-29 15:04:05 +0000152 if ((status & lock_mask) != 0) {
153 msg_cdbg("\n\tNeed to disable the register lock first... ");
154 if (wp_mask != 0 && (status & wp_mask) == 0) {
155 msg_cerr("Hardware protection is active, disabling write protection is impossible.\n");
156 return 1;
157 }
158 /* All bits except the register lock bit (often called SPRL, SRWD, WPEN) are readonly. */
159 result = spi_write_status_register(flash, status & ~lock_mask);
160 if (result) {
161 msg_cerr("spi_write_status_register failed.\n");
162 return result;
163 }
Stefan Taunercecb2c52013-06-20 22:55:41 +0000164 status = spi_read_status_register(flash);
165 if ((status & lock_mask) != 0) {
166 msg_cerr("Unsetting lock bit(s) failed.\n");
167 return 1;
168 }
Stefan Tauner9530a022012-12-29 15:04:05 +0000169 msg_cdbg("done.\n");
170 }
171 /* Global unprotect. Make sure to mask the register lock bit as well. */
Stefan Taunercecb2c52013-06-20 22:55:41 +0000172 result = spi_write_status_register(flash, status & ~(bp_mask | lock_mask) & unprotect_mask);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000173 if (result) {
174 msg_cerr("spi_write_status_register failed.\n");
175 return result;
176 }
177 status = spi_read_status_register(flash);
Stefan Tauner9530a022012-12-29 15:04:05 +0000178 if ((status & bp_mask) != 0) {
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000179 msg_cerr("Block protection could not be disabled!\n");
Yuji Sasakib07c53d2019-03-22 10:59:50 -0700180 if (flash->chip->printlock)
181 flash->chip->printlock(flash);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000182 return 1;
183 }
Stefan Tauner9530a022012-12-29 15:04:05 +0000184 msg_cdbg("disabled.\n");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000185 return 0;
186}
187
Stefan Tauner9530a022012-12-29 15:04:05 +0000188/* A common block protection disable that tries to unset the status register bits masked by 0x3C. */
189int spi_disable_blockprotect(struct flashctx *flash)
190{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000191 return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
Stefan Tauner9530a022012-12-29 15:04:05 +0000192}
193
Wei Hu25584de2018-04-30 14:02:08 -0700194int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash)
195{
196 int result = spi_write_enable(flash);
197 if (result)
198 return result;
199
200 static const unsigned char cmd[] = { 0x98 }; /* ULBPR */
201 result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
202 if (result)
203 msg_cerr("ULBPR failed\n");
204 return result;
205}
206
Stefan Taunera60d4082014-06-04 16:17:03 +0000207/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and
208 * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */
209int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash)
210{
211 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF);
212}
213
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000214/* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and
215 * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly
216 * non-0). */
217int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash)
218{
219 return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF);
220}
221
222/* A common block protection disable that tries to unset the status register bits masked by 0x3C (BP0-3) and
223 * protected/locked by bit #7. */
224int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash)
225{
226 return spi_disable_blockprotect_generic(flash, 0x3C, 1 << 7, 0, 0xFF);
227}
228
229/* A common block protection disable that tries to unset the status register bits masked by 0x7C (BP0-4) and
230 * protected/locked by bit #7. */
231int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash)
232{
233 return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
234}
Stefan Tauner9530a022012-12-29 15:04:05 +0000235
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000236static void spi_prettyprint_status_register_hex(uint8_t status)
237{
238 msg_cdbg("Chip status register is 0x%02x.\n", status);
239}
240
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000241/* Common highest bit: Status Register Write Disable (SRWD) or Status Register Protect (SRP). */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000242static void spi_prettyprint_status_register_srwd(uint8_t status)
243{
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000244 msg_cdbg("Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset\n",
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000245 (status & (1 << 7)) ? "" : "not ");
246}
247
248/* Common highest bit: Block Protect Write Disable (BPL). */
249static void spi_prettyprint_status_register_bpl(uint8_t status)
250{
251 msg_cdbg("Chip status register: Block Protect Write Disable (BPL) is %sset\n",
252 (status & (1 << 7)) ? "" : "not ");
253}
254
255/* Common lowest 2 bits: WEL and WIP. */
256static void spi_prettyprint_status_register_welwip(uint8_t status)
257{
258 msg_cdbg("Chip status register: Write Enable Latch (WEL) is %sset\n",
259 (status & (1 << 1)) ? "" : "not ");
260 msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is %sset\n",
261 (status & (1 << 0)) ? "" : "not ");
262}
263
264/* Common block protection (BP) bits. */
265static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
266{
267 switch (bp) {
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000268 case 4:
269 msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
Stefan Tauner5c316f92015-02-08 21:57:52 +0000270 (status & (1 << 6)) ? "" : "not ");
Richard Hughesdb7482b2018-12-19 12:04:30 +0000271 /* Fall through. */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000272 case 3:
273 msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
274 (status & (1 << 5)) ? "" : "not ");
Richard Hughesdb7482b2018-12-19 12:04:30 +0000275 /* Fall through. */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000276 case 2:
277 msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
278 (status & (1 << 4)) ? "" : "not ");
Richard Hughesdb7482b2018-12-19 12:04:30 +0000279 /* Fall through. */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000280 case 1:
281 msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
282 (status & (1 << 3)) ? "" : "not ");
Richard Hughesdb7482b2018-12-19 12:04:30 +0000283 /* Fall through. */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000284 case 0:
285 msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
286 (status & (1 << 2)) ? "" : "not ");
287 }
288}
289
290/* Unnamed bits. */
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000291void spi_prettyprint_status_register_bit(uint8_t status, int bit)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000292{
293 msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not ");
294}
295
296int spi_prettyprint_status_register_plain(struct flashctx *flash)
297{
298 uint8_t status = spi_read_status_register(flash);
299 spi_prettyprint_status_register_hex(status);
300 return 0;
301}
302
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000303/* Print the plain hex value and the welwip bits only. */
304int spi_prettyprint_status_register_default_welwip(struct flashctx *flash)
305{
306 uint8_t status = spi_read_status_register(flash);
307 spi_prettyprint_status_register_hex(status);
308
309 spi_prettyprint_status_register_welwip(status);
310 return 0;
311}
312
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000313/* Works for many chips of the
314 * AMIC A25L series
315 * and MX MX25L512
316 */
Stefan Tauner12f3d512014-05-27 21:27:27 +0000317int spi_prettyprint_status_register_bp1_srwd(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000318{
319 uint8_t status = spi_read_status_register(flash);
320 spi_prettyprint_status_register_hex(status);
321
322 spi_prettyprint_status_register_srwd(status);
323 spi_prettyprint_status_register_bit(status, 6);
324 spi_prettyprint_status_register_bit(status, 5);
325 spi_prettyprint_status_register_bit(status, 4);
326 spi_prettyprint_status_register_bp(status, 1);
327 spi_prettyprint_status_register_welwip(status);
328 return 0;
329}
330
331/* Works for many chips of the
332 * AMIC A25L series
Stefan Taunerf4451612013-04-19 01:59:15 +0000333 * PMC Pm25LD series
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000334 */
Stefan Tauner12f3d512014-05-27 21:27:27 +0000335int spi_prettyprint_status_register_bp2_srwd(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000336{
337 uint8_t status = spi_read_status_register(flash);
338 spi_prettyprint_status_register_hex(status);
339
340 spi_prettyprint_status_register_srwd(status);
341 spi_prettyprint_status_register_bit(status, 6);
342 spi_prettyprint_status_register_bit(status, 5);
343 spi_prettyprint_status_register_bp(status, 2);
344 spi_prettyprint_status_register_welwip(status);
345 return 0;
346}
347
348/* Works for many chips of the
349 * ST M25P series
350 * MX MX25L series
351 */
Stefan Tauner12f3d512014-05-27 21:27:27 +0000352int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000353{
354 uint8_t status = spi_read_status_register(flash);
355 spi_prettyprint_status_register_hex(status);
356
357 spi_prettyprint_status_register_srwd(status);
358 spi_prettyprint_status_register_bit(status, 6);
359 spi_prettyprint_status_register_bp(status, 3);
360 spi_prettyprint_status_register_welwip(status);
361 return 0;
362}
363
Stefan Tauner12f3d512014-05-27 21:27:27 +0000364int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash)
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000365{
366 uint8_t status = spi_read_status_register(flash);
367 spi_prettyprint_status_register_hex(status);
368
369 spi_prettyprint_status_register_srwd(status);
370 spi_prettyprint_status_register_bp(status, 4);
371 spi_prettyprint_status_register_welwip(status);
372 return 0;
373}
374
Stefan Tauner85f09f72014-05-27 21:27:14 +0000375int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash)
376{
377 uint8_t status = spi_read_status_register(flash);
378 spi_prettyprint_status_register_hex(status);
379
380 spi_prettyprint_status_register_bpl(status);
381 spi_prettyprint_status_register_bit(status, 6);
382 spi_prettyprint_status_register_bit(status, 5);
383 spi_prettyprint_status_register_bp(status, 2);
384 spi_prettyprint_status_register_welwip(status);
385 return 0;
386}
387
Ben Gardnerbcf61092015-11-22 02:23:31 +0000388int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash)
389{
390 uint8_t status = spi_read_status_register(flash);
391 spi_prettyprint_status_register_hex(status);
392
393 spi_prettyprint_status_register_bpl(status);
394 spi_prettyprint_status_register_bit(status, 6);
395 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
396 spi_prettyprint_status_register_bp(status, 2);
397 spi_prettyprint_status_register_welwip(status);
398 return 0;
399}
400
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000401/* === Amic ===
402 * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
Stefan Tauner12f3d512014-05-27 21:27:27 +0000403 * spi_prettyprint_status_register_bp1_srwd or
404 * spi_prettyprint_status_register_bp2_srwd.
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000405 * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
406 * spi_prettyprint_status_register_amic_a25l032 if those have locks controlled
407 * by the second status register.
408 */
409
410int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
411{
412 uint8_t status = spi_read_status_register(flash);
413 spi_prettyprint_status_register_hex(status);
414
415 spi_prettyprint_status_register_srwd(status);
416 msg_cdbg("Chip status register: Sector Protect Size (SEC) is %i KB\n", (status & (1 << 6)) ? 4 : 64);
417 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
418 spi_prettyprint_status_register_bp(status, 2);
419 spi_prettyprint_status_register_welwip(status);
420 msg_cdbg("Chip status register 2 is NOT decoded!\n");
421 return 0;
422}
423
424/* === Atmel === */
425
426static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status)
427{
428 msg_cdbg("Chip status register: Write Protect Enable (WPEN) is %sset\n",
429 (status & (1 << 7)) ? "" : "not ");
430}
431
432static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
433{
434 msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) is %sset\n",
435 (status & (1 << 7)) ? "" : "not ");
436}
437
438static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status)
439{
440 msg_cdbg("Chip status register: Erase/Program Error (EPE) is %sset\n",
441 (status & (1 << 5)) ? "" : "not ");
442 msg_cdbg("Chip status register: WP# pin (WPP) is %sasserted\n",
443 (status & (1 << 4)) ? "not " : "");
444}
445
446static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
447{
448 msg_cdbg("Chip status register: Software Protection Status (SWP): ");
449 switch (status & (3 << 2)) {
450 case 0x0 << 2:
451 msg_cdbg("no sectors are protected\n");
452 break;
453 case 0x1 << 2:
454 msg_cdbg("some sectors are protected\n");
455 /* FIXME: Read individual Sector Protection Registers. */
456 break;
457 case 0x3 << 2:
458 msg_cdbg("all sectors are protected\n");
459 break;
460 default:
461 msg_cdbg("reserved for future use\n");
462 break;
463 }
464}
465
466int spi_prettyprint_status_register_at25df(struct flashctx *flash)
467{
468 uint8_t status = spi_read_status_register(flash);
469 spi_prettyprint_status_register_hex(status);
470
471 spi_prettyprint_status_register_atmel_at25_srpl(status);
472 spi_prettyprint_status_register_bit(status, 6);
473 spi_prettyprint_status_register_atmel_at25_epewpp(status);
474 spi_prettyprint_status_register_atmel_at25_swp(status);
475 spi_prettyprint_status_register_welwip(status);
476 return 0;
477}
478
479int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
480{
481 /* FIXME: We should check the security lockdown. */
482 msg_cdbg("Ignoring security lockdown (if present)\n");
483 msg_cdbg("Ignoring status register byte 2\n");
484 return spi_prettyprint_status_register_at25df(flash);
485}
486
Stefan Tauner57794ac2012-12-29 15:04:20 +0000487/* used for AT25F512, AT25F1024(A), AT25F2048 */
488int spi_prettyprint_status_register_at25f(struct flashctx *flash)
489{
490 uint8_t status;
491
492 status = spi_read_status_register(flash);
493 spi_prettyprint_status_register_hex(status);
494
495 spi_prettyprint_status_register_atmel_at25_wpen(status);
496 spi_prettyprint_status_register_bit(status, 6);
497 spi_prettyprint_status_register_bit(status, 5);
498 spi_prettyprint_status_register_bit(status, 4);
499 spi_prettyprint_status_register_bp(status, 1);
500 spi_prettyprint_status_register_welwip(status);
501 return 0;
502}
503
504int spi_prettyprint_status_register_at25f512a(struct flashctx *flash)
505{
506 uint8_t status;
507
508 status = spi_read_status_register(flash);
509 spi_prettyprint_status_register_hex(status);
510
511 spi_prettyprint_status_register_atmel_at25_wpen(status);
512 spi_prettyprint_status_register_bit(status, 6);
513 spi_prettyprint_status_register_bit(status, 5);
514 spi_prettyprint_status_register_bit(status, 4);
515 spi_prettyprint_status_register_bit(status, 3);
516 spi_prettyprint_status_register_bp(status, 0);
517 spi_prettyprint_status_register_welwip(status);
518 return 0;
519}
520
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000521int spi_prettyprint_status_register_at25f512b(struct flashctx *flash)
522{
523 uint8_t status = spi_read_status_register(flash);
524 spi_prettyprint_status_register_hex(status);
525
526 spi_prettyprint_status_register_atmel_at25_srpl(status);
527 spi_prettyprint_status_register_bit(status, 6);
528 spi_prettyprint_status_register_atmel_at25_epewpp(status);
529 spi_prettyprint_status_register_bit(status, 3);
530 spi_prettyprint_status_register_bp(status, 0);
531 spi_prettyprint_status_register_welwip(status);
532 return 0;
533}
534
Stefan Tauner57794ac2012-12-29 15:04:20 +0000535int spi_prettyprint_status_register_at25f4096(struct flashctx *flash)
536{
537 uint8_t status;
538
539 status = spi_read_status_register(flash);
540 spi_prettyprint_status_register_hex(status);
541
542 spi_prettyprint_status_register_atmel_at25_wpen(status);
543 spi_prettyprint_status_register_bit(status, 6);
544 spi_prettyprint_status_register_bit(status, 5);
545 spi_prettyprint_status_register_bp(status, 2);
546 spi_prettyprint_status_register_welwip(status);
547 return 0;
548}
549
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000550int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
551{
552 uint8_t status = spi_read_status_register(flash);
553 spi_prettyprint_status_register_hex(status);
554
555 spi_prettyprint_status_register_atmel_at25_wpen(status);
556 msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
557 "%sset\n", (status & (1 << 6)) ? "" : "not ");
558 msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
559 "%sset\n", (status & (1 << 5)) ? "" : "not ");
560 spi_prettyprint_status_register_bit(status, 4);
561 msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
562 "%sset\n", (status & (1 << 3)) ? "" : "not ");
563 msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
564 "%sset\n", (status & (1 << 2)) ? "" : "not ");
565 /* FIXME: Pretty-print detailed sector protection status. */
566 spi_prettyprint_status_register_welwip(status);
567 return 0;
568}
569
570int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
571{
572 uint8_t status = spi_read_status_register(flash);
573 spi_prettyprint_status_register_hex(status);
574
575 spi_prettyprint_status_register_atmel_at25_wpen(status);
576 spi_prettyprint_status_register_bp(status, 4);
577 /* FIXME: Pretty-print detailed sector protection status. */
578 spi_prettyprint_status_register_welwip(status);
579 return 0;
580}
581
582int spi_prettyprint_status_register_at26df081a(struct flashctx *flash)
583{
584 uint8_t status = spi_read_status_register(flash);
585 spi_prettyprint_status_register_hex(status);
586
587 spi_prettyprint_status_register_atmel_at25_srpl(status);
588 msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) is %sset\n",
589 (status & (1 << 6)) ? "" : "not ");
590 spi_prettyprint_status_register_atmel_at25_epewpp(status);
591 spi_prettyprint_status_register_atmel_at25_swp(status);
592 spi_prettyprint_status_register_welwip(status);
593 return 0;
594}
595
Stefan Taunercecb2c52013-06-20 22:55:41 +0000596/* Some Atmel DataFlash chips support per sector protection bits and the write protection bits in the status
597 * register do indicate if none, some or all sectors are protected. It is possible to globally (un)lock all
598 * sectors at once by writing 0 not only the protection bits (2 and 3) but also completely unrelated bits (4 and
599 * 5) which normally are not touched.
600 * Affected are all known Atmel chips matched by AT2[56]D[FLQ]..1A? but the AT26DF041. */
601int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000602{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000603 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 1 << 4, 0x00);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000604}
605
Stefan Taunercecb2c52013-06-20 22:55:41 +0000606int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000607{
608 /* FIXME: We should check the security lockdown. */
609 msg_cinfo("Ignoring security lockdown (if present)\n");
Stefan Taunercecb2c52013-06-20 22:55:41 +0000610 return spi_disable_blockprotect_at2x_global_unprotect(flash);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000611}
612
Stefan Tauner57794ac2012-12-29 15:04:20 +0000613int spi_disable_blockprotect_at25f(struct flashctx *flash)
614{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000615 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF);
Stefan Tauner57794ac2012-12-29 15:04:20 +0000616}
617
618int spi_disable_blockprotect_at25f512a(struct flashctx *flash)
619{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000620 return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 0, 0xFF);
Stefan Tauner57794ac2012-12-29 15:04:20 +0000621}
622
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000623int spi_disable_blockprotect_at25f512b(struct flashctx *flash)
624{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000625 return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 1 << 4, 0xFF);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000626}
627
628int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
629{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000630 return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0, 0xFF);
Stefan Tauner9530a022012-12-29 15:04:05 +0000631 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000632
633int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
634{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000635 return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000636}
637
Nikolay Nikolaevd0e3ea12013-06-28 21:29:08 +0000638/* === Eon === */
639
640int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash)
641{
642 uint8_t status = spi_read_status_register(flash);
643 spi_prettyprint_status_register_hex(status);
644
645 spi_prettyprint_status_register_srwd(status);
646 msg_cdbg("Chip status register: WP# disable (WPDIS) is %sabled\n", (status & (1 << 6)) ? "en " : "dis");
647 spi_prettyprint_status_register_bp(status, 3);
648 spi_prettyprint_status_register_welwip(status);
649 return 0;
650}
651
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000652/* === Intel/Numonyx/Micron - Spansion === */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000653
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000654int spi_disable_blockprotect_n25q(struct flashctx *flash)
655{
656 return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF);
657}
658
659int spi_prettyprint_status_register_n25q(struct flashctx *flash)
660{
661 uint8_t status = spi_read_status_register(flash);
662 spi_prettyprint_status_register_hex(status);
663
664 spi_prettyprint_status_register_srwd(status);
665 if (flash->chip->total_size <= 32 / 8 * 1024) /* N25Q16 and N25Q32: reserved */
666 spi_prettyprint_status_register_bit(status, 6);
667 else
668 msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
669 (status & (1 << 6)) ? "" : "not ");
670 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
671 spi_prettyprint_status_register_bp(status, 2);
672 spi_prettyprint_status_register_welwip(status);
673 return 0;
674}
675
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000676/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000677/* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000678int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash)
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000679{
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000680 return spi_disable_blockprotect_bp2_srwd(flash);
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000681}
682
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000683/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
684int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash)
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000685{
686 uint8_t status = spi_read_status_register(flash);
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000687 spi_prettyprint_status_register_hex(status);
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000688
689 spi_prettyprint_status_register_srwd(status);
690 msg_cdbg("Chip status register: Program Fail Flag (P_FAIL) is %sset\n",
691 (status & (1 << 6)) ? "" : "not ");
692 msg_cdbg("Chip status register: Erase Fail Flag (E_FAIL) is %sset\n",
693 (status & (1 << 5)) ? "" : "not ");
694 spi_prettyprint_status_register_bp(status, 2);
695 spi_prettyprint_status_register_welwip(status);
696 return 0;
697}
698
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000699/* === SST === */
700
701static void spi_prettyprint_status_register_sst25_common(uint8_t status)
702{
703 spi_prettyprint_status_register_hex(status);
704
705 spi_prettyprint_status_register_bpl(status);
706 msg_cdbg("Chip status register: Auto Address Increment Programming (AAI) is %sset\n",
707 (status & (1 << 6)) ? "" : "not ");
708 spi_prettyprint_status_register_bp(status, 3);
709 spi_prettyprint_status_register_welwip(status);
710}
711
712int spi_prettyprint_status_register_sst25(struct flashctx *flash)
713{
714 uint8_t status = spi_read_status_register(flash);
715 spi_prettyprint_status_register_sst25_common(status);
716 return 0;
717}
718
719int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash)
720{
721 static const char *const bpt[] = {
722 "none",
723 "1F0000H-1FFFFFH",
724 "1E0000H-1FFFFFH",
725 "1C0000H-1FFFFFH",
726 "180000H-1FFFFFH",
727 "100000H-1FFFFFH",
728 "all", "all"
729 };
730 uint8_t status = spi_read_status_register(flash);
731 spi_prettyprint_status_register_sst25_common(status);
732 msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]);
733 return 0;
734}
735
736int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash)
737{
738 static const char *const bpt[] = {
739 "none",
740 "0x70000-0x7ffff",
741 "0x60000-0x7ffff",
742 "0x40000-0x7ffff",
743 "all blocks", "all blocks", "all blocks", "all blocks"
744 };
745 uint8_t status = spi_read_status_register(flash);
746 spi_prettyprint_status_register_sst25_common(status);
747 msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]);
748 return 0;
749}