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Mark Marshall90021f22010-12-03 14:48:11 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Mark Marshall
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Mark Marshall90021f22010-12-03 14:48:11 +000014 */
15
16#include <stdlib.h>
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000017#include <strings.h>
Mark Marshall90021f22010-12-03 14:48:11 +000018#include <string.h>
19#include "flash.h"
20#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000021#include "hwaccess.h"
Mark Marshall90021f22010-12-03 14:48:11 +000022
23#define PCI_VENDOR_ID_OGP 0x1227
24
25/* These are the register addresses for the OGD1 / OGA1. If they are
26 * different for later versions of the hardware then we will need
27 * logic to select between the different hardware versions. */
28#define OGA1_XP10_BPROM_SI 0x0040 /* W */
29#define OGA1_XP10_BPROM_SO 0x0040 /* R */
30#define OGA1_XP10_BPROM_CE_BAR 0x0044 /* W */
31#define OGA1_XP10_BPROM_SCK 0x0048 /* W */
32#define OGA1_XP10_BPROM_REG_SEL 0x004C /* W */
33#define OGA1_XP10_CPROM_SI 0x0050 /* W */
34#define OGA1_XP10_CPROM_SO 0x0050 /* R */
35#define OGA1_XP10_CPROM_CE_BAR 0x0054 /* W */
36#define OGA1_XP10_CPROM_SCK 0x0058 /* W */
37#define OGA1_XP10_CPROM_REG_SEL 0x005C /* W */
38
39static uint8_t *ogp_spibar;
40
41static uint32_t ogp_reg_sel;
42static uint32_t ogp_reg_siso;
43static uint32_t ogp_reg__ce;
44static uint32_t ogp_reg_sck;
45
Stefan Tauner4b24a2d2012-12-27 18:40:36 +000046const struct dev_entry ogp_spi[] = {
Mark Marshall90021f22010-12-03 14:48:11 +000047 {PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"},
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000048
49 {0},
Mark Marshall90021f22010-12-03 14:48:11 +000050};
51
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100052static void ogp_request_spibus(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000053{
54 pci_mmio_writel(1, ogp_spibar + ogp_reg_sel);
55}
56
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100057static void ogp_release_spibus(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000058{
59 pci_mmio_writel(0, ogp_spibar + ogp_reg_sel);
60}
61
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100062static void ogp_bitbang_set_cs(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000063{
64 pci_mmio_writel(val, ogp_spibar + ogp_reg__ce);
65}
66
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100067static void ogp_bitbang_set_sck(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000068{
69 pci_mmio_writel(val, ogp_spibar + ogp_reg_sck);
70}
71
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100072static void ogp_bitbang_set_mosi(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000073{
74 pci_mmio_writel(val, ogp_spibar + ogp_reg_siso);
75}
76
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100077static int ogp_bitbang_get_miso(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000078{
79 uint32_t tmp;
80
81 tmp = pci_mmio_readl(ogp_spibar + ogp_reg_siso);
82 return tmp & 0x1;
83}
84
85static const struct bitbang_spi_master bitbang_spi_master_ogp = {
Mark Marshall90021f22010-12-03 14:48:11 +000086 .set_cs = ogp_bitbang_set_cs,
87 .set_sck = ogp_bitbang_set_sck,
88 .set_mosi = ogp_bitbang_set_mosi,
89 .get_miso = ogp_bitbang_get_miso,
90 .request_bus = ogp_request_spibus,
91 .release_bus = ogp_release_spibus,
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000092 .half_period = 0,
Mark Marshall90021f22010-12-03 14:48:11 +000093};
94
95int ogp_spi_init(void)
96{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000097 struct pci_dev *dev = NULL;
Mark Marshall90021f22010-12-03 14:48:11 +000098 char *type;
99
100 type = extract_programmer_param("rom");
101
102 if (!type) {
103 msg_perr("Please use flashrom -p ogp_spi:rom=... to specify "
104 "which flashchip you want to access.\n");
105 return 1;
106 } else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) {
107 ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL;
108 ogp_reg_siso = OGA1_XP10_BPROM_SI;
109 ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR;
110 ogp_reg_sck = OGA1_XP10_BPROM_SCK;
111 } else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) {
112 ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL;
113 ogp_reg_siso = OGA1_XP10_CPROM_SI;
114 ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR;
115 ogp_reg_sck = OGA1_XP10_CPROM_SCK;
116 } else {
117 msg_perr("Invalid or missing rom= parameter.\n");
Stefan Reinauera9c23422014-04-26 16:11:50 +0000118 free(type);
Mark Marshall90021f22010-12-03 14:48:11 +0000119 return 1;
120 }
Stefan Reinauera9c23422014-04-26 16:11:50 +0000121 free(type);
Mark Marshall90021f22010-12-03 14:48:11 +0000122
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000123 if (rget_io_perms())
124 return 1;
Mark Marshall90021f22010-12-03 14:48:11 +0000125
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000126 dev = pcidev_init(ogp_spi, PCI_BASE_ADDRESS_0);
127 if (!dev)
128 return 1;
Mark Marshall90021f22010-12-03 14:48:11 +0000129
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000130 uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0);
Niklas Söderlund89edf362013-08-23 23:29:23 +0000131 if (!io_base_addr)
132 return 1;
133
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000134 ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096);
135 if (ogp_spibar == ERROR_PTR)
David Hendricks8bb20212011-06-14 01:35:36 +0000136 return 1;
137
Anastasia Klimchuk30815fc2021-05-31 11:20:01 +1000138 if (register_spi_bitbang_master(&bitbang_spi_master_ogp, NULL))
Mark Marshall90021f22010-12-03 14:48:11 +0000139 return 1;
140
Mark Marshall90021f22010-12-03 14:48:11 +0000141 return 0;
142}