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Mark Marshall90021f22010-12-03 14:48:11 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Mark Marshall
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Mark Marshall90021f22010-12-03 14:48:11 +000014 */
15
16#include <stdlib.h>
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000017#include <strings.h>
Mark Marshall90021f22010-12-03 14:48:11 +000018#include <string.h>
19#include "flash.h"
20#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000021#include "hwaccess.h"
Mark Marshall90021f22010-12-03 14:48:11 +000022
23#define PCI_VENDOR_ID_OGP 0x1227
24
25/* These are the register addresses for the OGD1 / OGA1. If they are
26 * different for later versions of the hardware then we will need
27 * logic to select between the different hardware versions. */
28#define OGA1_XP10_BPROM_SI 0x0040 /* W */
29#define OGA1_XP10_BPROM_SO 0x0040 /* R */
30#define OGA1_XP10_BPROM_CE_BAR 0x0044 /* W */
31#define OGA1_XP10_BPROM_SCK 0x0048 /* W */
32#define OGA1_XP10_BPROM_REG_SEL 0x004C /* W */
33#define OGA1_XP10_CPROM_SI 0x0050 /* W */
34#define OGA1_XP10_CPROM_SO 0x0050 /* R */
35#define OGA1_XP10_CPROM_CE_BAR 0x0054 /* W */
36#define OGA1_XP10_CPROM_SCK 0x0058 /* W */
37#define OGA1_XP10_CPROM_REG_SEL 0x005C /* W */
38
Anastasia Klimchukab93e702021-05-27 09:08:40 +100039struct ogp_spi_data {
40 uint8_t *spibar;
Mark Marshall90021f22010-12-03 14:48:11 +000041
Anastasia Klimchukab93e702021-05-27 09:08:40 +100042 uint32_t reg_sel;
43 uint32_t reg_siso;
44 uint32_t reg__ce;
45 uint32_t reg_sck;
46};
Mark Marshall90021f22010-12-03 14:48:11 +000047
Thomas Heijligen4f5169d2021-05-04 15:32:17 +020048static const struct dev_entry ogp_spi[] = {
Mark Marshall90021f22010-12-03 14:48:11 +000049 {PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"},
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000050
51 {0},
Mark Marshall90021f22010-12-03 14:48:11 +000052};
53
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100054static void ogp_request_spibus(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000055{
Anastasia Klimchukab93e702021-05-27 09:08:40 +100056 struct ogp_spi_data *data = spi_data;
57 pci_mmio_writel(1, data->spibar + data->reg_sel);
Mark Marshall90021f22010-12-03 14:48:11 +000058}
59
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100060static void ogp_release_spibus(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000061{
Anastasia Klimchukab93e702021-05-27 09:08:40 +100062 struct ogp_spi_data *data = spi_data;
63 pci_mmio_writel(0, data->spibar + data->reg_sel);
Mark Marshall90021f22010-12-03 14:48:11 +000064}
65
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100066static void ogp_bitbang_set_cs(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000067{
Anastasia Klimchukab93e702021-05-27 09:08:40 +100068 struct ogp_spi_data *data = spi_data;
69 pci_mmio_writel(val, data->spibar + data->reg__ce);
Mark Marshall90021f22010-12-03 14:48:11 +000070}
71
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100072static void ogp_bitbang_set_sck(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000073{
Anastasia Klimchukab93e702021-05-27 09:08:40 +100074 struct ogp_spi_data *data = spi_data;
75 pci_mmio_writel(val, data->spibar + data->reg_sck);
Mark Marshall90021f22010-12-03 14:48:11 +000076}
77
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100078static void ogp_bitbang_set_mosi(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000079{
Anastasia Klimchukab93e702021-05-27 09:08:40 +100080 struct ogp_spi_data *data = spi_data;
81 pci_mmio_writel(val, data->spibar + data->reg_siso);
Mark Marshall90021f22010-12-03 14:48:11 +000082}
83
Anastasia Klimchuk5f5eaeb2021-05-26 09:54:08 +100084static int ogp_bitbang_get_miso(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000085{
Anastasia Klimchukab93e702021-05-27 09:08:40 +100086 struct ogp_spi_data *data = spi_data;
Mark Marshall90021f22010-12-03 14:48:11 +000087 uint32_t tmp;
88
Anastasia Klimchukab93e702021-05-27 09:08:40 +100089 tmp = pci_mmio_readl(data->spibar + data->reg_siso);
Mark Marshall90021f22010-12-03 14:48:11 +000090 return tmp & 0x1;
91}
92
93static const struct bitbang_spi_master bitbang_spi_master_ogp = {
Mark Marshall90021f22010-12-03 14:48:11 +000094 .set_cs = ogp_bitbang_set_cs,
95 .set_sck = ogp_bitbang_set_sck,
96 .set_mosi = ogp_bitbang_set_mosi,
97 .get_miso = ogp_bitbang_get_miso,
98 .request_bus = ogp_request_spibus,
99 .release_bus = ogp_release_spibus,
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000100 .half_period = 0,
Mark Marshall90021f22010-12-03 14:48:11 +0000101};
102
Anastasia Klimchukab93e702021-05-27 09:08:40 +1000103static int ogp_spi_shutdown(void *data)
104{
105 free(data);
106 return 0;
107}
108
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200109static int ogp_spi_init(void)
Mark Marshall90021f22010-12-03 14:48:11 +0000110{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000111 struct pci_dev *dev = NULL;
Mark Marshall90021f22010-12-03 14:48:11 +0000112 char *type;
Anastasia Klimchukab93e702021-05-27 09:08:40 +1000113 uint8_t *ogp_spibar;
114 uint32_t ogp_reg_sel;
115 uint32_t ogp_reg_siso;
116 uint32_t ogp_reg__ce;
117 uint32_t ogp_reg_sck;
Mark Marshall90021f22010-12-03 14:48:11 +0000118
119 type = extract_programmer_param("rom");
120
121 if (!type) {
122 msg_perr("Please use flashrom -p ogp_spi:rom=... to specify "
123 "which flashchip you want to access.\n");
124 return 1;
125 } else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) {
126 ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL;
127 ogp_reg_siso = OGA1_XP10_BPROM_SI;
128 ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR;
129 ogp_reg_sck = OGA1_XP10_BPROM_SCK;
130 } else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) {
131 ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL;
132 ogp_reg_siso = OGA1_XP10_CPROM_SI;
133 ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR;
134 ogp_reg_sck = OGA1_XP10_CPROM_SCK;
135 } else {
136 msg_perr("Invalid or missing rom= parameter.\n");
Stefan Reinauera9c23422014-04-26 16:11:50 +0000137 free(type);
Mark Marshall90021f22010-12-03 14:48:11 +0000138 return 1;
139 }
Stefan Reinauera9c23422014-04-26 16:11:50 +0000140 free(type);
Mark Marshall90021f22010-12-03 14:48:11 +0000141
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000142 if (rget_io_perms())
143 return 1;
Mark Marshall90021f22010-12-03 14:48:11 +0000144
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000145 dev = pcidev_init(ogp_spi, PCI_BASE_ADDRESS_0);
146 if (!dev)
147 return 1;
Mark Marshall90021f22010-12-03 14:48:11 +0000148
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000149 uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0);
Niklas Söderlund89edf362013-08-23 23:29:23 +0000150 if (!io_base_addr)
151 return 1;
152
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000153 ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096);
154 if (ogp_spibar == ERROR_PTR)
David Hendricks8bb20212011-06-14 01:35:36 +0000155 return 1;
156
Anastasia Klimchukab93e702021-05-27 09:08:40 +1000157 struct ogp_spi_data *data = calloc(1, sizeof(*data));
158 if (!data) {
159 msg_perr("Unable to allocate space for SPI master data\n");
160 return 1;
161 }
162 data->spibar = ogp_spibar;
163 data->reg_sel = ogp_reg_sel;
164 data->reg_siso = ogp_reg_siso;
165 data->reg__ce = ogp_reg__ce;
166 data->reg_sck = ogp_reg_sck;
167 if (register_shutdown(ogp_spi_shutdown, data)) {
168 free(data);
169 return 1;
170 }
171
172 if (register_spi_bitbang_master(&bitbang_spi_master_ogp, data))
Mark Marshall90021f22010-12-03 14:48:11 +0000173 return 1;
174
Mark Marshall90021f22010-12-03 14:48:11 +0000175 return 0;
176}
Thomas Heijligen4f5169d2021-05-04 15:32:17 +0200177
178const struct programmer_entry programmer_ogp_spi = {
179 .name = "ogp_spi",
180 .type = PCI,
181 .devs.dev = ogp_spi,
182 .init = ogp_spi_init,
183 .map_flash_region = fallback_map,
184 .unmap_flash_region = fallback_unmap,
185 .delay = internal_delay,
186};