1. 799c321 cbmem_top_chipset: Change the return value to uintptr_t by Elyes Haouas · 1 year, 8 months ago
  2. dd7ce4e nb/intel/x4x: Reflow long lines by Angel Pons · 3 years, 3 months ago
  3. 030d338 nb/intel: Add missing <types.h> by Elyes HAOUAS · 3 years, 5 months ago
  4. bbc80f4 nb/intel/x4x: Define and use MMCONF_BUS_NUMBER by Angel Pons · 3 years, 6 months ago
  5. dddd1cc src/northbridge: Drop unneeded empty lines by Elyes HAOUAS · 3 years, 11 months ago
  6. d1c590a nb/intel/x4x: Define and use `HOST_BRIDGE` macro by Angel Pons · 4 years ago
  7. 8f917b1 nb/intel/x4x: Refactor `decode_pcie_bar` by Angel Pons · 4 years ago
  8. ecec947 nb/intel/x4x: Change signature of `decode_pciebar` by Angel Pons · 4 years ago
  9. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  10. 4b42983 src/northbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  11. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  12. ef90609 src: capitalize 'RAM' by Elyes HAOUAS · 4 years, 5 months ago
  13. 340e4b8 lib/cbmem_top: Add a common cbmem_top implementation by Arthur Heymans · 4 years, 9 months ago
  14. d53fd70 intel/smm/gen1: Use smm_subregion() by Kyösti Mälkki · 5 years ago
  15. cd7a70f soc/intel: Use common romstage code by Kyösti Mälkki · 4 years, 11 months ago
  16. a963acd arch/x86: Add <arch/romstage.h> by Kyösti Mälkki · 4 years, 11 months ago
  17. f091f4d intel/smm/gen1: Rename header file by Kyösti Mälkki · 5 years ago
  18. 544878b arch/x86: Add postcar_frame_common_mtrrs() by Kyösti Mälkki · 5 years ago
  19. 5bc641a cpu/intel: Refactor platform_enter_postcar() by Kyösti Mälkki · 5 years ago
  20. fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago[Renamed from src/northbridge/intel/x4x/ram_calc.c]
  21. bccd2b6 intel/i945,gm45,pineview,x4x: Fix stage cache location by Kyösti Mälkki · 5 years ago
  22. aba8fb1 intel/i945,gm45,pineview,x4x: Move stage cache support function by Kyösti Mälkki · 5 years ago
  23. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  24. f74f6cb nb/intel/{gm45,i945,x4x}: Correct array bounds checks by Jacob Garber · 5 years ago
  25. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  26. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  27. 4c65bfc nb/intel/x4x: Use common code for SMM in TSEG by Arthur Heymans · 6 years ago
  28. 64f6b71 src/northbridge: Fix typo by Elyes HAOUAS · 6 years ago
  29. 4ff675e nb/intel/x4x: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  30. 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  31. 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
  32. 70a1dda nb/intel/x4x: Fix issues found by checkpatch.pl by Arthur Heymans · 7 years ago
  33. 823020d intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup by Kyösti Mälkki · 8 years ago
  34. 811932a intel i945 gm45 x4x: Apply cbmem_top() alignment by Kyösti Mälkki · 8 years ago
  35. a4ffe9d intel post-car: Separate files for setup_stack_and_mtrrs() by Kyösti Mälkki · 8 years ago
  36. 27f94ee x4x: add non documented vram sizes by Arthur Heymans · 8 years ago
  37. 5680faf nb/intel/x4x: Move to early cbmem by Damien Zammit · 8 years ago
  38. 43a1f78 northbridge/intel/x4x: Intel 4-series northbridge support by Damien Zammit · 9 years ago