Gitiles
Code Review Sign In
review.coreboot.org / coreboot / refs/heads/main / src / northbridge / intel / sandybridge / pei_data.h
  1. ee12634 nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree by Keith Hui · 5 months ago
  2. b14b96d northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 by Patrick Rudolph · 6 months ago
  3. 6e5aabd nb/intel/sandybridge: Use SPDX headers by Angel Pons · 4 years, 3 months ago
  4. 7c49cb8 nb/intel/sandybridge: Tidy up code and comments by Angel Pons · 4 years, 4 months ago
  5. 4410594 nb/intel/sandybridge: Update pei_data comments by Patrick Rudolph · 5 years ago
  6. c4e4193 src: Add missing include <stdint.h> by Elyes HAOUAS · 6 years ago
  7. d44221f Move compiler.h to commonlib by Nico Huber · 6 years ago
  8. 6a00113 Rename __attribute__((packed)) --> __packed by Stefan Reinauer · 7 years ago
  9. 69634c3 northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment by Paul Menzel · 10 years ago
  10. 932fbd6 Add DDR refresh config to pei data structure. by Shawn Nematbakhsh · 11 years ago
  11. 1cc3416 Add support to enable/disable builtin GbE (again) by Stefan Reinauer · 11 years ago
  12. 714212a Revert "Add support to enable/disable builtin GbE" by Kyösti Mälkki · 11 years ago
  13. d358a50 Add support to enable/disable builtin GbE by Stefan Reinauer · 11 years ago
  14. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  15. 7e8c8e9 Add PCIe init and NMode flag to PEI data structure by Stefan Reinauer · 12 years ago
  16. e8179b5 Add ddr3lv_support flag to pei_data structure by Duncan Laurie · 12 years ago
  17. 53508fe pei_data.h: Fix comment by Marc Jones · 12 years ago
  18. 48a4a7f Provide MRC with a console printing callback function by Vadim Bendebury · 12 years ago
  19. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago