1. fcf66e3 Enable caching for Via C7 CPUs, and also improve readability. Tested on hardware by Corey Osgood · 15 years ago
  2. 5a90884 last kontron commit. by Ronald G. Minnich · 16 years ago
  3. 77407f5 This is working up to the ljmpl to protected mode. It has all the by Ronald G. Minnich · 16 years ago
  4. 52bdace Again, this probably won't work but I want to make the code visible so by Ronald G. Minnich · 16 years ago
  5. 509ab45 This is a trivial commit and I want to get other people to look at the code. by Ronald G. Minnich · 16 years ago
  6. 5f27d20 by Ronald G. Minnich · 16 years ago
  7. 41bb62d by Ronald G. Minnich · 16 years ago
  8. 2fe48ba Add this file from v2. Not build tested, just want to get it in. by Ronald G. Minnich · 16 years ago
  9. b6c89ed Improve the setup of MTRRs in stage1 to handle alignment and power of by Marc Jones · 16 years ago
  10. 9d6d811 This patch converts __FUNCTION__ to __func__, since __func__ is standard. by Myles Watson · 16 years ago
  11. f287276 Add AP detection to stage0 to prevent APs from re-initializing mainboard setup by Marc Jones · 16 years ago
  12. a794edb Setup the MTRRs in stage1 so that memory and cache are available throughout by Marc Jones · 16 years ago
  13. 333cdb1 Coreboot uses the compiler option -mregparm=3 which causes variables to by Marc Jones · 16 years ago
  14. 2d5920e Remove unused pciconf.h header with constants that everyone uses by value instead per convention by Mart Raudsepp · 16 years ago
  15. f59b4ca This patch removes the offset_pciio since there is never an offset_pciio an by Myles Watson · 16 years ago
  16. 034ea33 Fix breakage of k8 targets caused by r1085. Thanks to Myles Watson for by Corey Osgood · 16 years ago
  17. 305d400 This patch fixes a few small problems and gets cn700 to read from an IDE by Corey Osgood · 16 years ago
  18. a492ff7 Kill off stage1_mtrr.c completely, and bring in mtrr.c for stage2 from v2. by Ronald G. Minnich · 16 years ago
  19. 4697e91 This is an emergency fix for the kontron. This fix now allows us to boot to by Ronald G. Minnich · 16 years ago
  20. 758fecb Move OPTION_TABLE to a menu config option, and default it to enabled. This allows by Corey Osgood · 16 years ago
  21. 4216c13 Make C7/CN700 boot to memtest86, and pass that test. Booting is very slow, ~15min to get to a memtest by Corey Osgood · 16 years ago
  22. 80aa586 by Myles Watson · 16 years ago
  23. e4d46b9 early_mtrr_init() nukes all MTRRs including those which we use for CAR. by Carl-Daniel Hailfinger · 16 years ago
  24. f7a5eaf5 Add support for creating an smm top-level object. by Ronald G. Minnich · 16 years ago
  25. db67cc9a Document unexpected clobbering of stage0 code. by Carl-Daniel Hailfinger · 16 years ago
  26. eb09a75 Fix a missing dependency on arch/x86/stage0_common.S (that's an included by Carl-Daniel Hailfinger · 16 years ago
  27. 8e7ca90 back out until this issue is really fixed. by Stefan Reinauer · 16 years ago
  28. 645bd27 Experimental backout of the critical code parts in r1057 as requested by Carl-Daniel Hailfinger · 16 years ago
  29. 5a6f83c The Core2Duo CAR code did set up the stack incorrectly. In combination by Carl-Daniel Hailfinger · 16 years ago
  30. 675731b hack to make v3 rom access a lot faster. by Stefan Reinauer · 16 years ago
  31. 20e53b2 get into ram init on kontron board. by Stefan Reinauer · 16 years ago
  32. 0153293 Not a single file is being rebuilt in v3 if build.h changes. That means by Carl-Daniel Hailfinger · 16 years ago
  33. b875333 This patch makes it so serengeti builds again. by Myles Watson · 16 years ago
  34. 5a205b9 Add core2 stage1.c dependency by Ronald G. Minnich · 16 years ago
  35. 99e68b9 Kill v2 leftovers. by Carl-Daniel Hailfinger · 16 years ago
  36. cb9db3b We are woefully unaware about how much stack v3 really uses. by Carl-Daniel Hailfinger · 16 years ago
  37. fbff7d2 The VIA C7 CAR disable code in v3 had a nasty bug which caused the by Carl-Daniel Hailfinger · 16 years ago
  38. f37c28c I'm committing often as I don't want people to run over each other (and I am waiting on BlueGene to schedule me by Ronald G. Minnich · 16 years ago
  39. 4b9385a initial intel core car code. by Stefan Reinauer · 16 years ago
  40. 50403f0 Filling in core 2 support. by Ronald G. Minnich · 16 years ago
  41. 4a03ab0 initram is linked with very special options to ld. It is not immediately by Carl-Daniel Hailfinger · 16 years ago
  42. 2b105d9 This patch removes code related to PCI type 2 configuration cycles (gone as of by Myles Watson · 16 years ago
  43. f77a0a2 Update K8 FID/VID setup to match coreboot v2. Add support for 100MHz FIDs by Marc Jones · 16 years ago
  44. 4213668 Once we touch the MTRRs in VIA disable_car(), the CPU resets. Since by Carl-Daniel Hailfinger · 16 years ago
  45. 4964e25 Get via to use standard mtrr init functions. Start to document them. by Ronald G. Minnich · 16 years ago
  46. 4f2df50 no PIRQ table by Ronald G. Minnich · 16 years ago
  47. cfa4c50 This is the beginning of support for saving base registers that already have a v by Ronald G. Minnich · 16 years ago
  48. 81b3209 This patch clears up a few warnings in stage1 code. It removes an unused variable, moves a declaration into an ifdef, and adds a cast. by Myles Watson · 16 years ago
  49. e7ea688 Trivial fixes of printk \r\n and white space. by Myles Watson · 16 years ago
  50. 9b90a6f Fix a bunch of Doxygen warnings in v3 (trivial). by Uwe Hermann · 16 years ago
  51. 84b3e13 This patch adds explicit casts to remove some compiler warnings. by Myles Watson · 16 years ago
  52. f4037ef This is the patch which will let VIA C7 continue in v3 during/after a by Carl-Daniel Hailfinger · 16 years ago
  53. ff5c454 by Ronald G. Minnich · 16 years ago
  54. 20621bd I noticed that free regions provided by search_global_resources() don't have by Jordan Crouse · 16 years ago
  55. 5d37f85 the multiboot map is generated too early in by Jordan Crouse · 16 years ago
  56. 4c275b0 The option table C file is a generated file and lives inside the build by Carl-Daniel Hailfinger · 16 years ago
  57. 8b1b420 We need a way to find out where our stack and our global variables are by Carl-Daniel Hailfinger · 16 years ago
  58. 33de3b2 Right now we face the problem that we can't support processors which by Carl-Daniel Hailfinger · 16 years ago
  59. 7644420 Commit a few things I forgot with the vt8237 patch, and also a couple by Corey Osgood · 16 years ago
  60. 371f3e6 I need this to get my work done and there were no better proposals. by Ronald G. Minnich · 16 years ago
  61. 352c1b5 Whitespace fixes, readability improvements. by Carl-Daniel Hailfinger · 16 years ago
  62. 3bb18f8 Add support for Cache-as-RAM on VIA C7 processors in v3. by Carl-Daniel Hailfinger · 16 years ago
  63. bf6d160 This gets us to etherboot again, but this time devices are set by Ronald G. Minnich · 16 years ago
  64. f04465f Fix v3 GeodeLX stack and global variable pointer corruption. by Carl-Daniel Hailfinger · 16 years ago
  65. 73d4383 We have lots of bit-for-bit identical code in the various stage0 by Carl-Daniel Hailfinger · 16 years ago
  66. 96fcf12 stage0 code for K8 and i586 has lots of mostly identical parts even in CAR code. by Carl-Daniel Hailfinger · 16 years ago
  67. ef06e83 stage0 code for GeodeLX, K8 and i586 is mostly identical everywhere by Carl-Daniel Hailfinger · 16 years ago
  68. 7b5c164 Make sure the reset vector code for K8, GeodeLX and i586 is by Carl-Daniel Hailfinger · 16 years ago
  69. 6cc4f66 Cover for unknown strange thing that just happened in svn. by Ronald G. Minnich · 16 years ago
  70. b2ab559 trivial: make sure that all elf notes are stripped. by Ronald G. Minnich · 16 years ago
  71. 76b818b Move the generic intel x86 init code in arch/x86/stage0_i586.S to by Carl-Daniel Hailfinger · 16 years ago
  72. 8e6d45e Minor fixes and improvements for v3, mostly for Kconfig files (trivial). by Uwe Hermann · 16 years ago
  73. 11c6d0d m57sli mostly builds again. The stage0 is too large at 24k. by Ronald G. Minnich · 16 years ago
  74. 6d38e04 quick emergency fix for gnu tools that now have elaborate note names by Ronald G. Minnich · 16 years ago
  75. be03d18 Finally, after two years, put in real code for stop_ap(). Code has to be by Ronald G. Minnich · 16 years ago
  76. f9dc3f1 by Jordan Crouse · 16 years ago
  77. e053a10 substantial cleanups for k8. by Ronald G. Minnich · 16 years ago
  78. 28ecbea The K8 is one example, but there are other devices (e.g. I2C) that also have by Ronald G. Minnich · 16 years ago
  79. ade1cd1 The current K8 stack preservation code in disable_car() works by chance, by Carl-Daniel Hailfinger · 16 years ago
  80. f9b1140 Improve debugging printks for LAR and PCI access. by Carl-Daniel Hailfinger · 16 years ago
  81. 72be710b With this change, we get all the way to stage 2 and this output, at by Ronald G. Minnich · 16 years ago
  82. 47043d7 add some printks to raminit and correct a typo on one comment. by Ronald G. Minnich · 16 years ago
  83. 4aebc1b Fix a really stupid error on my part :-) by Ronald G. Minnich · 16 years ago
  84. 5f18641 Hacks to get us trying to read the smbus. by Ronald G. Minnich · 16 years ago
  85. df00b48 One typo and one change to get our bootblock back into 20k. by Ronald G. Minnich · 16 years ago
  86. ff2ddcb This gets us back to a compiling k8 target. by Ronald G. Minnich · 16 years ago
  87. f365719 This is closer! There are < 10 functions to be worked out, so most of by Ronald G. Minnich · 16 years ago
  88. fd31dee Closer to compiling. Add the fidvid functions. Continue to remove romcc by Ronald G. Minnich · 16 years ago
  89. 6fd7abe Off to bed. I'm done for now. by Ronald G. Minnich · 16 years ago
  90. 08f7cd8 stage1_main() calling conventions changed to use two parameters instead by Carl-Daniel Hailfinger · 16 years ago
  91. d130a25 This code is not in a working state but I want to get it into the repo by Ronald G. Minnich · 16 years ago
  92. b0144f1 This code is not in a working state but I want to get it into the repo by Ronald G. Minnich · 16 years ago
  93. 3e9b43f BIST handling. Unless I'm mistaken, we already die() in stage1_main() if by Carl-Daniel Hailfinger · 16 years ago
  94. 268630d This is an intermediate state of the initcpus support for k8. by Ronald G. Minnich · 16 years ago
  95. 96e0fd1 Fixes to make k8 and others work. by Ronald G. Minnich · 16 years ago
  96. 62f8ea8 This set of changes gets us much farther, in fact, we get into initram. by Ronald G. Minnich · 16 years ago
  97. 282ffb5 Enable compilation with -fwhole-program for initram. The setting can be by Carl-Daniel Hailfinger · 16 years ago
  98. 05095ae mainboard_vendor and mainboard_name are constant. Follow that convention by Carl-Daniel Hailfinger · 16 years ago
  99. 8f90734 Fix a simply bug in the find device function. by Ronald G. Minnich · 16 years ago
  100. b2aa6a0 add libstage1.c by Ronald G. Minnich · 16 years ago