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review.coreboot.org / coreboot / fe481eb3e5e8e8d39d892bfcfe085bc7d49ff886 / src / northbridge / intel / pineview / memmap.c
  1. fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago[Renamed from src/northbridge/intel/pineview/ram_calc.c]
  2. bccd2b6 intel/i945,gm45,pineview,x4x: Fix stage cache location by Kyösti Mälkki · 5 years ago
  3. aba8fb1 intel/i945,gm45,pineview,x4x: Move stage cache support function by Kyösti Mälkki · 5 years ago
  4. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  5. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  6. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  7. de6bda6 nb/intel/pineview: Use common code for SMM in TSEG by Arthur Heymans · 6 years ago
  8. 64f6b71 src/northbridge: Fix typo by Elyes HAOUAS · 6 years ago
  9. aa7cf55 nb/intel/pineview: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  10. 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  11. 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
  12. 62e784b nb/intel/pineview: Move to early cbmem by Arthur Heymans · 7 years ago
  13. f564606 nb/intel/pineview: Fix decode_pciebar() by Damien Zammit · 9 years ago
  14. f7060f1 northbridge/intel/pineview: Add remaining boilerplate code for northbridge by Damien Zammit · 9 years ago
  15. 6247793 northbridge/intel/pineview: Add minimal Pineview northbridge by Damien Zammit · 9 years ago