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review.coreboot.org / coreboot / fce128cdfb817eb8f8a88c3a815fb109e8a0a504 / src / southbridge / amd / agesa / hudson / spi.c
  1. fce128c Hudson: Port to 64bit by Stefan Reinauer · 9 years ago
  2. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  3. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  4. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 10 years ago
  5. 2fa8cc3 AGESA hudson: Fix SPI writes by Kyösti Mälkki · 10 years ago
  6. 9f0a2be AMD SPI: Optimise for longer writes by Kyösti Mälkki · 10 years ago
  7. 1110495 SPI: Split writes using spi_crop_chunk() by Kyösti Mälkki · 10 years ago
  8. 93d9f92 spi: Change spi_xfer to work in units of bytes instead of bits. by Gabe Black · 10 years ago
  9. 1e18735 spi: Remove unused parameters from spi_flash_probe and setup_spi_slave. by Gabe Black · 10 years ago
  10. 9b800ae southbridge/amd: Change #if defined to #if IS_ENABLED by Dave Frodin · 10 years ago
  11. 991e951 southbridge/amd/agesa/hudson: Refactor SPI controller driver by Alexandru Gagniuc · 10 years ago
  12. 01e0adf southbridge/amd/agesa/hudson: Clean up AGESA #includes by Alexandru Gagniuc · 10 years ago
  13. 9157145 AMD Kabini: Modify Hudson southbridge to support new AMD processor by Siyuan Wang · 11 years ago
  14. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  15. 600784e spi.h: Rename the spi.h to spi-generic.h by Zheng Bao · 12 years ago
  16. 3316cf2 Claim the SPI bus before writes if the IMC ROM is present by Martin Roth · 12 years ago
  17. 7bcffa5 AMD S3: Leverage the public SPI routine by Zheng Bao · 12 years ago
  18. 246e84b AGESA F15 wrapper for Hudson. by zbao · 12 years ago