- fb51661 superio/ite: Unify it8772f with common code by Joel Linn · 5 months ago
- 7bde4e8 superio/ite/it8772f/chip.h: Use 'bool' when appropriate by Elyes Haouas · 1 year, 9 months ago
- dd96ab6 cpu/intel/haswell: Move chip_ops to cpu cluster by Arthur Heymans · 2 years, 9 months ago
- 4c4bd3c soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to devicetree by Arthur Heymans · 1 year, 9 months ago
- 29e71b1 broadwell: Move some MRC/refcode settings to devicetree by Angel Pons · 3 years, 2 months ago
- af4bd56 sb/intel: Use `bool` for PCIe coalescing option by Angel Pons · 2 years, 8 months ago
- d0b7a53 mb/google/jecht: Use Haswell CPU code by Angel Pons · 3 years, 10 months ago
- 3cc2c38 soc/intel/broadwell: Separate PCH in devicetree by Angel Pons · 3 years, 10 months ago
- f2a295a mb/google/jecht: Prepare devicetree for PCH split by Angel Pons · 3 years, 10 months ago
- 4a6c0a3 broadwell: Factor out PIRQ routing from devicetree by Angel Pons · 4 years, 1 month ago
- 4276050 mb/*/*/devicetree.cb: Normalize disabled PIRQ values by Angel Pons · 4 years, 1 month ago
- a0259b4 mb/google/{beltino,jecht}: Drop SIO configuration lines by Nico Huber · 4 years, 8 months ago
- 3044af7 mb/google,samsung/*: Add LPC TPM chip driver to devicetree by Matt DeVillier · 6 years ago
- 0148fcb Combine Broadwell Chromeboxes using variant board scheme by Matt DeVillier · 8 years ago
- 04746fc google/jecht: add new mainboard by Patrick Georgi · 9 years ago