- fb51661 superio/ite: Unify it8772f with common code by Joel Linn · 5 months ago
- 7bde4e8 superio/ite/it8772f/chip.h: Use 'bool' when appropriate by Elyes Haouas · 1 year, 9 months ago
- dd96ab6 cpu/intel/haswell: Move chip_ops to cpu cluster by Arthur Heymans · 2 years, 9 months ago
- 600fa26 nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree by Arthur Heymans · 1 year, 9 months ago
- af4bd56 sb/intel: Use `bool` for PCIe coalescing option by Angel Pons · 2 years, 8 months ago
- ba5761a cpu/intel/haswell: Factor out ACPI C-state values by Angel Pons · 3 years, 10 months ago
- 8084b38 sb/intel/lynxpoint/sata: Always use AHCI mode by Angel Pons · 3 years, 10 months ago
- 9f78127 lynxpoint: Factor out PIRQ routing from devicetree by Angel Pons · 4 years, 1 month ago
- 4276050 mb/*/*/devicetree.cb: Normalize disabled PIRQ values by Angel Pons · 4 years, 1 month ago
- 8aab787 haswell: Move some MRC settings to devicetree by Angel Pons · 4 years, 1 month ago
- a0259b4 mb/google/{beltino,jecht}: Drop SIO configuration lines by Nico Huber · 4 years, 8 months ago
- 3044af7 mb/google,samsung/*: Add LPC TPM chip driver to devicetree by Matt DeVillier · 6 years ago
- 81ae67a Add Haswell Chromeboxes/Chromebase using variant board scheme by Matt DeVillier · 8 years ago