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review.coreboot.org / coreboot / fb19c8aae088eb36808c1988538229feb2c45691 / src / northbridge / intel / sandybridge / raminit_common.c
  1. fb19c8a nb/intel/sandybridge: add macros for byte lane register offsets by Felix Held · 4 years, 6 months ago
  2. 283b4466 nb/intel/sandybridge: refactor code around lane_base[] by Felix Held · 4 years, 6 months ago
  3. 3b90603 nb/intel/sandybridge: refactor lane_registers[] by Felix Held · 4 years, 6 months ago
  4. b31d1d7 nb/intel/sandybridge: Repurpose HOST_BRIDGE macro by Angel Pons · 4 years, 6 months ago
  5. 63ae8de nb/intel/sandybridge: Drop 'or zero' instances by Angel Pons · 4 years, 6 months ago
  6. 891f2bc nb/intel/sandybridge: Tidy up raminit code by Angel Pons · 4 years, 6 months ago
  7. 8852188 nb/intel/sandybridge: Add a bunch of MCHBAR defines by Angel Pons · 4 years, 6 months ago
  8. 1aba2a3 nb/intel/sandybridge: Make MCHBAR arithmetics consistent by Angel Pons · 4 years, 6 months ago
  9. ef4fe3e nb/intel/sandybridge: replace .val_4028 with .io_latency by Felix Held · 4 years, 7 months ago
  10. 2a9a49b nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase by Angel Pons · 4 years, 7 months ago
  11. 50b7ed2 nb/intel/sandybridge: add and use memory thermal configuration registers by Felix Held · 4 years, 7 months ago
  12. f54ae38 nb/intel/sandybridge: add and use ME stolen memory and lock bit defines by Felix Held · 4 years, 7 months ago
  13. dee167e nb/intel/sandybridge: add and use more MCHBAR register defines by Felix Held · 4 years, 7 months ago
  14. 651f99f nb/intel/sandybridge: use MESEG register names from datasheet by Felix Held · 4 years, 7 months ago
  15. 8fa02a8 nb/intel/sandybridge: simplify ME lock and memory enable bit write by Felix Held · 4 years, 7 months ago
  16. bc3668a nb/intel/sandybridge: add and use defines for ME base and mask registers by Felix Held · 4 years, 7 months ago
  17. 4902fee nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers by Felix Held · 4 years, 7 months ago
  18. f97c1c9 {nb,soc}: Replace min/max() with MIN/MAX() by Elyes HAOUAS · 4 years, 8 months ago
  19. 9c8895f nb/intel/sandybridge: Remove variable set but not used by Elyes HAOUAS · 5 years ago
  20. 87c4f11 intel/sandybridge: Make timC training more robust. by Tobias Diedrich · 7 years ago
  21. 1d3b3c3 {src,util}: Remove duplicated includes by Elyes HAOUAS · 5 years ago
  22. e0c181d nb/intel/sandybridge: Set uninitialized run length by Jacob Garber · 5 years ago
  23. b1434fc Fix 'unsigned int' to bare use of 'unsigned' by Subrata Banik · 5 years ago
  24. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  25. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  26. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  27. e737755 device: Use pcidev_path_on_root() by Kyösti Mälkki · 6 years ago
  28. 53b08c3 cpuid: Add helper function for cpuid(1) functions by Subrata Banik · 6 years ago
  29. 2de750b nb/intel/raminit: Remove unused headers by Patrick Rudolph · 6 years ago
  30. 89af71c sandybridge/raminit_common.c: fix printram statement by Iru Cai · 6 years ago
  31. 9fe248f sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining places by Felix Held · 6 years ago
  32. 9cf1dd2 sandybridge/raminit_common: use macro for execute command queue register by Felix Held · 6 years ago
  33. f9b826a sandybridge/raminit_common: use FOR_ALL_CHANNELS macro by Felix Held · 6 years ago
  34. b802c07 sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2] by Felix Held · 6 years ago
  35. 2463aa9 sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2] by Felix Held · 6 years ago
  36. 2bb3cdf sandybridge/raminit_common: use MCHBAR32 macro everywhere by Felix Held · 6 years ago
  37. 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
  38. 652c491 nb/intel/sandybridge/raminit: Fix PDWN_mode on desktops by Patrick Rudolph · 7 years ago
  39. b009ac4 nb/intel/sandybridge/raminit: Fix non ASCII char by Patrick Rudolph · 6 years ago
  40. 5ee9bc1 nb/intel/sandybridge/raminit: Set REFIx9 according to spec by Patrick Rudolph · 7 years ago
  41. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  42. dabebc3 nb/intel/sandybridge: support more XMP timings by Dan Elkouby · 6 years ago
  43. adda3f81 nb/intel/sandybridge: Add required space before opening parenthesis '(' by Elyes HAOUAS · 6 years ago
  44. 6af8aab nb/intel/sandybridge/raminit: Fix setting scramble seed for CH1 by Arthur Heymans · 7 years ago
  45. ac4f216 nb/intel/sandybridge: Refactor dram_dimm_mapping() by Nico Huber · 7 years ago
  46. b794a69 nb/intel/sandybridge/raminit: Add Kconfig option for fuses by Patrick Rudolph · 7 years ago
  47. 58d16af nb/intel/sandybridge/raminit: Fix dual DIMM command rate by Patrick Rudolph · 7 years ago
  48. abc504f nb/intel/sandybridge: Use macros to determine min and max of timA by Arthur Heymans · 7 years ago
  49. 19c3dad nb/intel/sandybridge/raminit: Fix odt stretch by Patrick Rudolph · 8 years ago
  50. 368b615 nb/intel/sandybridge/raminit: Reduce log level by Patrick Rudolph · 8 years ago
  51. 3c8cb97 nb/intel/sandybridge/raminit: Fix normalize_training by Patrick Rudolph · 8 years ago
  52. 413edc8 nb/intel/sandybridge/raminit: Add debugging output by Patrick Rudolph · 8 years ago
  53. d45114f intel PCI ops: Remove explicit PCI MMCONF access by Kyösti Mälkki · 11 years ago
  54. fd5fa2a nb/intel/sandybridge/raminit: Split raminit.c by Patrick Rudolph · 8 years ago