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review.coreboot.org / coreboot / f6c20681d1d1fa66212ab58b6dc1e9112fe4651d / src / cpu / intel / model_206ax / model_206ax.h
  1. f6c2068 intel/nehalem,sandybridge: Move stage_cache support function by Kyösti Mälkki · 5 years ago
  2. a6a396d cpu/intel/{haswell,model_206{5,a}x}: Use MSR_CORE_THREAD_COUNT for msr at 0x35 by Elyes HAOUAS · 5 years ago
  3. edbf5d9 cpu/intel/model_206ax: Use parallel MP init by Arthur Heymans · 7 years ago
  4. dfbe6bd src: Add missing include <stdint.h> by Elyes HAOUAS · 6 years ago
  5. 419bfbc src: Move common IA-32 MSRs to <cpu/x86/msr.h> by Elyes HAOUAS · 6 years ago
  6. dfaff4d cpu/intel/model_206ax: detect number of MCE banks by Dan Elkouby · 6 years ago
  7. 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
  8. 68f6888 Revert "model_206ax: Use parallel MP init" by Arthur Heymans · 6 years ago
  9. 5fbe788 model_206ax: Use parallel MP init by Arthur Heymans · 7 years ago
  10. 67031a5 cpu/intel/sandybridge: Put stage cache into TSEG by Arthur Heymans · 7 years ago
  11. 7b5f12b9 cpu/intel: Indent with tabs by Lee Leahy · 7 years ago
  12. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  13. a3e41c0 Migrate 206ax to SMM_MODULES by Vladimir Serbinenko · 9 years ago
  14. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  15. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  16. 644e83b speedstep: Deduplicate some MSR identifiers by Patrick Georgi · 12 years ago
  17. 5563211 CPU: Add option to set TCC activation offset by Duncan Laurie · 12 years ago
  18. c0f2cfb Fix comment to reference IvyBridge, too by Stefan Reinauer · 12 years ago
  19. 22935e1 CPU: Set flex ratio to nominal TDP ratio in bootblock by Duncan Laurie · 12 years ago
  20. 4e4320f CPU: Update ivybridge PP1 current limit value by Duncan Laurie · 12 years ago
  21. 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 12 years ago
  22. 5c55463 Add support for Intel Sandybridge CPU by Stefan Reinauer · 12 years ago