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review.coreboot.org / coreboot / f42e1770f968adbb4d197917d130219d193081a3 / src / cpu / x86 / lapic
  1. 7ce8c54 1201_ht_bus0_dev0_fidvid_core.diff by Stefan Reinauer · 17 years ago
  2. a7c70bc Fix hang during secondary CPU sibling init caused by nested spinlocks. by Steven J. Magnani · 18 years ago
  3. 6ca7636 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 by arch import user (historical) · 18 years ago
  4. ef03afa Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34 by arch import user (historical) · 18 years ago
  5. a335402 serialize cpus for >2 by Yinghai Lu · 18 years ago
  6. a9e632c - First stab at getting the ppc ports building and working. by Eric Biederman · 18 years ago
  7. f84926e tell people that the segment descriptors are different for ROMCC and GCC code. by Li-Ta Lo · 18 years ago
  8. f8a2ddd - To reduce confuse rename the parts of linuxbios bios that run from by Eric Biederman · 18 years ago
  9. 0afcba7 Changes to allow Via/Epia code to be compiled after recent code changes. by Mark Wilkinson · 18 years ago
  10. f3ed1cf - HDAMA boots! by Eric Biederman · 18 years ago
  11. 7003ba4 - First stab at running linuxbios without the old static device tree. by Eric Biederman · 18 years ago
  12. fcd5ace - Add new cvs code to cvs by Eric Biederman · 18 years ago