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review.coreboot.org / coreboot / f31abe31f0dd47a9b99a4cabecd5f414a07418d4 / src / southbridge
  1. b06bd8d i3100: configure pci irqs by Sven Schnelle · 12 years ago
  2. 56f2a6d CIMX wrapper: remove redudant traversing sb800 and sb900 CIMX dir by Kerry Sheh · 12 years ago
  3. f61ad93 i3100: add sata_ports_implemented option by Sven Schnelle · 12 years ago
  4. ab46c15 i3100: Add init sequence by Sven Schnelle · 12 years ago
  5. 0f1dc4e Add subsystem callbacks for VT8237x and VT890 family of chipsets by Rudolf Marek · 13 years ago
  6. a31bb07 Unify ID_SECTION_OFFSET and mark it deprecated by Patrick Georgi · 12 years ago
  7. 75fb40e Add missing HAVE_HARD_RESET by Sven Schnelle · 12 years ago
  8. b5d81eb rs780: correct comment in switching_gpp_configurations() by Jonathan A. Kollasch · 12 years ago
  9. f3fe3d2 rs780: use bitwise rather than boolean not by Jonathan A. Kollasch · 12 years ago
  10. 8bd41cd rs780: power down GPPSB SB lane pads in correct PCIe core by Jonathan A. Kollasch · 12 years ago
  11. f154c01 Persimmon audio codec verb patch. by Marc Jones · 12 years ago
  12. 4c132bb Fix AMD 8132 and 8151 southbridge builds by Kyösti Mälkki · 12 years ago
  13. 7519d77 RS780: print the vgainfo by Denis 'GNUtoo' Carikli · 12 years ago
  14. b532057 make GPIOs and misc configurable via devicetree by Florian Zumbiehl · 12 years ago
  15. 98236ca make INT[EFGH]# of vt8237 configurable as gpio via devicetree by Florian Zumbiehl · 12 years ago
  16. 6a3e8d6 some black magic for initializing the old version of the k8t800 by Florian Zumbiehl · 12 years ago
  17. 1b940fd implement usb2 termination and dpll delay setting for vt8237r by Florian Zumbiehl · 12 years ago
  18. 28bdd8d i3100: Add HAVE_HARD_RESET by Sven Schnelle · 12 years ago
  19. 912d891 vt8237: add support for setting the power state after loss of power by Florian Zumbiehl · 12 years ago
  20. 50dadfb compile code for CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD by Florian Zumbiehl · 12 years ago
  21. be7d8dc support for different location of HT registers in old version of K8T800 by Florian Zumbiehl · 12 years ago
  22. 2e2b84e move function from header file to .c file by Stefan Reinauer · 12 years ago
  23. 0802ad9 rename vt8237r_cfg() to k8x8xx_vt8237r_cfg() and make publicly accessible by Florian Zumbiehl · 12 years ago
  24. 1e1e859 factor out common config for k8x8xx's dram_enable() and vt8237r_cfg() by Florian Zumbiehl · 12 years ago
  25. 7b1d295 add support for 1106:3188 (host controller of the old version of k8t800) by Florian Zumbiehl · 12 years ago
  26. 86bb007 in vt8237r_enable(), write function enables only to ISA bridge config space by Florian Zumbiehl · 12 years ago
  27. 3cd0ae2 Revert "add support for 1106:3188 (host controller of the old version of k8t800)" due to dependency issues. by Patrick Georgi · 12 years ago
  28. e037f9f add support for writing to SMBus with vt8237 by Florian Zumbiehl · 12 years ago
  29. 8c4cf18 add support for 1106:3188 (host controller of the old version of k8t800) by Florian Zumbiehl · 12 years ago
  30. 5ff7c13 remove trailing whitespace by Stefan Reinauer · 12 years ago
  31. 20fc631 Fix usb debug dongle support by Sven Schnelle · 12 years ago
  32. af3dce9 Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c. by Stefan Reinauer · 12 years ago
  33. 914377e Get rid of the old romstage-as-bootblock ROM layout by Patrick Georgi · 12 years ago
  34. 0f8590f sb600: Implement EHCI workaround by Patrick Georgi · 12 years ago
  35. 9bfa1c8 Added smbus block read/write for amd8111 by Oskar Enoksson · 12 years ago
  36. b2f173e i82801gx: Fix port status in AHCI mode by Sven Schnelle · 12 years ago
  37. 906f9ae i82801gx: Add setting for C4onC3 mode by Sven Schnelle · 12 years ago
  38. 718afbe i82801gx: Add write and read/write block functions by Sven Schnelle · 12 years ago
  39. 3c97679 i82801gx: Don't set I/O base address to static value by Sven Schnelle · 12 years ago
  40. f3b0500 SB800: Hide unused gpp ports by Kerry Sheh · 12 years ago
  41. 1465385 sch: strip quotes around cmc.bin filename by Patrick Georgi · 12 years ago
  42. 2588db4 i82801dx: Replace romstage printk's by Kyösti Mälkki · 12 years ago
  43. 328a694 AMD CPU and chipset fixes for compilation with gcc 4.6 by Stefan Reinauer · 12 years ago
  44. ab87254 use acpi.h include instead of manually adding acpi_slp_type. by Stefan Reinauer · 12 years ago
  45. 971ebd8 Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6 by Stefan Reinauer · 12 years ago
  46. a251dee Use default table creator macro for all SSDTs by Stefan Reinauer · 12 years ago
  47. 390a337 amd/sb600: Enable COM2 at all times in early setup by Patrick Georgi · 12 years ago
  48. 55437c5 SB800 RAID: add kconfig option RAID_MISC_ROM_POSITION by Kerry Sheh · 12 years ago
  49. 0e6344e SB800: Sata Enable bus master and enable ahci for AHCI/RAID mode by Kerry Sheh · 12 years ago
  50. d7e856b9 sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODE by Kerry Sheh · 12 years ago
  51. 75df106 mainboard: complete the sb800 devicetree even device is off by Kerry Sheh · 12 years ago
  52. d4a0e7d sb800: Add sata ahci/raid mode kconfig option by Kerry Sheh · 12 years ago
  53. 03f82bd Use ACPI text fields consistently with all other boards by Stefan Reinauer · 12 years ago
  54. 3c59158 AMD SB800 early console use fix by efdesign98 · 12 years ago
  55. 8c69b1d rs780: hide unused gfx ports and gpp ports by Kerry Sheh · 12 years ago
  56. 4e22a3b Add acpi_get_sleep_type() to i82371eb and P2B _PTS/_WAK methods by Tobias Diedrich · 13 years ago
  57. 6209c82 AMD SB800 southbridge update by Kerry She · 12 years ago
  58. feed329 AMD F14 southbridge update by Kerry She · 12 years ago
  59. 16d3ec6 Adjust some code/comment of sb700 sata init by Wang Qing Pei · 13 years ago
  60. 00c8c4a Update AMD SR5650 and SB700 by efdesign98 · 12 years ago
  61. 4edbe00 Move AMD SB800 early clock setup. by Scott Duplichan · 12 years ago
  62. 5a91692 Set SB800 ROM decode size based on kconfig. by Marc Jones · 12 years ago
  63. 23b2152 Improve VIA K8M890 HT settings. Use recommended settings for ROMSIP and by Rudolf Marek · 12 years ago
  64. 811787a i82801gx: read RTC status register to prevent IRQ storm by Sven Schnelle · 12 years ago
  65. 3e706b6 amd southbirdge sb800 wrapper, pci bridge fix by Kerry She · 12 years ago
  66. 7c0c64e Addition of Family12/SB900 wrapper code by efdesign98 · 12 years ago
  67. 05a89ab Rename {CPU|NB|SB}/amd/*_wrapper folders by efdesign98 · 12 years ago
  68. d1cb0ee sb800: move spi prefetch and fast read mode to sb bootblock. by Stefan Reinauer · 13 years ago
  69. 8fed77a ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic by Scott Duplichan · 12 years ago
  70. bfe8e51 SMM: don't overwrite SMM memory on resume by Sven Schnelle · 12 years ago
  71. d8c68a9 i82801gx: replace cafed00d/cafebabe by defines by Sven Schnelle · 12 years ago
  72. fed129b Add ACPI automatic PIC/APIC interrupt routing logic for ck804 by Jonathan A. Kollasch · 13 years ago
  73. 486e032 Revert changes to set the sb800 to AHCI mode. by Marc Jones · 13 years ago
  74. e261807 i82801gx: enable ACPI during S3 resume by Sven Schnelle · 13 years ago
  75. f4dc1a7 SMM: add defines for APM_CNT register by Sven Schnelle · 13 years ago
  76. 44c1d31 re-indent, so files conform to coding guidelines. by Stefan Reinauer · 13 years ago
  77. c21b054 SMM: add mainboard_apm_cnt() callback by Sven Schnelle · 13 years ago
  78. e1898b5 vt8237r: Simplify bootblock init to work around nested if() romcc problem by Peter Stuge · 13 years ago
  79. 76d53b2 trivial remove blanks at the end of line by Kerry She · 13 years ago
  80. 991f880 This patch fix a AMD sb800 wrapper compile warning: by Kerry She · 13 years ago
  81. 4053e14 Correct implementation of r6608. (.align actually takes its argument in bytes) by Jonathan Kollasch · 13 years ago
  82. 6409a22 Ensure ck804 romstrap is 16-byte aligned. by Jonathan Kollasch · 13 years ago
  83. 3f0075b cimx_wrapper/sb800: Fix indent in late.c:sb800_enable() by Peter Stuge · 13 years ago
  84. a64ab46 Update gpp port configuration. by Scott Duplichan · 13 years ago
  85. be8fae1 Program the I/O APIC ID. by Scott Duplichan · 13 years ago
  86. f191c72 Enable AHCI mode and hide IDE controller to reduce boot time. by Scott Duplichan · 13 years ago
  87. e78ae24 Configure CIMx to use 33 MHz fast mode for SPD read. by Scott Duplichan · 13 years ago
  88. faafd14 by Kerry She · 13 years ago
  89. eb995c2 by Kerry She · 13 years ago
  90. 49ae971 i82801gx: enable SPI prefetching by Sven Schnelle · 13 years ago
  91. 3e4fb9d more ifdef -> if fixes. by Stefan Reinauer · 13 years ago
  92. d4814bd more ifdef -> if fixes by Stefan Reinauer · 13 years ago
  93. 1d888a9 some ifdef --> if fixes by Stefan Reinauer · 13 years ago
  94. 305f2f5 drop dead code from sb800 bootblock by Stefan Reinauer · 13 years ago
  95. 81725b2e pci1x2x: remove latency/bridge control/cacheline size settings by Sven Schnelle · 13 years ago
  96. 5c72a87 pci1x2x: use cardbus_read_resources()/cardbus_enable_resources() by Sven Schnelle · 13 years ago
  97. 5f22f30 pci1x2x: use pci_ops set_subsystem instead of custom code by Sven Schnelle · 13 years ago
  98. 20f7f3b pci1x2x: add PCI1510 device IDs by Sven Schnelle · 13 years ago
  99. baec034 pci1x2x: use devicetree register configuration by Sven Schnelle · 13 years ago
  100. b297b49 drop dead uart init code. by Stefan Reinauer · 13 years ago